1 /*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/cpu.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/module.h> 38 #include <sys/pcpu.h> 39 #include <sys/power.h> 40 #include <sys/proc.h> 41 #include <sys/sbuf.h> 42 #include <sys/smp.h> 43 44 #include <dev/pci/pcivar.h> 45 #include <machine/atomic.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 49 #include <contrib/dev/acpica/acpi.h> 50 #include <dev/acpica/acpivar.h> 51 52 /* 53 * Support for ACPI Processor devices, including C[1-3] sleep states. 54 */ 55 56 /* Hooks for the ACPI CA debugging infrastructure */ 57 #define _COMPONENT ACPI_PROCESSOR 58 ACPI_MODULE_NAME("PROCESSOR") 59 60 struct acpi_cx { 61 struct resource *p_lvlx; /* Register to read to enter state. */ 62 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 63 uint32_t trans_lat; /* Transition latency (usec). */ 64 uint32_t power; /* Power consumed (mW). */ 65 int res_type; /* Resource type for p_lvlx. */ 66 }; 67 #define MAX_CX_STATES 8 68 69 struct acpi_cpu_softc { 70 device_t cpu_dev; 71 ACPI_HANDLE cpu_handle; 72 struct pcpu *cpu_pcpu; 73 uint32_t cpu_acpi_id; /* ACPI processor id */ 74 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 75 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 76 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 77 int cpu_cx_count; /* Number of valid Cx states. */ 78 int cpu_prev_sleep;/* Last idle sleep duration. */ 79 int cpu_features; /* Child driver supported features. */ 80 /* Runtime state. */ 81 int cpu_non_c3; /* Index of lowest non-C3 state. */ 82 int cpu_short_slp; /* Count of < 1us sleeps. */ 83 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 84 /* Values for sysctl. */ 85 struct sysctl_ctx_list cpu_sysctl_ctx; 86 struct sysctl_oid *cpu_sysctl_tree; 87 int cpu_cx_lowest; 88 char cpu_cx_supported[64]; 89 int cpu_rid; 90 }; 91 92 struct acpi_cpu_device { 93 struct resource_list ad_rl; 94 }; 95 96 #define CPU_GET_REG(reg, width) \ 97 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 98 rman_get_bushandle((reg)), 0)) 99 #define CPU_SET_REG(reg, width, val) \ 100 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 101 rman_get_bushandle((reg)), 0, (val))) 102 103 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 104 105 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 106 107 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */ 108 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */ 109 110 #define PCI_VENDOR_INTEL 0x8086 111 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 112 #define PCI_REVISION_A_STEP 0 113 #define PCI_REVISION_B_STEP 1 114 #define PCI_REVISION_4E 2 115 #define PCI_REVISION_4M 3 116 #define PIIX4_DEVACTB_REG 0x58 117 #define PIIX4_BRLD_EN_IRQ0 (1<<0) 118 #define PIIX4_BRLD_EN_IRQ (1<<1) 119 #define PIIX4_BRLD_EN_IRQ8 (1<<5) 120 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8) 121 #define PIIX4_PCNTRL_BST_EN (1<<10) 122 123 /* Platform hardware resource information. */ 124 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 125 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 126 static int cpu_quirks; /* Indicate any hardware bugs. */ 127 128 /* Runtime state. */ 129 static int cpu_disable_idle; /* Disable entry to idle function */ 130 static int cpu_cx_count; /* Number of valid Cx states */ 131 132 /* Values for sysctl. */ 133 static struct sysctl_ctx_list cpu_sysctl_ctx; 134 static struct sysctl_oid *cpu_sysctl_tree; 135 static int cpu_cx_generic; 136 static int cpu_cx_lowest; 137 138 static device_t *cpu_devices; 139 static int cpu_ndevices; 140 static struct acpi_cpu_softc **cpu_softc; 141 ACPI_SERIAL_DECL(cpu, "ACPI CPU"); 142 143 static int acpi_cpu_probe(device_t dev); 144 static int acpi_cpu_attach(device_t dev); 145 static int acpi_cpu_suspend(device_t dev); 146 static int acpi_cpu_resume(device_t dev); 147 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 148 uint32_t *cpu_id); 149 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child); 150 static device_t acpi_cpu_add_child(device_t dev, int order, const char *name, 151 int unit); 152 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index, 153 uintptr_t *result); 154 static int acpi_cpu_shutdown(device_t dev); 155 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 156 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc); 157 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 158 static void acpi_cpu_startup(void *arg); 159 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc); 160 static void acpi_cpu_cx_list(struct acpi_cpu_softc *sc); 161 static void acpi_cpu_idle(void); 162 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 163 static int acpi_cpu_quirks(void); 164 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 165 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val); 166 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 167 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 168 169 static device_method_t acpi_cpu_methods[] = { 170 /* Device interface */ 171 DEVMETHOD(device_probe, acpi_cpu_probe), 172 DEVMETHOD(device_attach, acpi_cpu_attach), 173 DEVMETHOD(device_detach, bus_generic_detach), 174 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 175 DEVMETHOD(device_suspend, acpi_cpu_suspend), 176 DEVMETHOD(device_resume, acpi_cpu_resume), 177 178 /* Bus interface */ 179 DEVMETHOD(bus_add_child, acpi_cpu_add_child), 180 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar), 181 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist), 182 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 183 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 184 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 185 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 186 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 187 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 188 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 189 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 190 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 191 192 {0, 0} 193 }; 194 195 static driver_t acpi_cpu_driver = { 196 "cpu", 197 acpi_cpu_methods, 198 sizeof(struct acpi_cpu_softc), 199 }; 200 201 static devclass_t acpi_cpu_devclass; 202 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 203 MODULE_DEPEND(cpu, acpi, 1, 1, 1); 204 205 static int 206 acpi_cpu_probe(device_t dev) 207 { 208 int acpi_id, cpu_id; 209 ACPI_BUFFER buf; 210 ACPI_HANDLE handle; 211 ACPI_OBJECT *obj; 212 ACPI_STATUS status; 213 214 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 215 return (ENXIO); 216 217 handle = acpi_get_handle(dev); 218 if (cpu_softc == NULL) 219 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 220 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 221 222 /* Get our Processor object. */ 223 buf.Pointer = NULL; 224 buf.Length = ACPI_ALLOCATE_BUFFER; 225 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 226 if (ACPI_FAILURE(status)) { 227 device_printf(dev, "probe failed to get Processor obj - %s\n", 228 AcpiFormatException(status)); 229 return (ENXIO); 230 } 231 obj = (ACPI_OBJECT *)buf.Pointer; 232 if (obj->Type != ACPI_TYPE_PROCESSOR) { 233 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 234 AcpiOsFree(obj); 235 return (ENXIO); 236 } 237 238 /* 239 * Find the processor associated with our unit. We could use the 240 * ProcId as a key, however, some boxes do not have the same values 241 * in their Processor object as the ProcId values in the MADT. 242 */ 243 acpi_id = obj->Processor.ProcId; 244 AcpiOsFree(obj); 245 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 246 return (ENXIO); 247 248 /* 249 * Check if we already probed this processor. We scan the bus twice 250 * so it's possible we've already seen this one. 251 */ 252 if (cpu_softc[cpu_id] != NULL) 253 return (ENXIO); 254 255 /* Mark this processor as in-use and save our derived id for attach. */ 256 cpu_softc[cpu_id] = (void *)1; 257 acpi_set_magic(dev, cpu_id); 258 device_set_desc(dev, "ACPI CPU"); 259 260 return (0); 261 } 262 263 static int 264 acpi_cpu_attach(device_t dev) 265 { 266 ACPI_BUFFER buf; 267 ACPI_OBJECT arg[4], *obj; 268 ACPI_OBJECT_LIST arglist; 269 struct pcpu *pcpu_data; 270 struct acpi_cpu_softc *sc; 271 struct acpi_softc *acpi_sc; 272 ACPI_STATUS status; 273 u_int features; 274 int cpu_id, drv_count, i; 275 driver_t **drivers; 276 uint32_t cap_set[3]; 277 278 /* UUID needed by _OSC evaluation */ 279 static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 280 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70, 281 0x58, 0x71, 0x39, 0x53 }; 282 283 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 284 285 sc = device_get_softc(dev); 286 sc->cpu_dev = dev; 287 sc->cpu_handle = acpi_get_handle(dev); 288 cpu_id = acpi_get_magic(dev); 289 cpu_softc[cpu_id] = sc; 290 pcpu_data = pcpu_find(cpu_id); 291 pcpu_data->pc_device = dev; 292 sc->cpu_pcpu = pcpu_data; 293 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand; 294 cpu_cst_cnt = AcpiGbl_FADT.CstControl; 295 296 buf.Pointer = NULL; 297 buf.Length = ACPI_ALLOCATE_BUFFER; 298 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 299 if (ACPI_FAILURE(status)) { 300 device_printf(dev, "attach failed to get Processor obj - %s\n", 301 AcpiFormatException(status)); 302 return (ENXIO); 303 } 304 obj = (ACPI_OBJECT *)buf.Pointer; 305 sc->cpu_p_blk = obj->Processor.PblkAddress; 306 sc->cpu_p_blk_len = obj->Processor.PblkLength; 307 sc->cpu_acpi_id = obj->Processor.ProcId; 308 AcpiOsFree(obj); 309 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 310 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 311 312 /* 313 * If this is the first cpu we attach, create and initialize the generic 314 * resources that will be used by all acpi cpu devices. 315 */ 316 if (device_get_unit(dev) == 0) { 317 /* Assume we won't be using generic Cx mode by default */ 318 cpu_cx_generic = FALSE; 319 320 /* Install hw.acpi.cpu sysctl tree */ 321 acpi_sc = acpi_device_get_parent_softc(dev); 322 sysctl_ctx_init(&cpu_sysctl_ctx); 323 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx, 324 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu", 325 CTLFLAG_RD, 0, "node for CPU children"); 326 327 /* Queue post cpu-probing task handler */ 328 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL); 329 } 330 331 /* 332 * Before calling any CPU methods, collect child driver feature hints 333 * and notify ACPI of them. We support unified SMP power control 334 * so advertise this ourselves. Note this is not the same as independent 335 * SMP control where each CPU can have different settings. 336 */ 337 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3; 338 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) { 339 for (i = 0; i < drv_count; i++) { 340 if (ACPI_GET_FEATURES(drivers[i], &features) == 0) 341 sc->cpu_features |= features; 342 } 343 free(drivers, M_TEMP); 344 } 345 346 /* 347 * CPU capabilities are specified as a buffer of 32-bit integers: 348 * revision, count, and one or more capabilities. The revision of 349 * "1" is not specified anywhere but seems to match Linux. 350 */ 351 if (sc->cpu_features) { 352 arglist.Pointer = arg; 353 arglist.Count = 1; 354 arg[0].Type = ACPI_TYPE_BUFFER; 355 arg[0].Buffer.Length = sizeof(cap_set); 356 arg[0].Buffer.Pointer = (uint8_t *)cap_set; 357 cap_set[0] = 1; /* revision */ 358 cap_set[1] = 1; /* number of capabilities integers */ 359 cap_set[2] = sc->cpu_features; 360 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL); 361 362 /* 363 * On some systems we need to evaluate _OSC so that the ASL 364 * loads the _PSS and/or _PDC methods at runtime. 365 * 366 * TODO: evaluate failure of _OSC. 367 */ 368 arglist.Pointer = arg; 369 arglist.Count = 4; 370 arg[0].Type = ACPI_TYPE_BUFFER; 371 arg[0].Buffer.Length = sizeof(cpu_oscuuid); 372 arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */ 373 arg[1].Type = ACPI_TYPE_INTEGER; 374 arg[1].Integer.Value = 1; /* revision */ 375 arg[2].Type = ACPI_TYPE_INTEGER; 376 arg[2].Integer.Value = 1; /* count */ 377 arg[3].Type = ACPI_TYPE_BUFFER; 378 arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */ 379 arg[3].Buffer.Pointer = (uint8_t *)cap_set; 380 cap_set[0] = 0; 381 AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL); 382 } 383 384 /* Probe for Cx state support. */ 385 acpi_cpu_cx_probe(sc); 386 387 /* Finally, call identify and probe/attach for child devices. */ 388 bus_generic_probe(dev); 389 bus_generic_attach(dev); 390 391 return (0); 392 } 393 394 /* 395 * Disable any entry to the idle function during suspend and re-enable it 396 * during resume. 397 */ 398 static int 399 acpi_cpu_suspend(device_t dev) 400 { 401 int error; 402 403 error = bus_generic_suspend(dev); 404 if (error) 405 return (error); 406 cpu_disable_idle = TRUE; 407 return (0); 408 } 409 410 static int 411 acpi_cpu_resume(device_t dev) 412 { 413 414 cpu_disable_idle = FALSE; 415 return (bus_generic_resume(dev)); 416 } 417 418 /* 419 * Find the nth present CPU and return its pc_cpuid as well as set the 420 * pc_acpi_id from the most reliable source. 421 */ 422 static int 423 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 424 { 425 struct pcpu *pcpu_data; 426 uint32_t i; 427 428 KASSERT(acpi_id != NULL, ("Null acpi_id")); 429 KASSERT(cpu_id != NULL, ("Null cpu_id")); 430 for (i = 0; i <= mp_maxid; i++) { 431 if (CPU_ABSENT(i)) 432 continue; 433 pcpu_data = pcpu_find(i); 434 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 435 if (idx-- == 0) { 436 /* 437 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 438 * override it with the value from the ASL. Otherwise, if the 439 * two don't match, prefer the MADT-derived value. Finally, 440 * return the pc_cpuid to reference this processor. 441 */ 442 if (pcpu_data->pc_acpi_id == 0xffffffff) 443 pcpu_data->pc_acpi_id = *acpi_id; 444 else if (pcpu_data->pc_acpi_id != *acpi_id) 445 *acpi_id = pcpu_data->pc_acpi_id; 446 *cpu_id = pcpu_data->pc_cpuid; 447 return (0); 448 } 449 } 450 451 return (ESRCH); 452 } 453 454 static struct resource_list * 455 acpi_cpu_get_rlist(device_t dev, device_t child) 456 { 457 struct acpi_cpu_device *ad; 458 459 ad = device_get_ivars(child); 460 if (ad == NULL) 461 return (NULL); 462 return (&ad->ad_rl); 463 } 464 465 static device_t 466 acpi_cpu_add_child(device_t dev, int order, const char *name, int unit) 467 { 468 struct acpi_cpu_device *ad; 469 device_t child; 470 471 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL) 472 return (NULL); 473 474 resource_list_init(&ad->ad_rl); 475 476 child = device_add_child_ordered(dev, order, name, unit); 477 if (child != NULL) 478 device_set_ivars(child, ad); 479 else 480 free(ad, M_TEMP); 481 return (child); 482 } 483 484 static int 485 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 486 { 487 struct acpi_cpu_softc *sc; 488 489 sc = device_get_softc(dev); 490 switch (index) { 491 case ACPI_IVAR_HANDLE: 492 *result = (uintptr_t)sc->cpu_handle; 493 break; 494 case CPU_IVAR_PCPU: 495 *result = (uintptr_t)sc->cpu_pcpu; 496 break; 497 default: 498 return (ENOENT); 499 } 500 return (0); 501 } 502 503 static int 504 acpi_cpu_shutdown(device_t dev) 505 { 506 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 507 508 /* Allow children to shutdown first. */ 509 bus_generic_shutdown(dev); 510 511 /* 512 * Disable any entry to the idle function. There is a small race where 513 * an idle thread have passed this check but not gone to sleep. This 514 * is ok since device_shutdown() does not free the softc, otherwise 515 * we'd have to be sure all threads were evicted before returning. 516 */ 517 cpu_disable_idle = TRUE; 518 519 return_VALUE (0); 520 } 521 522 static void 523 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 524 { 525 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 526 527 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 528 sc->cpu_prev_sleep = 1000000; 529 sc->cpu_cx_lowest = 0; 530 531 /* 532 * Check for the ACPI 2.0 _CST sleep states object. If we can't find 533 * any, we'll revert to generic FADT/P_BLK Cx control method which will 534 * be handled by acpi_cpu_startup. We need to defer to after having 535 * probed all the cpus in the system before probing for generic Cx 536 * states as we may already have found cpus with valid _CST packages 537 */ 538 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) { 539 /* 540 * We were unable to find a _CST package for this cpu or there 541 * was an error parsing it. Switch back to generic mode. 542 */ 543 cpu_cx_generic = TRUE; 544 if (bootverbose) 545 device_printf(sc->cpu_dev, "switching to generic Cx mode\n"); 546 } 547 548 /* 549 * TODO: _CSD Package should be checked here. 550 */ 551 } 552 553 static void 554 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc) 555 { 556 ACPI_GENERIC_ADDRESS gas; 557 struct acpi_cx *cx_ptr; 558 559 sc->cpu_cx_count = 0; 560 cx_ptr = sc->cpu_cx_states; 561 562 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 563 sc->cpu_prev_sleep = 1000000; 564 565 /* C1 has been required since just after ACPI 1.0 */ 566 cx_ptr->type = ACPI_STATE_C1; 567 cx_ptr->trans_lat = 0; 568 cx_ptr++; 569 sc->cpu_cx_count++; 570 571 /* 572 * The spec says P_BLK must be 6 bytes long. However, some systems 573 * use it to indicate a fractional set of features present so we 574 * take 5 as C2. Some may also have a value of 7 to indicate 575 * another C3 but most use _CST for this (as required) and having 576 * "only" C1-C3 is not a hardship. 577 */ 578 if (sc->cpu_p_blk_len < 5) 579 return; 580 581 /* Validate and allocate resources for C2 (P_LVL2). */ 582 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 583 gas.BitWidth = 8; 584 if (AcpiGbl_FADT.C2Latency <= 100) { 585 gas.Address = sc->cpu_p_blk + 4; 586 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, 587 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE); 588 if (cx_ptr->p_lvlx != NULL) { 589 sc->cpu_rid++; 590 cx_ptr->type = ACPI_STATE_C2; 591 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency; 592 cx_ptr++; 593 sc->cpu_cx_count++; 594 } 595 } 596 if (sc->cpu_p_blk_len < 6) 597 return; 598 599 /* Validate and allocate resources for C3 (P_LVL3). */ 600 if (AcpiGbl_FADT.C3Latency <= 1000 && !(cpu_quirks & CPU_QUIRK_NO_C3)) { 601 gas.Address = sc->cpu_p_blk + 5; 602 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas, 603 &cx_ptr->p_lvlx, RF_SHAREABLE); 604 if (cx_ptr->p_lvlx != NULL) { 605 sc->cpu_rid++; 606 cx_ptr->type = ACPI_STATE_C3; 607 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency; 608 cx_ptr++; 609 sc->cpu_cx_count++; 610 } 611 } 612 613 /* Update the largest cx_count seen so far */ 614 if (sc->cpu_cx_count > cpu_cx_count) 615 cpu_cx_count = sc->cpu_cx_count; 616 } 617 618 /* 619 * Parse a _CST package and set up its Cx states. Since the _CST object 620 * can change dynamically, our notify handler may call this function 621 * to clean up and probe the new _CST package. 622 */ 623 static int 624 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 625 { 626 struct acpi_cx *cx_ptr; 627 ACPI_STATUS status; 628 ACPI_BUFFER buf; 629 ACPI_OBJECT *top; 630 ACPI_OBJECT *pkg; 631 uint32_t count; 632 int i; 633 634 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 635 636 buf.Pointer = NULL; 637 buf.Length = ACPI_ALLOCATE_BUFFER; 638 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 639 if (ACPI_FAILURE(status)) 640 return (ENXIO); 641 642 /* _CST is a package with a count and at least one Cx package. */ 643 top = (ACPI_OBJECT *)buf.Pointer; 644 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 645 device_printf(sc->cpu_dev, "invalid _CST package\n"); 646 AcpiOsFree(buf.Pointer); 647 return (ENXIO); 648 } 649 if (count != top->Package.Count - 1) { 650 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n", 651 count, top->Package.Count - 1); 652 count = top->Package.Count - 1; 653 } 654 if (count > MAX_CX_STATES) { 655 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 656 count = MAX_CX_STATES; 657 } 658 659 /* Set up all valid states. */ 660 sc->cpu_cx_count = 0; 661 cx_ptr = sc->cpu_cx_states; 662 for (i = 0; i < count; i++) { 663 pkg = &top->Package.Elements[i + 1]; 664 if (!ACPI_PKG_VALID(pkg, 4) || 665 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 666 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 667 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 668 669 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n"); 670 continue; 671 } 672 673 /* Validate the state to see if we should use it. */ 674 switch (cx_ptr->type) { 675 case ACPI_STATE_C1: 676 sc->cpu_non_c3 = i; 677 cx_ptr++; 678 sc->cpu_cx_count++; 679 continue; 680 case ACPI_STATE_C2: 681 if (cx_ptr->trans_lat > 100) { 682 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 683 "acpi_cpu%d: C2[%d] not available.\n", 684 device_get_unit(sc->cpu_dev), i)); 685 continue; 686 } 687 sc->cpu_non_c3 = i; 688 break; 689 case ACPI_STATE_C3: 690 default: 691 if (cx_ptr->trans_lat > 1000 || 692 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 693 694 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 695 "acpi_cpu%d: C3[%d] not available.\n", 696 device_get_unit(sc->cpu_dev), i)); 697 continue; 698 } 699 break; 700 } 701 702 #ifdef notyet 703 /* Free up any previous register. */ 704 if (cx_ptr->p_lvlx != NULL) { 705 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 706 cx_ptr->p_lvlx = NULL; 707 } 708 #endif 709 710 /* Allocate the control register for C2 or C3. */ 711 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid, 712 &cx_ptr->p_lvlx, RF_SHAREABLE); 713 if (cx_ptr->p_lvlx) { 714 sc->cpu_rid++; 715 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 716 "acpi_cpu%d: Got C%d - %d latency\n", 717 device_get_unit(sc->cpu_dev), cx_ptr->type, 718 cx_ptr->trans_lat)); 719 cx_ptr++; 720 sc->cpu_cx_count++; 721 } 722 } 723 AcpiOsFree(buf.Pointer); 724 725 return (0); 726 } 727 728 /* 729 * Call this *after* all CPUs have been attached. 730 */ 731 static void 732 acpi_cpu_startup(void *arg) 733 { 734 struct acpi_cpu_softc *sc; 735 int i; 736 737 /* Get set of CPU devices */ 738 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 739 740 /* 741 * Setup any quirks that might necessary now that we have probed 742 * all the CPUs 743 */ 744 acpi_cpu_quirks(); 745 746 cpu_cx_count = 0; 747 if (cpu_cx_generic) { 748 /* 749 * We are using generic Cx mode, probe for available Cx states 750 * for all processors. 751 */ 752 for (i = 0; i < cpu_ndevices; i++) { 753 sc = device_get_softc(cpu_devices[i]); 754 acpi_cpu_generic_cx_probe(sc); 755 } 756 757 /* 758 * Find the highest Cx state common to all CPUs 759 * in the system, taking quirks into account. 760 */ 761 for (i = 0; i < cpu_ndevices; i++) { 762 sc = device_get_softc(cpu_devices[i]); 763 if (sc->cpu_cx_count < cpu_cx_count) 764 cpu_cx_count = sc->cpu_cx_count; 765 } 766 } else { 767 /* 768 * We are using _CST mode, remove C3 state if necessary. 769 * Update the largest Cx state supported in the global cpu_cx_count. 770 * It will be used in the global Cx sysctl handler. 771 * As we now know for sure that we will be using _CST mode 772 * install our notify handler. 773 */ 774 for (i = 0; i < cpu_ndevices; i++) { 775 sc = device_get_softc(cpu_devices[i]); 776 if (cpu_quirks & CPU_QUIRK_NO_C3) { 777 sc->cpu_cx_count = sc->cpu_non_c3 + 1; 778 } 779 if (sc->cpu_cx_count > cpu_cx_count) 780 cpu_cx_count = sc->cpu_cx_count; 781 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 782 acpi_cpu_notify, sc); 783 } 784 } 785 786 /* Perform Cx final initialization. */ 787 for (i = 0; i < cpu_ndevices; i++) { 788 sc = device_get_softc(cpu_devices[i]); 789 acpi_cpu_startup_cx(sc); 790 } 791 792 /* Add a sysctl handler to handle global Cx lowest setting */ 793 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree), 794 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 795 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A", 796 "Global lowest Cx sleep state to use"); 797 798 /* Take over idling from cpu_idle_default(). */ 799 cpu_cx_lowest = 0; 800 cpu_disable_idle = FALSE; 801 cpu_idle_hook = acpi_cpu_idle; 802 } 803 804 static void 805 acpi_cpu_cx_list(struct acpi_cpu_softc *sc) 806 { 807 struct sbuf sb; 808 int i; 809 810 /* 811 * Set up the list of Cx states 812 */ 813 sc->cpu_non_c3 = 0; 814 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported), 815 SBUF_FIXEDLEN); 816 for (i = 0; i < sc->cpu_cx_count; i++) { 817 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 818 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) 819 sc->cpu_non_c3 = i; 820 } 821 sbuf_trim(&sb); 822 sbuf_finish(&sb); 823 } 824 825 static void 826 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc) 827 { 828 acpi_cpu_cx_list(sc); 829 830 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx, 831 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 832 OID_AUTO, "cx_supported", CTLFLAG_RD, 833 sc->cpu_cx_supported, 0, 834 "Cx/microsecond values for supported Cx states"); 835 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 836 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 837 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 838 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A", 839 "lowest Cx sleep state to use"); 840 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 841 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 842 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 843 (void *)sc, 0, acpi_cpu_usage_sysctl, "A", 844 "percent usage for each Cx state"); 845 846 #ifdef notyet 847 /* Signal platform that we can handle _CST notification. */ 848 if (!cpu_cx_generic && cpu_cst_cnt != 0) { 849 ACPI_LOCK(acpi); 850 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 851 ACPI_UNLOCK(acpi); 852 } 853 #endif 854 } 855 856 /* 857 * Idle the CPU in the lowest state possible. This function is called with 858 * interrupts disabled. Note that once it re-enables interrupts, a task 859 * switch can occur so do not access shared data (i.e. the softc) after 860 * interrupts are re-enabled. 861 */ 862 static void 863 acpi_cpu_idle() 864 { 865 struct acpi_cpu_softc *sc; 866 struct acpi_cx *cx_next; 867 uint32_t start_time, end_time; 868 int bm_active, cx_next_idx, i; 869 870 /* If disabled, return immediately. */ 871 if (cpu_disable_idle) { 872 ACPI_ENABLE_IRQS(); 873 return; 874 } 875 876 /* 877 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 878 * since there is no ACPI processor object for this CPU. This occurs 879 * for logical CPUs in the HTT case. 880 */ 881 sc = cpu_softc[PCPU_GET(cpuid)]; 882 if (sc == NULL) { 883 acpi_cpu_c1(); 884 return; 885 } 886 887 /* 888 * If we slept 100 us or more, use the lowest Cx state. Otherwise, 889 * find the lowest state that has a latency less than or equal to 890 * the length of our last sleep. 891 */ 892 cx_next_idx = sc->cpu_cx_lowest; 893 if (sc->cpu_prev_sleep < 100) { 894 /* 895 * If we sleep too short all the time, this system may not implement 896 * C2/3 correctly (i.e. reads return immediately). In this case, 897 * back off and use the next higher level. 898 * It seems that when you have a dual core cpu (like the Intel Core Duo) 899 * that both cores will get out of C3 state as soon as one of them 900 * requires it. This breaks the sleep detection logic as the sleep 901 * counter is local to each cpu. Disable the sleep logic for now as a 902 * workaround if there's more than one CPU. The right fix would probably 903 * be to add quirks for system that don't really support C3 state. 904 */ 905 if (mp_ncpus < 2 && sc->cpu_prev_sleep <= 1) { 906 sc->cpu_short_slp++; 907 if (sc->cpu_short_slp == 1000 && sc->cpu_cx_lowest != 0) { 908 if (sc->cpu_non_c3 == sc->cpu_cx_lowest && sc->cpu_non_c3 != 0) 909 sc->cpu_non_c3--; 910 sc->cpu_cx_lowest--; 911 sc->cpu_short_slp = 0; 912 device_printf(sc->cpu_dev, 913 "too many short sleeps, backing off to C%d\n", 914 sc->cpu_cx_lowest + 1); 915 } 916 } else 917 sc->cpu_short_slp = 0; 918 919 for (i = sc->cpu_cx_lowest; i >= 0; i--) 920 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) { 921 cx_next_idx = i; 922 break; 923 } 924 } 925 926 /* 927 * Check for bus master activity. If there was activity, clear 928 * the bit and use the lowest non-C3 state. Note that the USB 929 * driver polling for new devices keeps this bit set all the 930 * time if USB is loaded. 931 */ 932 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 933 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active); 934 if (bm_active != 0) { 935 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1); 936 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3); 937 } 938 } 939 940 /* Select the next state and update statistics. */ 941 cx_next = &sc->cpu_cx_states[cx_next_idx]; 942 sc->cpu_cx_stats[cx_next_idx]++; 943 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 944 945 /* 946 * Execute HLT (or equivalent) and wait for an interrupt. We can't 947 * calculate the time spent in C1 since the place we wake up is an 948 * ISR. Assume we slept one quantum and return. 949 */ 950 if (cx_next->type == ACPI_STATE_C1) { 951 sc->cpu_prev_sleep = 1000000 / hz; 952 acpi_cpu_c1(); 953 return; 954 } 955 956 /* 957 * For C3, disable bus master arbitration and enable bus master wake 958 * if BM control is available, otherwise flush the CPU cache. 959 */ 960 if (cx_next->type == ACPI_STATE_C3) { 961 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 962 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1); 963 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1); 964 } else 965 ACPI_FLUSH_CPU_CACHE(); 966 } 967 968 /* 969 * Read from P_LVLx to enter C2(+), checking time spent asleep. 970 * Use the ACPI timer for measuring sleep time. Since we need to 971 * get the time very close to the CPU start/stop clock logic, this 972 * is the only reliable time source. 973 */ 974 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT.XPmTimerBlock); 975 CPU_GET_REG(cx_next->p_lvlx, 1); 976 977 /* 978 * Read the end time twice. Since it may take an arbitrary time 979 * to enter the idle state, the first read may be executed before 980 * the processor has stopped. Doing it again provides enough 981 * margin that we are certain to have a correct value. 982 */ 983 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock); 984 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock); 985 986 /* Enable bus master arbitration and disable bus master wakeup. */ 987 if (cx_next->type == ACPI_STATE_C3 && 988 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 989 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0); 990 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); 991 } 992 ACPI_ENABLE_IRQS(); 993 994 /* Find the actual time asleep in microseconds, minus overhead. */ 995 end_time = acpi_TimerDelta(end_time, start_time); 996 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat; 997 } 998 999 /* 1000 * Re-evaluate the _CST object when we are notified that it changed. 1001 * 1002 * XXX Re-evaluation disabled until locking is done. 1003 */ 1004 static void 1005 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 1006 { 1007 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 1008 struct acpi_cpu_softc *isc; 1009 int i; 1010 1011 if (notify != ACPI_NOTIFY_CX_STATES) 1012 return; 1013 1014 /* Update the list of Cx states. */ 1015 acpi_cpu_cx_cst(sc); 1016 acpi_cpu_cx_list(sc); 1017 1018 /* Update the new lowest useable Cx state for all CPUs. */ 1019 ACPI_SERIAL_BEGIN(cpu); 1020 cpu_cx_count = 0; 1021 for (i = 0; i < cpu_ndevices; i++) { 1022 isc = device_get_softc(cpu_devices[i]); 1023 if (isc->cpu_cx_count > cpu_cx_count) 1024 cpu_cx_count = isc->cpu_cx_count; 1025 } 1026 ACPI_SERIAL_END(cpu); 1027 } 1028 1029 static int 1030 acpi_cpu_quirks(void) 1031 { 1032 device_t acpi_dev; 1033 uint32_t val; 1034 1035 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 1036 1037 /* 1038 * Bus mastering arbitration control is needed to keep caches coherent 1039 * while sleeping in C3. If it's not present but a working flush cache 1040 * instruction is present, flush the caches before entering C3 instead. 1041 * Otherwise, just disable C3 completely. 1042 */ 1043 if (AcpiGbl_FADT.Pm2ControlBlock == 0 || 1044 AcpiGbl_FADT.Pm2ControlLength == 0) { 1045 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) && 1046 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) { 1047 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1048 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1049 "acpi_cpu: no BM control, using flush cache method\n")); 1050 } else { 1051 cpu_quirks |= CPU_QUIRK_NO_C3; 1052 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1053 "acpi_cpu: no BM control, C3 not available\n")); 1054 } 1055 } 1056 1057 /* 1058 * If we are using generic Cx mode, C3 on multiple CPUs requires using 1059 * the expensive flush cache instruction. 1060 */ 1061 if (cpu_cx_generic && mp_ncpus > 1) { 1062 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1063 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1064 "acpi_cpu: SMP, using flush cache mode for C3\n")); 1065 } 1066 1067 /* Look for various quirks of the PIIX4 part. */ 1068 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 1069 if (acpi_dev != NULL) { 1070 switch (pci_get_revid(acpi_dev)) { 1071 /* 1072 * Disable C3 support for all PIIX4 chipsets. Some of these parts 1073 * do not report the BMIDE status to the BM status register and 1074 * others have a livelock bug if Type-F DMA is enabled. Linux 1075 * works around the BMIDE bug by reading the BM status directly 1076 * but we take the simpler approach of disabling C3 for these 1077 * parts. 1078 * 1079 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 1080 * Livelock") from the January 2002 PIIX4 specification update. 1081 * Applies to all PIIX4 models. 1082 * 1083 * Also, make sure that all interrupts cause a "Stop Break" 1084 * event to exit from C2 state. 1085 * Also, BRLD_EN_BM (ACPI_BITREG_BUS_MASTER_RLD in ACPI-speak) 1086 * should be set to zero, otherwise it causes C2 to short-sleep. 1087 * PIIX4 doesn't properly support C3 and bus master activity 1088 * need not break out of C2. 1089 */ 1090 case PCI_REVISION_A_STEP: 1091 case PCI_REVISION_B_STEP: 1092 case PCI_REVISION_4E: 1093 case PCI_REVISION_4M: 1094 cpu_quirks |= CPU_QUIRK_NO_C3; 1095 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1096 "acpi_cpu: working around PIIX4 bug, disabling C3\n")); 1097 1098 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4); 1099 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) { 1100 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1101 "acpi_cpu: PIIX4: enabling IRQs to generate Stop Break\n")); 1102 val |= PIIX4_STOP_BREAK_MASK; 1103 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4); 1104 } 1105 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_RLD, &val); 1106 if (val) { 1107 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1108 "acpi_cpu: PIIX4: reset BRLD_EN_BM\n")); 1109 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); 1110 } 1111 break; 1112 default: 1113 break; 1114 } 1115 } 1116 1117 return (0); 1118 } 1119 1120 static int 1121 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 1122 { 1123 struct acpi_cpu_softc *sc; 1124 struct sbuf sb; 1125 char buf[128]; 1126 int i; 1127 uintmax_t fract, sum, whole; 1128 1129 sc = (struct acpi_cpu_softc *) arg1; 1130 sum = 0; 1131 for (i = 0; i < sc->cpu_cx_count; i++) 1132 sum += sc->cpu_cx_stats[i]; 1133 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1134 for (i = 0; i < sc->cpu_cx_count; i++) { 1135 if (sum > 0) { 1136 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100; 1137 fract = (whole % sum) * 100; 1138 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 1139 (u_int)(fract / sum)); 1140 } else 1141 sbuf_printf(&sb, "0%% "); 1142 } 1143 sbuf_trim(&sb); 1144 sbuf_finish(&sb); 1145 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1146 sbuf_delete(&sb); 1147 1148 return (0); 1149 } 1150 1151 static int 1152 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val) 1153 { 1154 int i; 1155 1156 ACPI_SERIAL_ASSERT(cpu); 1157 sc->cpu_cx_lowest = val; 1158 1159 /* If not disabling, cache the new lowest non-C3 state. */ 1160 sc->cpu_non_c3 = 0; 1161 for (i = sc->cpu_cx_lowest; i >= 0; i--) { 1162 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1163 sc->cpu_non_c3 = i; 1164 break; 1165 } 1166 } 1167 1168 /* Reset the statistics counters. */ 1169 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats)); 1170 return (0); 1171 } 1172 1173 static int 1174 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1175 { 1176 struct acpi_cpu_softc *sc; 1177 char state[8]; 1178 int val, error; 1179 1180 sc = (struct acpi_cpu_softc *) arg1; 1181 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1); 1182 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1183 if (error != 0 || req->newptr == NULL) 1184 return (error); 1185 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1186 return (EINVAL); 1187 val = (int) strtol(state + 1, NULL, 10) - 1; 1188 if (val < 0 || val > sc->cpu_cx_count - 1) 1189 return (EINVAL); 1190 1191 ACPI_SERIAL_BEGIN(cpu); 1192 acpi_cpu_set_cx_lowest(sc, val); 1193 ACPI_SERIAL_END(cpu); 1194 1195 return (0); 1196 } 1197 1198 static int 1199 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1200 { 1201 struct acpi_cpu_softc *sc; 1202 char state[8]; 1203 int val, error, i; 1204 1205 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1206 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1207 if (error != 0 || req->newptr == NULL) 1208 return (error); 1209 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1210 return (EINVAL); 1211 val = (int) strtol(state + 1, NULL, 10) - 1; 1212 if (val < 0 || val > cpu_cx_count - 1) 1213 return (EINVAL); 1214 cpu_cx_lowest = val; 1215 1216 /* Update the new lowest useable Cx state for all CPUs. */ 1217 ACPI_SERIAL_BEGIN(cpu); 1218 for (i = 0; i < cpu_ndevices; i++) { 1219 sc = device_get_softc(cpu_devices[i]); 1220 acpi_cpu_set_cx_lowest(sc, val); 1221 } 1222 ACPI_SERIAL_END(cpu); 1223 1224 return (0); 1225 } 1226