1 /*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/cpu.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/module.h> 38 #include <sys/pcpu.h> 39 #include <sys/power.h> 40 #include <sys/proc.h> 41 #include <sys/sbuf.h> 42 #include <sys/smp.h> 43 44 #include <dev/pci/pcivar.h> 45 #include <machine/atomic.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 49 #include <contrib/dev/acpica/acpi.h> 50 #include <dev/acpica/acpivar.h> 51 52 /* 53 * Support for ACPI Processor devices, including C[1-3] sleep states. 54 * 55 * TODO: implement scans of all CPUs to be sure all Cx states are 56 * equivalent. 57 */ 58 59 /* Hooks for the ACPI CA debugging infrastructure */ 60 #define _COMPONENT ACPI_PROCESSOR 61 ACPI_MODULE_NAME("PROCESSOR") 62 63 struct acpi_cx { 64 struct resource *p_lvlx; /* Register to read to enter state. */ 65 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 66 uint32_t trans_lat; /* Transition latency (usec). */ 67 uint32_t power; /* Power consumed (mW). */ 68 int res_type; /* Resource type for p_lvlx. */ 69 }; 70 #define MAX_CX_STATES 8 71 72 struct acpi_cpu_softc { 73 device_t cpu_dev; 74 ACPI_HANDLE cpu_handle; 75 struct pcpu *cpu_pcpu; 76 uint32_t cpu_acpi_id; /* ACPI processor id */ 77 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 78 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 79 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 80 int cpu_cx_count; /* Number of valid Cx states. */ 81 int cpu_prev_sleep;/* Last idle sleep duration. */ 82 int cpu_features; /* Child driver supported features. */ 83 }; 84 85 struct acpi_cpu_device { 86 struct resource_list ad_rl; 87 }; 88 89 #define CPU_GET_REG(reg, width) \ 90 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 91 rman_get_bushandle((reg)), 0)) 92 #define CPU_SET_REG(reg, width, val) \ 93 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 94 rman_get_bushandle((reg)), 0, (val))) 95 96 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 97 98 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 99 100 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */ 101 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */ 102 103 #define PCI_VENDOR_INTEL 0x8086 104 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 105 #define PCI_REVISION_A_STEP 0 106 #define PCI_REVISION_B_STEP 1 107 #define PCI_REVISION_4E 2 108 #define PCI_REVISION_4M 3 109 110 /* Platform hardware resource information. */ 111 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 112 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 113 static int cpu_rid; /* Driver-wide resource id. */ 114 static int cpu_quirks; /* Indicate any hardware bugs. */ 115 116 /* Runtime state. */ 117 static int cpu_cx_count; /* Number of valid states */ 118 static int cpu_non_c3; /* Index of lowest non-C3 state. */ 119 static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 120 121 /* Values for sysctl. */ 122 static struct sysctl_ctx_list acpi_cpu_sysctl_ctx; 123 static struct sysctl_oid *acpi_cpu_sysctl_tree; 124 static int cpu_cx_lowest; 125 static char cpu_cx_supported[64]; 126 127 static device_t *cpu_devices; 128 static int cpu_ndevices; 129 static struct acpi_cpu_softc **cpu_softc; 130 ACPI_SERIAL_DECL(cpu, "ACPI CPU"); 131 132 static int acpi_cpu_probe(device_t dev); 133 static int acpi_cpu_attach(device_t dev); 134 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 135 uint32_t *cpu_id); 136 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child); 137 static device_t acpi_cpu_add_child(device_t dev, int order, const char *name, 138 int unit); 139 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index, 140 uintptr_t *result); 141 static int acpi_cpu_shutdown(device_t dev); 142 static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 143 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 144 static void acpi_cpu_startup(void *arg); 145 static void acpi_cpu_startup_cx(void); 146 static void acpi_cpu_idle(void); 147 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 148 static int acpi_cpu_quirks(struct acpi_cpu_softc *sc); 149 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 150 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 151 152 static device_method_t acpi_cpu_methods[] = { 153 /* Device interface */ 154 DEVMETHOD(device_probe, acpi_cpu_probe), 155 DEVMETHOD(device_attach, acpi_cpu_attach), 156 DEVMETHOD(device_detach, bus_generic_detach), 157 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 158 DEVMETHOD(device_suspend, bus_generic_suspend), 159 DEVMETHOD(device_resume, bus_generic_resume), 160 161 /* Bus interface */ 162 DEVMETHOD(bus_add_child, acpi_cpu_add_child), 163 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar), 164 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist), 165 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 166 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 167 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 168 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 169 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 170 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 171 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 172 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 173 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 174 175 {0, 0} 176 }; 177 178 static driver_t acpi_cpu_driver = { 179 "cpu", 180 acpi_cpu_methods, 181 sizeof(struct acpi_cpu_softc), 182 }; 183 184 static devclass_t acpi_cpu_devclass; 185 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 186 MODULE_DEPEND(cpu, acpi, 1, 1, 1); 187 188 static int 189 acpi_cpu_probe(device_t dev) 190 { 191 int acpi_id, cpu_id; 192 ACPI_BUFFER buf; 193 ACPI_HANDLE handle; 194 ACPI_OBJECT *obj; 195 ACPI_STATUS status; 196 197 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 198 return (ENXIO); 199 200 handle = acpi_get_handle(dev); 201 if (cpu_softc == NULL) 202 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 203 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 204 205 /* Get our Processor object. */ 206 buf.Pointer = NULL; 207 buf.Length = ACPI_ALLOCATE_BUFFER; 208 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 209 if (ACPI_FAILURE(status)) { 210 device_printf(dev, "probe failed to get Processor obj - %s\n", 211 AcpiFormatException(status)); 212 return (ENXIO); 213 } 214 obj = (ACPI_OBJECT *)buf.Pointer; 215 if (obj->Type != ACPI_TYPE_PROCESSOR) { 216 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 217 AcpiOsFree(obj); 218 return (ENXIO); 219 } 220 221 /* 222 * Find the processor associated with our unit. We could use the 223 * ProcId as a key, however, some boxes do not have the same values 224 * in their Processor object as the ProcId values in the MADT. 225 */ 226 acpi_id = obj->Processor.ProcId; 227 AcpiOsFree(obj); 228 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 229 return (ENXIO); 230 231 /* 232 * Check if we already probed this processor. We scan the bus twice 233 * so it's possible we've already seen this one. 234 */ 235 if (cpu_softc[cpu_id] != NULL) 236 return (ENXIO); 237 238 /* Mark this processor as in-use and save our derived id for attach. */ 239 cpu_softc[cpu_id] = (void *)1; 240 acpi_set_magic(dev, cpu_id); 241 device_set_desc(dev, "ACPI CPU"); 242 243 return (0); 244 } 245 246 static int 247 acpi_cpu_attach(device_t dev) 248 { 249 ACPI_BUFFER buf; 250 ACPI_OBJECT arg, *obj; 251 ACPI_OBJECT_LIST arglist; 252 struct pcpu *pcpu_data; 253 struct acpi_cpu_softc *sc; 254 struct acpi_softc *acpi_sc; 255 ACPI_STATUS status; 256 u_int features; 257 int cpu_id, drv_count, i; 258 driver_t **drivers; 259 uint32_t cap_set[3]; 260 261 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 262 263 sc = device_get_softc(dev); 264 sc->cpu_dev = dev; 265 sc->cpu_handle = acpi_get_handle(dev); 266 cpu_id = acpi_get_magic(dev); 267 cpu_softc[cpu_id] = sc; 268 pcpu_data = pcpu_find(cpu_id); 269 pcpu_data->pc_device = dev; 270 sc->cpu_pcpu = pcpu_data; 271 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd; 272 cpu_cst_cnt = AcpiGbl_FADT->CstCnt; 273 274 buf.Pointer = NULL; 275 buf.Length = ACPI_ALLOCATE_BUFFER; 276 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 277 if (ACPI_FAILURE(status)) { 278 device_printf(dev, "attach failed to get Processor obj - %s\n", 279 AcpiFormatException(status)); 280 return (ENXIO); 281 } 282 obj = (ACPI_OBJECT *)buf.Pointer; 283 sc->cpu_p_blk = obj->Processor.PblkAddress; 284 sc->cpu_p_blk_len = obj->Processor.PblkLength; 285 sc->cpu_acpi_id = obj->Processor.ProcId; 286 AcpiOsFree(obj); 287 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 288 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 289 290 acpi_sc = acpi_device_get_parent_softc(dev); 291 sysctl_ctx_init(&acpi_cpu_sysctl_ctx); 292 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx, 293 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu", 294 CTLFLAG_RD, 0, ""); 295 296 /* 297 * Before calling any CPU methods, collect child driver feature hints 298 * and notify ACPI of them. We support unified SMP power control 299 * so advertise this ourselves. Note this is not the same as independent 300 * SMP control where each CPU can have different settings. 301 */ 302 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3; 303 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) { 304 for (i = 0; i < drv_count; i++) { 305 if (ACPI_GET_FEATURES(drivers[i], &features) == 0) 306 sc->cpu_features |= features; 307 } 308 free(drivers, M_TEMP); 309 } 310 311 /* 312 * CPU capabilities are specified as a buffer of 32-bit integers: 313 * revision, count, and one or more capabilities. The revision of 314 * "1" is not specified anywhere but seems to match Linux. We should 315 * also support _OSC here. 316 */ 317 if (sc->cpu_features) { 318 arglist.Pointer = &arg; 319 arglist.Count = 1; 320 arg.Type = ACPI_TYPE_BUFFER; 321 arg.Buffer.Length = sizeof(cap_set); 322 arg.Buffer.Pointer = (uint8_t *)cap_set; 323 cap_set[0] = 1; /* revision */ 324 cap_set[1] = 1; /* number of capabilities integers */ 325 cap_set[2] = sc->cpu_features; 326 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL); 327 } 328 329 /* 330 * Probe for Cx state support. If it isn't present, free up unused 331 * resources. 332 */ 333 if (acpi_cpu_cx_probe(sc) == 0) { 334 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 335 acpi_cpu_notify, sc); 336 if (device_get_unit(dev) == 0) 337 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL); 338 } else 339 sysctl_ctx_free(&acpi_cpu_sysctl_ctx); 340 341 /* Finally, call identify and probe/attach for child devices. */ 342 bus_generic_probe(dev); 343 bus_generic_attach(dev); 344 345 return (0); 346 } 347 348 /* 349 * Find the nth present CPU and return its pc_cpuid as well as set the 350 * pc_acpi_id from the most reliable source. 351 */ 352 static int 353 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 354 { 355 struct pcpu *pcpu_data; 356 uint32_t i; 357 358 KASSERT(acpi_id != NULL, ("Null acpi_id")); 359 KASSERT(cpu_id != NULL, ("Null cpu_id")); 360 for (i = 0; i <= mp_maxid; i++) { 361 if (CPU_ABSENT(i)) 362 continue; 363 pcpu_data = pcpu_find(i); 364 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 365 if (idx-- == 0) { 366 /* 367 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 368 * override it with the value from the ASL. Otherwise, if the 369 * two don't match, prefer the MADT-derived value. Finally, 370 * return the pc_cpuid to reference this processor. 371 */ 372 if (pcpu_data->pc_acpi_id == 0xffffffff) 373 pcpu_data->pc_acpi_id = *acpi_id; 374 else if (pcpu_data->pc_acpi_id != *acpi_id) 375 *acpi_id = pcpu_data->pc_acpi_id; 376 *cpu_id = pcpu_data->pc_cpuid; 377 return (0); 378 } 379 } 380 381 return (ESRCH); 382 } 383 384 static struct resource_list * 385 acpi_cpu_get_rlist(device_t dev, device_t child) 386 { 387 struct acpi_cpu_device *ad; 388 389 ad = device_get_ivars(child); 390 if (ad == NULL) 391 return (NULL); 392 return (&ad->ad_rl); 393 } 394 395 static device_t 396 acpi_cpu_add_child(device_t dev, int order, const char *name, int unit) 397 { 398 struct acpi_cpu_device *ad; 399 device_t child; 400 401 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL) 402 return (NULL); 403 404 resource_list_init(&ad->ad_rl); 405 406 child = device_add_child_ordered(dev, order, name, unit); 407 if (child != NULL) 408 device_set_ivars(child, ad); 409 else 410 free(ad, M_TEMP); 411 return (child); 412 } 413 414 static int 415 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 416 { 417 struct acpi_cpu_softc *sc; 418 419 sc = device_get_softc(dev); 420 switch (index) { 421 case ACPI_IVAR_HANDLE: 422 *result = (uintptr_t)sc->cpu_handle; 423 break; 424 case CPU_IVAR_PCPU: 425 *result = (uintptr_t)sc->cpu_pcpu; 426 break; 427 default: 428 return (ENOENT); 429 } 430 return (0); 431 } 432 433 static int 434 acpi_cpu_shutdown(device_t dev) 435 { 436 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 437 438 /* Allow children to shutdown first. */ 439 bus_generic_shutdown(dev); 440 441 /* Disable any entry to the idle function. */ 442 cpu_cx_count = 0; 443 444 /* Signal and wait for all processors to exit acpi_cpu_idle(). */ 445 smp_rendezvous(NULL, NULL, NULL, NULL); 446 447 return_VALUE (0); 448 } 449 450 static int 451 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 452 { 453 ACPI_GENERIC_ADDRESS gas; 454 struct acpi_cx *cx_ptr; 455 int error; 456 457 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 458 459 /* 460 * Bus mastering arbitration control is needed to keep caches coherent 461 * while sleeping in C3. If it's not present but a working flush cache 462 * instruction is present, flush the caches before entering C3 instead. 463 * Otherwise, just disable C3 completely. 464 */ 465 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) { 466 if (AcpiGbl_FADT->WbInvd && AcpiGbl_FADT->WbInvdFlush == 0) { 467 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 468 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 469 "acpi_cpu%d: no BM control, using flush cache method\n", 470 device_get_unit(sc->cpu_dev))); 471 } else { 472 cpu_quirks |= CPU_QUIRK_NO_C3; 473 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 474 "acpi_cpu%d: no BM control, C3 not available\n", 475 device_get_unit(sc->cpu_dev))); 476 } 477 } 478 479 /* 480 * First, check for the ACPI 2.0 _CST sleep states object. 481 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3. 482 */ 483 sc->cpu_cx_count = 0; 484 error = acpi_cpu_cx_cst(sc); 485 if (error != 0) { 486 cx_ptr = sc->cpu_cx_states; 487 488 /* C1 has been required since just after ACPI 1.0 */ 489 cx_ptr->type = ACPI_STATE_C1; 490 cx_ptr->trans_lat = 0; 491 cpu_non_c3 = 0; 492 cx_ptr++; 493 sc->cpu_cx_count++; 494 495 /* 496 * The spec says P_BLK must be 6 bytes long. However, some systems 497 * use it to indicate a fractional set of features present so we 498 * take 5 as C2. Some may also have a value of 7 to indicate 499 * another C3 but most use _CST for this (as required) and having 500 * "only" C1-C3 is not a hardship. 501 */ 502 if (sc->cpu_p_blk_len < 5) 503 goto done; 504 505 /* Validate and allocate resources for C2 (P_LVL2). */ 506 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 507 gas.RegisterBitWidth = 8; 508 if (AcpiGbl_FADT->Plvl2Lat <= 100) { 509 gas.Address = sc->cpu_p_blk + 4; 510 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &cpu_rid, &gas, 511 &cx_ptr->p_lvlx); 512 if (cx_ptr->p_lvlx != NULL) { 513 cpu_rid++; 514 cx_ptr->type = ACPI_STATE_C2; 515 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat; 516 cpu_non_c3 = 1; 517 cx_ptr++; 518 sc->cpu_cx_count++; 519 } 520 } 521 if (sc->cpu_p_blk_len < 6) 522 goto done; 523 524 /* Validate and allocate resources for C3 (P_LVL3). */ 525 if (AcpiGbl_FADT->Plvl3Lat <= 1000 && 526 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) { 527 gas.Address = sc->cpu_p_blk + 5; 528 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &cpu_rid, &gas, 529 &cx_ptr->p_lvlx); 530 if (cx_ptr->p_lvlx != NULL) { 531 cpu_rid++; 532 cx_ptr->type = ACPI_STATE_C3; 533 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat; 534 cx_ptr++; 535 sc->cpu_cx_count++; 536 } 537 } 538 } 539 540 done: 541 /* If no valid registers were found, don't attach. */ 542 if (sc->cpu_cx_count == 0) 543 return (ENXIO); 544 545 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 546 sc->cpu_prev_sleep = 1000000; 547 548 return (0); 549 } 550 551 /* 552 * Parse a _CST package and set up its Cx states. Since the _CST object 553 * can change dynamically, our notify handler may call this function 554 * to clean up and probe the new _CST package. 555 */ 556 static int 557 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 558 { 559 struct acpi_cx *cx_ptr; 560 ACPI_STATUS status; 561 ACPI_BUFFER buf; 562 ACPI_OBJECT *top; 563 ACPI_OBJECT *pkg; 564 uint32_t count; 565 int i; 566 567 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 568 569 buf.Pointer = NULL; 570 buf.Length = ACPI_ALLOCATE_BUFFER; 571 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 572 if (ACPI_FAILURE(status)) 573 return (ENXIO); 574 575 /* _CST is a package with a count and at least one Cx package. */ 576 top = (ACPI_OBJECT *)buf.Pointer; 577 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 578 device_printf(sc->cpu_dev, "Invalid _CST package\n"); 579 AcpiOsFree(buf.Pointer); 580 return (ENXIO); 581 } 582 if (count != top->Package.Count - 1) { 583 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n", 584 count, top->Package.Count - 1); 585 count = top->Package.Count - 1; 586 } 587 if (count > MAX_CX_STATES) { 588 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 589 count = MAX_CX_STATES; 590 } 591 592 /* Set up all valid states. */ 593 sc->cpu_cx_count = 0; 594 cx_ptr = sc->cpu_cx_states; 595 for (i = 0; i < count; i++) { 596 pkg = &top->Package.Elements[i + 1]; 597 if (!ACPI_PKG_VALID(pkg, 4) || 598 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 599 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 600 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 601 602 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n"); 603 continue; 604 } 605 606 /* Validate the state to see if we should use it. */ 607 switch (cx_ptr->type) { 608 case ACPI_STATE_C1: 609 cpu_non_c3 = i; 610 cx_ptr++; 611 sc->cpu_cx_count++; 612 continue; 613 case ACPI_STATE_C2: 614 if (cx_ptr->trans_lat > 100) { 615 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 616 "acpi_cpu%d: C2[%d] not available.\n", 617 device_get_unit(sc->cpu_dev), i)); 618 continue; 619 } 620 cpu_non_c3 = i; 621 break; 622 case ACPI_STATE_C3: 623 default: 624 if (cx_ptr->trans_lat > 1000 || 625 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 626 627 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 628 "acpi_cpu%d: C3[%d] not available.\n", 629 device_get_unit(sc->cpu_dev), i)); 630 continue; 631 } 632 break; 633 } 634 635 #ifdef notyet 636 /* Free up any previous register. */ 637 if (cx_ptr->p_lvlx != NULL) { 638 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 639 cx_ptr->p_lvlx = NULL; 640 } 641 #endif 642 643 /* Allocate the control register for C2 or C3. */ 644 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &cpu_rid, 645 &cx_ptr->p_lvlx); 646 if (cx_ptr->p_lvlx) { 647 cpu_rid++; 648 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 649 "acpi_cpu%d: Got C%d - %d latency\n", 650 device_get_unit(sc->cpu_dev), cx_ptr->type, 651 cx_ptr->trans_lat)); 652 cx_ptr++; 653 sc->cpu_cx_count++; 654 } 655 } 656 AcpiOsFree(buf.Pointer); 657 658 return (0); 659 } 660 661 /* 662 * Call this *after* all CPUs have been attached. 663 */ 664 static void 665 acpi_cpu_startup(void *arg) 666 { 667 struct acpi_cpu_softc *sc; 668 int count, i; 669 670 /* Get set of CPU devices */ 671 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 672 673 /* Check for quirks via the first CPU device. */ 674 sc = device_get_softc(cpu_devices[0]); 675 acpi_cpu_quirks(sc); 676 677 /* 678 * Make sure all the processors' Cx counts match. We should probably 679 * also check the contents of each. However, no known systems have 680 * non-matching Cx counts so we'll deal with this later. 681 */ 682 count = MAX_CX_STATES; 683 for (i = 0; i < cpu_ndevices; i++) { 684 sc = device_get_softc(cpu_devices[i]); 685 count = min(sc->cpu_cx_count, count); 686 } 687 cpu_cx_count = count; 688 689 /* Perform Cx final initialization. */ 690 sc = device_get_softc(cpu_devices[0]); 691 if (cpu_cx_count > 0) 692 acpi_cpu_startup_cx(); 693 } 694 695 static void 696 acpi_cpu_startup_cx() 697 { 698 struct acpi_cpu_softc *sc; 699 struct sbuf sb; 700 int i; 701 702 /* 703 * Set up the list of Cx states, eliminating C3 states by truncating 704 * cpu_cx_count if quirks indicate C3 is not usable. 705 */ 706 sc = device_get_softc(cpu_devices[0]); 707 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN); 708 for (i = 0; i < cpu_cx_count; i++) { 709 if ((cpu_quirks & CPU_QUIRK_NO_C3) == 0 || 710 sc->cpu_cx_states[i].type != ACPI_STATE_C3) 711 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 712 else 713 cpu_cx_count = i; 714 } 715 sbuf_trim(&sb); 716 sbuf_finish(&sb); 717 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx, 718 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 719 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported, 720 0, "Cx/microsecond values for supported Cx states"); 721 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 722 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 723 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 724 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A", 725 "lowest Cx sleep state to use"); 726 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 727 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 728 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 729 NULL, 0, acpi_cpu_usage_sysctl, "A", 730 "percent usage for each Cx state"); 731 732 #ifdef notyet 733 /* Signal platform that we can handle _CST notification. */ 734 if (cpu_cst_cnt != 0) { 735 ACPI_LOCK(acpi); 736 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 737 ACPI_UNLOCK(acpi); 738 } 739 #endif 740 741 /* Take over idling from cpu_idle_default(). */ 742 cpu_idle_hook = acpi_cpu_idle; 743 } 744 745 /* 746 * Idle the CPU in the lowest state possible. This function is called with 747 * interrupts disabled. Note that once it re-enables interrupts, a task 748 * switch can occur so do not access shared data (i.e. the softc) after 749 * interrupts are re-enabled. 750 */ 751 static void 752 acpi_cpu_idle() 753 { 754 struct acpi_cpu_softc *sc; 755 struct acpi_cx *cx_next; 756 uint32_t start_time, end_time; 757 int bm_active, cx_next_idx, i; 758 759 /* If disabled, return immediately. */ 760 if (cpu_cx_count == 0) { 761 ACPI_ENABLE_IRQS(); 762 return; 763 } 764 765 /* 766 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 767 * since there is no ACPI processor object for this CPU. This occurs 768 * for logical CPUs in the HTT case. 769 */ 770 sc = cpu_softc[PCPU_GET(cpuid)]; 771 if (sc == NULL) { 772 acpi_cpu_c1(); 773 return; 774 } 775 776 /* 777 * If we slept 100 us or more, use the lowest Cx state. Otherwise, 778 * find the lowest state that has a latency less than or equal to 779 * the length of our last sleep. 780 */ 781 cx_next_idx = cpu_cx_lowest; 782 if (sc->cpu_prev_sleep < 100) 783 for (i = cpu_cx_lowest; i >= 0; i--) 784 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) { 785 cx_next_idx = i; 786 break; 787 } 788 789 /* 790 * Check for bus master activity. If there was activity, clear 791 * the bit and use the lowest non-C3 state. Note that the USB 792 * driver polling for new devices keeps this bit set all the 793 * time if USB is loaded. 794 */ 795 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 796 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active, 797 ACPI_MTX_DO_NOT_LOCK); 798 if (bm_active != 0) { 799 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1, 800 ACPI_MTX_DO_NOT_LOCK); 801 cx_next_idx = min(cx_next_idx, cpu_non_c3); 802 } 803 } 804 805 /* Select the next state and update statistics. */ 806 cx_next = &sc->cpu_cx_states[cx_next_idx]; 807 cpu_cx_stats[cx_next_idx]++; 808 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 809 810 /* 811 * Execute HLT (or equivalent) and wait for an interrupt. We can't 812 * calculate the time spent in C1 since the place we wake up is an 813 * ISR. Assume we slept one quantum and return. 814 */ 815 if (cx_next->type == ACPI_STATE_C1) { 816 sc->cpu_prev_sleep = 1000000 / hz; 817 acpi_cpu_c1(); 818 return; 819 } 820 821 /* 822 * For C3, disable bus master arbitration and enable bus master wake 823 * if BM control is available, otherwise flush the CPU cache. 824 */ 825 if (cx_next->type == ACPI_STATE_C3) { 826 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 827 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK); 828 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1, 829 ACPI_MTX_DO_NOT_LOCK); 830 } else 831 ACPI_FLUSH_CPU_CACHE(); 832 } 833 834 /* 835 * Read from P_LVLx to enter C2(+), checking time spent asleep. 836 * Use the ACPI timer for measuring sleep time. Since we need to 837 * get the time very close to the CPU start/stop clock logic, this 838 * is the only reliable time source. 839 */ 840 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk); 841 CPU_GET_REG(cx_next->p_lvlx, 1); 842 843 /* 844 * Read the end time twice. Since it may take an arbitrary time 845 * to enter the idle state, the first read may be executed before 846 * the processor has stopped. Doing it again provides enough 847 * margin that we are certain to have a correct value. 848 */ 849 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 850 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 851 852 /* Enable bus master arbitration and disable bus master wakeup. */ 853 if (cx_next->type == ACPI_STATE_C3 && 854 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 855 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK); 856 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK); 857 } 858 859 /* Find the actual time asleep in microseconds, minus overhead. */ 860 end_time = acpi_TimerDelta(end_time, start_time); 861 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat; 862 ACPI_ENABLE_IRQS(); 863 } 864 865 /* 866 * Re-evaluate the _CST object when we are notified that it changed. 867 * 868 * XXX Re-evaluation disabled until locking is done. 869 */ 870 static void 871 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 872 { 873 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 874 875 if (notify != ACPI_NOTIFY_CX_STATES) 876 return; 877 878 device_printf(sc->cpu_dev, "Cx states changed\n"); 879 /* acpi_cpu_cx_cst(sc); */ 880 } 881 882 static int 883 acpi_cpu_quirks(struct acpi_cpu_softc *sc) 884 { 885 device_t acpi_dev; 886 887 /* 888 * C3 on multiple CPUs requires using the expensive flush cache 889 * instruction. 890 */ 891 if (mp_ncpus > 1) 892 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 893 894 /* Look for various quirks of the PIIX4 part. */ 895 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 896 if (acpi_dev != NULL) { 897 switch (pci_get_revid(acpi_dev)) { 898 /* 899 * Disable C3 support for all PIIX4 chipsets. Some of these parts 900 * do not report the BMIDE status to the BM status register and 901 * others have a livelock bug if Type-F DMA is enabled. Linux 902 * works around the BMIDE bug by reading the BM status directly 903 * but we take the simpler approach of disabling C3 for these 904 * parts. 905 * 906 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 907 * Livelock") from the January 2002 PIIX4 specification update. 908 * Applies to all PIIX4 models. 909 */ 910 case PCI_REVISION_4E: 911 case PCI_REVISION_4M: 912 cpu_quirks |= CPU_QUIRK_NO_C3; 913 break; 914 default: 915 break; 916 } 917 } 918 919 return (0); 920 } 921 922 static int 923 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 924 { 925 struct sbuf sb; 926 char buf[128]; 927 int i; 928 uintmax_t fract, sum, whole; 929 930 sum = 0; 931 for (i = 0; i < cpu_cx_count; i++) 932 sum += cpu_cx_stats[i]; 933 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 934 for (i = 0; i < cpu_cx_count; i++) { 935 if (sum > 0) { 936 whole = (uintmax_t)cpu_cx_stats[i] * 100; 937 fract = (whole % sum) * 100; 938 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 939 (u_int)(fract / sum)); 940 } else 941 sbuf_printf(&sb, "0%% "); 942 } 943 sbuf_trim(&sb); 944 sbuf_finish(&sb); 945 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 946 sbuf_delete(&sb); 947 948 return (0); 949 } 950 951 static int 952 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 953 { 954 struct acpi_cpu_softc *sc; 955 char state[8]; 956 int val, error, i; 957 958 sc = device_get_softc(cpu_devices[0]); 959 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 960 error = sysctl_handle_string(oidp, state, sizeof(state), req); 961 if (error != 0 || req->newptr == NULL) 962 return (error); 963 if (strlen(state) < 2 || toupper(state[0]) != 'C') 964 return (EINVAL); 965 val = (int) strtol(state + 1, NULL, 10) - 1; 966 if (val < 0 || val > cpu_cx_count - 1) 967 return (EINVAL); 968 969 ACPI_SERIAL_BEGIN(cpu); 970 cpu_cx_lowest = val; 971 972 /* If not disabling, cache the new lowest non-C3 state. */ 973 cpu_non_c3 = 0; 974 for (i = cpu_cx_lowest; i >= 0; i--) { 975 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 976 cpu_non_c3 = i; 977 break; 978 } 979 } 980 981 /* Reset the statistics counters. */ 982 bzero(cpu_cx_stats, sizeof(cpu_cx_stats)); 983 ACPI_SERIAL_END(cpu); 984 985 return (0); 986 } 987