1 /*- 2 * Copyright (c) 2003 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/module.h> 37 #include <sys/pcpu.h> 38 #include <sys/power.h> 39 #include <sys/proc.h> 40 #include <sys/sbuf.h> 41 #include <sys/smp.h> 42 43 #include <dev/pci/pcivar.h> 44 #include <machine/atomic.h> 45 #include <machine/bus.h> 46 #ifdef __ia64__ 47 #include <machine/pal.h> 48 #endif 49 #include <sys/rman.h> 50 51 #include "acpi.h" 52 #include <dev/acpica/acpivar.h> 53 54 /* 55 * Support for ACPI Processor devices, including ACPI 2.0 throttling 56 * and C[1-3] sleep states. 57 * 58 * TODO: implement scans of all CPUs to be sure all Cx states are 59 * equivalent. 60 */ 61 62 /* Hooks for the ACPI CA debugging infrastructure */ 63 #define _COMPONENT ACPI_PROCESSOR 64 ACPI_MODULE_NAME("PROCESSOR") 65 66 struct acpi_cx { 67 struct resource *p_lvlx; /* Register to read to enter state. */ 68 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 69 uint32_t trans_lat; /* Transition latency (usec). */ 70 uint32_t power; /* Power consumed (mW). */ 71 }; 72 #define MAX_CX_STATES 8 73 74 struct acpi_cpu_softc { 75 device_t cpu_dev; 76 ACPI_HANDLE cpu_handle; 77 uint32_t acpi_id; /* ACPI processor id */ 78 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 79 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 80 struct resource *cpu_p_cnt; /* Throttling control register */ 81 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 82 int cpu_cx_count; /* Number of valid Cx states. */ 83 int cpu_prev_sleep;/* Last idle sleep duration. */ 84 }; 85 86 #define CPU_GET_REG(reg, width) \ 87 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 88 rman_get_bushandle((reg)), 0)) 89 #define CPU_SET_REG(reg, width, val) \ 90 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 91 rman_get_bushandle((reg)), 0, (val))) 92 93 /* 94 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and 95 * reported to the user in tenths of a percent. 96 */ 97 static uint32_t cpu_duty_offset; 98 static uint32_t cpu_duty_width; 99 #define CPU_MAX_SPEED (1 << cpu_duty_width) 100 #define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED) 101 #define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \ 102 (CPU_SPEED_PERCENT(x) % 10) 103 #define CPU_P_CNT_THT_EN (1<<4) 104 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 105 106 #define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */ 107 #define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 108 109 #define CPU_QUIRK_NO_C3 0x0001 /* C3-type states are not usable. */ 110 #define CPU_QUIRK_NO_THROTTLE 0x0002 /* Throttling is not usable. */ 111 112 #define PCI_VENDOR_INTEL 0x8086 113 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 114 #define PCI_REVISION_A_STEP 0 115 #define PCI_REVISION_B_STEP 1 116 #define PCI_REVISION_4E 2 117 #define PCI_REVISION_4M 3 118 119 /* Platform hardware resource information. */ 120 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 121 static uint8_t cpu_pstate_cnt;/* Register to take over throttling. */ 122 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 123 static int cpu_rid; /* Driver-wide resource id. */ 124 static int cpu_quirks; /* Indicate any hardware bugs. */ 125 126 /* Runtime state. */ 127 static int cpu_cx_count; /* Number of valid states */ 128 static int cpu_non_c3; /* Index of lowest non-C3 state. */ 129 static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 130 131 /* Values for sysctl. */ 132 static uint32_t cpu_throttle_state; 133 static uint32_t cpu_throttle_max; 134 static int cpu_cx_lowest; 135 static char cpu_cx_supported[64]; 136 137 static device_t *cpu_devices; 138 static int cpu_ndevices; 139 static struct acpi_cpu_softc **cpu_softc; 140 141 static struct sysctl_ctx_list acpi_cpu_sysctl_ctx; 142 static struct sysctl_oid *acpi_cpu_sysctl_tree; 143 144 static int acpi_cpu_probe(device_t dev); 145 static int acpi_cpu_attach(device_t dev); 146 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 147 uint32_t *cpu_id); 148 static int acpi_cpu_shutdown(device_t dev); 149 static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc); 150 static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 151 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 152 static void acpi_cpu_startup(void *arg); 153 static void acpi_cpu_startup_throttling(void); 154 static void acpi_cpu_startup_cx(void); 155 static void acpi_cpu_throttle_set(uint32_t speed); 156 static void acpi_cpu_idle(void); 157 static void acpi_cpu_c1(void); 158 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 159 static int acpi_cpu_quirks(struct acpi_cpu_softc *sc); 160 static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS); 161 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 162 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 163 164 static device_method_t acpi_cpu_methods[] = { 165 /* Device interface */ 166 DEVMETHOD(device_probe, acpi_cpu_probe), 167 DEVMETHOD(device_attach, acpi_cpu_attach), 168 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 169 170 {0, 0} 171 }; 172 173 static driver_t acpi_cpu_driver = { 174 "cpu", 175 acpi_cpu_methods, 176 sizeof(struct acpi_cpu_softc), 177 }; 178 179 static devclass_t acpi_cpu_devclass; 180 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 181 MODULE_DEPEND(cpu, acpi, 1, 1, 1); 182 183 static int 184 acpi_cpu_probe(device_t dev) 185 { 186 int acpi_id, cpu_id, cx_count; 187 ACPI_BUFFER buf; 188 ACPI_HANDLE handle; 189 char msg[32]; 190 ACPI_OBJECT *obj; 191 ACPI_STATUS status; 192 193 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 194 return (ENXIO); 195 196 handle = acpi_get_handle(dev); 197 if (cpu_softc == NULL) 198 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 199 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 200 201 /* Get our Processor object. */ 202 buf.Pointer = NULL; 203 buf.Length = ACPI_ALLOCATE_BUFFER; 204 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 205 if (ACPI_FAILURE(status)) { 206 device_printf(dev, "probe failed to get Processor obj - %s\n", 207 AcpiFormatException(status)); 208 return (ENXIO); 209 } 210 obj = (ACPI_OBJECT *)buf.Pointer; 211 if (obj->Type != ACPI_TYPE_PROCESSOR) { 212 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 213 AcpiOsFree(obj); 214 return (ENXIO); 215 } 216 217 /* 218 * Find the processor associated with our unit. We could use the 219 * ProcId as a key, however, some boxes do not have the same values 220 * in their Processor object as the ProcId values in the MADT. 221 */ 222 acpi_id = obj->Processor.ProcId; 223 AcpiOsFree(obj); 224 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 225 return (ENXIO); 226 227 /* 228 * Check if we already probed this processor. We scan the bus twice 229 * so it's possible we've already seen this one. 230 */ 231 if (cpu_softc[cpu_id] != NULL) 232 return (ENXIO); 233 234 /* Get a count of Cx states for our device string. */ 235 cx_count = 0; 236 buf.Pointer = NULL; 237 buf.Length = ACPI_ALLOCATE_BUFFER; 238 status = AcpiEvaluateObject(handle, "_CST", NULL, &buf); 239 if (ACPI_SUCCESS(status)) { 240 obj = (ACPI_OBJECT *)buf.Pointer; 241 if (ACPI_PKG_VALID(obj, 2)) 242 acpi_PkgInt32(obj, 0, &cx_count); 243 AcpiOsFree(obj); 244 } else { 245 if (AcpiGbl_FADT->Plvl2Lat <= 100) 246 cx_count++; 247 if (AcpiGbl_FADT->Plvl3Lat <= 1000) 248 cx_count++; 249 if (cx_count > 0) 250 cx_count++; 251 } 252 if (cx_count > 0) 253 snprintf(msg, sizeof(msg), "ACPI CPU (%d Cx states)", cx_count); 254 else 255 strlcpy(msg, "ACPI CPU", sizeof(msg)); 256 device_set_desc_copy(dev, msg); 257 258 /* Mark this processor as in-use and save our derived id for attach. */ 259 cpu_softc[cpu_id] = (void *)1; 260 acpi_set_magic(dev, cpu_id); 261 262 return (0); 263 } 264 265 static int 266 acpi_cpu_attach(device_t dev) 267 { 268 ACPI_BUFFER buf; 269 ACPI_OBJECT *obj; 270 struct acpi_cpu_softc *sc; 271 struct acpi_softc *acpi_sc; 272 ACPI_STATUS status; 273 int thr_ret, cx_ret; 274 275 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 276 277 ACPI_ASSERTLOCK; 278 279 sc = device_get_softc(dev); 280 sc->cpu_dev = dev; 281 sc->cpu_handle = acpi_get_handle(dev); 282 cpu_softc[acpi_get_magic(dev)] = sc; 283 284 buf.Pointer = NULL; 285 buf.Length = ACPI_ALLOCATE_BUFFER; 286 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 287 if (ACPI_FAILURE(status)) { 288 device_printf(dev, "attach failed to get Processor obj - %s\n", 289 AcpiFormatException(status)); 290 return (ENXIO); 291 } 292 obj = (ACPI_OBJECT *)buf.Pointer; 293 sc->cpu_p_blk = obj->Processor.PblkAddress; 294 sc->cpu_p_blk_len = obj->Processor.PblkLength; 295 sc->acpi_id = obj->Processor.ProcId; 296 AcpiOsFree(obj); 297 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 298 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 299 300 acpi_sc = acpi_device_get_parent_softc(dev); 301 sysctl_ctx_init(&acpi_cpu_sysctl_ctx); 302 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx, 303 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), 304 OID_AUTO, "cpu", CTLFLAG_RD, 0, ""); 305 306 /* If this is the first device probed, check for quirks. */ 307 if (device_get_unit(dev) == 0) 308 acpi_cpu_quirks(sc); 309 310 /* 311 * Probe for throttling and Cx state support. 312 * If none of these is present, free up unused resources. 313 */ 314 thr_ret = acpi_cpu_throttle_probe(sc); 315 cx_ret = acpi_cpu_cx_probe(sc); 316 if (thr_ret == 0 || cx_ret == 0) { 317 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 318 acpi_cpu_notify, sc); 319 if (device_get_unit(dev) == 0) 320 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL); 321 } else { 322 sysctl_ctx_free(&acpi_cpu_sysctl_ctx); 323 } 324 325 return_VALUE (0); 326 } 327 328 /* 329 * Find the nth present CPU and return its pc_cpuid as well as set the 330 * pc_acpi_id from the most reliable source. 331 */ 332 static int 333 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 334 { 335 struct pcpu *pcpu_data; 336 uint32_t i; 337 338 KASSERT(acpi_id != NULL, ("Null acpi_id")); 339 KASSERT(cpu_id != NULL, ("Null cpu_id")); 340 for (i = 0; i <= mp_maxid; i++) { 341 if (CPU_ABSENT(i)) 342 continue; 343 pcpu_data = pcpu_find(i); 344 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 345 if (idx-- == 0) { 346 /* 347 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 348 * override it with the value from the ASL. Otherwise, if the 349 * two don't match, prefer the MADT-derived value. Finally, 350 * return the pc_cpuid to reference this processor. 351 */ 352 if (pcpu_data->pc_acpi_id == 0xffffffff) 353 pcpu_data->pc_acpi_id = *acpi_id; 354 else if (pcpu_data->pc_acpi_id != *acpi_id) 355 *acpi_id = pcpu_data->pc_acpi_id; 356 *cpu_id = pcpu_data->pc_cpuid; 357 return (0); 358 } 359 } 360 361 return (ESRCH); 362 } 363 364 static int 365 acpi_cpu_shutdown(device_t dev) 366 { 367 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 368 369 /* Disable any entry to the idle function. */ 370 cpu_cx_count = 0; 371 372 /* Signal and wait for all processors to exit acpi_cpu_idle(). */ 373 smp_rendezvous(NULL, NULL, NULL, NULL); 374 375 return_VALUE (0); 376 } 377 378 static int 379 acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc) 380 { 381 uint32_t duty_end; 382 ACPI_BUFFER buf; 383 ACPI_OBJECT obj; 384 ACPI_GENERIC_ADDRESS gas; 385 ACPI_STATUS status; 386 387 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 388 389 ACPI_ASSERTLOCK; 390 391 /* Get throttling parameters from the FADT. 0 means not supported. */ 392 if (device_get_unit(sc->cpu_dev) == 0) { 393 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd; 394 cpu_pstate_cnt = AcpiGbl_FADT->PstateCnt; 395 cpu_cst_cnt = AcpiGbl_FADT->CstCnt; 396 cpu_duty_offset = AcpiGbl_FADT->DutyOffset; 397 cpu_duty_width = AcpiGbl_FADT->DutyWidth; 398 } 399 if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0) 400 return (ENXIO); 401 402 /* Validate the duty offset/width. */ 403 duty_end = cpu_duty_offset + cpu_duty_width - 1; 404 if (duty_end > 31) { 405 device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n"); 406 return (ENXIO); 407 } 408 if (cpu_duty_offset <= 4 && duty_end >= 4) { 409 device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n"); 410 return (ENXIO); 411 } 412 413 /* 414 * If not present, fall back to using the processor's P_BLK to find 415 * the P_CNT register. 416 * 417 * Note that some systems seem to duplicate the P_BLK pointer 418 * across multiple CPUs, so not getting the resource is not fatal. 419 */ 420 buf.Pointer = &obj; 421 buf.Length = sizeof(obj); 422 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf); 423 if (ACPI_SUCCESS(status)) { 424 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) { 425 device_printf(sc->cpu_dev, "_PTC buffer too small\n"); 426 return (ENXIO); 427 } 428 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas)); 429 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 430 if (sc->cpu_p_cnt != NULL) { 431 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from _PTC\n", 432 device_get_unit(sc->cpu_dev))); 433 } 434 } 435 436 /* If _PTC not present or other failure, try the P_BLK. */ 437 if (sc->cpu_p_cnt == NULL) { 438 /* 439 * The spec says P_BLK must be 6 bytes long. However, some 440 * systems use it to indicate a fractional set of features 441 * present so we take anything >= 4. 442 */ 443 if (sc->cpu_p_blk_len < 4) 444 return (ENXIO); 445 gas.Address = sc->cpu_p_blk; 446 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 447 gas.RegisterBitWidth = 32; 448 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 449 if (sc->cpu_p_cnt != NULL) { 450 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from P_BLK\n", 451 device_get_unit(sc->cpu_dev))); 452 } else { 453 device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n"); 454 return (ENXIO); 455 } 456 } 457 cpu_rid++; 458 459 return (0); 460 } 461 462 static int 463 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 464 { 465 ACPI_GENERIC_ADDRESS gas; 466 struct acpi_cx *cx_ptr; 467 int error; 468 469 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 470 471 /* Bus mastering arbitration control is needed for C3. */ 472 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) { 473 cpu_quirks |= CPU_QUIRK_NO_C3; 474 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 475 "acpi_cpu%d: No BM control, C3 disabled\n", 476 device_get_unit(sc->cpu_dev))); 477 } 478 479 /* 480 * First, check for the ACPI 2.0 _CST sleep states object. 481 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3. 482 */ 483 sc->cpu_cx_count = 0; 484 error = acpi_cpu_cx_cst(sc); 485 if (error != 0) { 486 cx_ptr = sc->cpu_cx_states; 487 488 /* C1 has been required since just after ACPI 1.0 */ 489 cx_ptr->type = ACPI_STATE_C1; 490 cx_ptr->trans_lat = 0; 491 cpu_non_c3 = 0; 492 cx_ptr++; 493 sc->cpu_cx_count++; 494 495 /* 496 * The spec says P_BLK must be 6 bytes long. However, some systems 497 * use it to indicate a fractional set of features present so we 498 * take 5 as C2. Some may also have a value of 7 to indicate 499 * another C3 but most use _CST for this (as required) and having 500 * "only" C1-C3 is not a hardship. 501 */ 502 if (sc->cpu_p_blk_len < 5) 503 goto done; 504 505 /* Validate and allocate resources for C2 (P_LVL2). */ 506 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 507 gas.RegisterBitWidth = 8; 508 if (AcpiGbl_FADT->Plvl2Lat <= 100) { 509 gas.Address = sc->cpu_p_blk + 4; 510 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 511 if (cx_ptr->p_lvlx != NULL) { 512 cpu_rid++; 513 cx_ptr->type = ACPI_STATE_C2; 514 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat; 515 cpu_non_c3 = 1; 516 cx_ptr++; 517 sc->cpu_cx_count++; 518 } 519 } 520 if (sc->cpu_p_blk_len < 6) 521 goto done; 522 523 /* Validate and allocate resources for C3 (P_LVL3). */ 524 if (AcpiGbl_FADT->Plvl3Lat <= 1000 && 525 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) { 526 527 gas.Address = sc->cpu_p_blk + 5; 528 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 529 if (cx_ptr->p_lvlx != NULL) { 530 cpu_rid++; 531 cx_ptr->type = ACPI_STATE_C3; 532 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat; 533 cx_ptr++; 534 sc->cpu_cx_count++; 535 } 536 } 537 } 538 539 done: 540 /* If no valid registers were found, don't attach. */ 541 if (sc->cpu_cx_count == 0) 542 return (ENXIO); 543 544 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 545 sc->cpu_prev_sleep = 1000000; 546 547 return (0); 548 } 549 550 /* 551 * Parse a _CST package and set up its Cx states. Since the _CST object 552 * can change dynamically, our notify handler may call this function 553 * to clean up and probe the new _CST package. 554 */ 555 static int 556 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 557 { 558 struct acpi_cx *cx_ptr; 559 ACPI_STATUS status; 560 ACPI_BUFFER buf; 561 ACPI_OBJECT *top; 562 ACPI_OBJECT *pkg; 563 uint32_t count; 564 int i; 565 566 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 567 568 buf.Pointer = NULL; 569 buf.Length = ACPI_ALLOCATE_BUFFER; 570 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 571 if (ACPI_FAILURE(status)) 572 return (ENXIO); 573 574 /* _CST is a package with a count and at least one Cx package. */ 575 top = (ACPI_OBJECT *)buf.Pointer; 576 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 577 device_printf(sc->cpu_dev, "Invalid _CST package\n"); 578 AcpiOsFree(buf.Pointer); 579 return (ENXIO); 580 } 581 if (count != top->Package.Count - 1) { 582 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n", 583 count, top->Package.Count - 1); 584 count = top->Package.Count - 1; 585 } 586 if (count > MAX_CX_STATES) { 587 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 588 count = MAX_CX_STATES; 589 } 590 591 /* Set up all valid states. */ 592 sc->cpu_cx_count = 0; 593 cx_ptr = sc->cpu_cx_states; 594 for (i = 0; i < count; i++) { 595 pkg = &top->Package.Elements[i + 1]; 596 if (!ACPI_PKG_VALID(pkg, 4) || 597 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 598 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 599 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 600 601 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n"); 602 continue; 603 } 604 605 /* Validate the state to see if we should use it. */ 606 switch (cx_ptr->type) { 607 case ACPI_STATE_C1: 608 cpu_non_c3 = i; 609 cx_ptr++; 610 sc->cpu_cx_count++; 611 continue; 612 case ACPI_STATE_C2: 613 if (cx_ptr->trans_lat > 100) { 614 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 615 "acpi_cpu%d: C2[%d] not available.\n", 616 device_get_unit(sc->cpu_dev), i)); 617 continue; 618 } 619 cpu_non_c3 = i; 620 break; 621 case ACPI_STATE_C3: 622 default: 623 if (cx_ptr->trans_lat > 1000 || 624 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 625 626 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 627 "acpi_cpu%d: C3[%d] not available.\n", 628 device_get_unit(sc->cpu_dev), i)); 629 continue; 630 } 631 break; 632 } 633 634 #ifdef notyet 635 /* Free up any previous register. */ 636 if (cx_ptr->p_lvlx != NULL) { 637 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 638 cx_ptr->p_lvlx = NULL; 639 } 640 #endif 641 642 /* Allocate the control register for C2 or C3. */ 643 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cpu_rid, &cx_ptr->p_lvlx); 644 if (cx_ptr->p_lvlx != NULL) { 645 cpu_rid++; 646 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 647 "acpi_cpu%d: Got C%d - %d latency\n", 648 device_get_unit(sc->cpu_dev), cx_ptr->type, 649 cx_ptr->trans_lat)); 650 cx_ptr++; 651 sc->cpu_cx_count++; 652 } 653 } 654 AcpiOsFree(buf.Pointer); 655 656 return (0); 657 } 658 659 /* 660 * Call this *after* all CPUs have been attached. 661 */ 662 static void 663 acpi_cpu_startup(void *arg) 664 { 665 struct acpi_cpu_softc *sc; 666 int count, i; 667 668 /* Get set of CPU devices */ 669 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 670 671 /* 672 * Make sure all the processors' Cx counts match. We should probably 673 * also check the contents of each. However, no known systems have 674 * non-matching Cx counts so we'll deal with this later. 675 */ 676 count = MAX_CX_STATES; 677 for (i = 0; i < cpu_ndevices; i++) { 678 sc = device_get_softc(cpu_devices[i]); 679 count = min(sc->cpu_cx_count, count); 680 } 681 cpu_cx_count = count; 682 683 /* Perform throttling and Cx final initialization. */ 684 sc = device_get_softc(cpu_devices[0]); 685 if (sc->cpu_p_cnt != NULL) 686 acpi_cpu_startup_throttling(); 687 if (cpu_cx_count > 0) 688 acpi_cpu_startup_cx(); 689 } 690 691 /* 692 * Takes the ACPI lock to avoid fighting anyone over the SMI command 693 * port. 694 */ 695 static void 696 acpi_cpu_startup_throttling() 697 { 698 ACPI_LOCK_DECL; 699 700 /* Initialise throttling states */ 701 cpu_throttle_max = CPU_MAX_SPEED; 702 cpu_throttle_state = CPU_MAX_SPEED; 703 704 SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx, 705 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 706 OID_AUTO, "throttle_max", CTLFLAG_RD, 707 &cpu_throttle_max, 0, "maximum CPU speed"); 708 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 709 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 710 OID_AUTO, "throttle_state", 711 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_state, 712 0, acpi_cpu_throttle_sysctl, "I", "current CPU speed"); 713 714 /* If ACPI 2.0+, signal platform that we are taking over throttling. */ 715 ACPI_LOCK; 716 if (cpu_pstate_cnt != 0) 717 AcpiOsWritePort(cpu_smi_cmd, cpu_pstate_cnt, 8); 718 719 /* Set initial speed to maximum. */ 720 acpi_cpu_throttle_set(cpu_throttle_max); 721 ACPI_UNLOCK; 722 723 printf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), " 724 "currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1), 725 CPU_SPEED_PRINTABLE(cpu_throttle_state)); 726 } 727 728 static void 729 acpi_cpu_startup_cx() 730 { 731 struct acpi_cpu_softc *sc; 732 struct sbuf sb; 733 int i; 734 ACPI_LOCK_DECL; 735 736 sc = device_get_softc(cpu_devices[0]); 737 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN); 738 for (i = 0; i < cpu_cx_count; i++) 739 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 740 sbuf_trim(&sb); 741 sbuf_finish(&sb); 742 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx, 743 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 744 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported, 745 0, "Cx/microsecond values for supported Cx states"); 746 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 747 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 748 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 749 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A", 750 "lowest Cx sleep state to use"); 751 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 752 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 753 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 754 NULL, 0, acpi_cpu_usage_sysctl, "A", 755 "percent usage for each Cx state"); 756 757 #ifdef notyet 758 /* Signal platform that we can handle _CST notification. */ 759 if (cpu_cst_cnt != 0) { 760 ACPI_LOCK; 761 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 762 ACPI_UNLOCK; 763 } 764 #endif 765 766 /* Take over idling from cpu_idle_default(). */ 767 cpu_idle_hook = acpi_cpu_idle; 768 } 769 770 /* 771 * Set CPUs to the new state. 772 * 773 * Must be called with the ACPI lock held. 774 */ 775 static void 776 acpi_cpu_throttle_set(uint32_t speed) 777 { 778 struct acpi_cpu_softc *sc; 779 int i; 780 uint32_t p_cnt, clk_val; 781 782 ACPI_ASSERTLOCK; 783 784 /* Iterate over processors */ 785 for (i = 0; i < cpu_ndevices; i++) { 786 sc = device_get_softc(cpu_devices[i]); 787 if (sc->cpu_p_cnt == NULL) 788 continue; 789 790 /* Get the current P_CNT value and disable throttling */ 791 p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4); 792 p_cnt &= ~CPU_P_CNT_THT_EN; 793 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 794 795 /* If we're at maximum speed, that's all */ 796 if (speed < CPU_MAX_SPEED) { 797 /* Mask the old CLK_VAL off and or-in the new value */ 798 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset; 799 p_cnt &= ~clk_val; 800 p_cnt |= (speed << cpu_duty_offset); 801 802 /* Write the new P_CNT value and then enable throttling */ 803 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 804 p_cnt |= CPU_P_CNT_THT_EN; 805 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 806 } 807 ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev), 808 "set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed)); 809 } 810 cpu_throttle_state = speed; 811 } 812 813 /* 814 * Idle the CPU in the lowest state possible. This function is called with 815 * interrupts disabled. Note that once it re-enables interrupts, a task 816 * switch can occur so do not access shared data (i.e. the softc) after 817 * interrupts are re-enabled. 818 */ 819 static void 820 acpi_cpu_idle() 821 { 822 struct acpi_cpu_softc *sc; 823 struct acpi_cx *cx_next; 824 uint32_t start_time, end_time; 825 int bm_active, cx_next_idx, i; 826 827 /* If disabled, return immediately. */ 828 if (cpu_cx_count == 0) { 829 ACPI_ENABLE_IRQS(); 830 return; 831 } 832 833 /* 834 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 835 * since there is no ACPI processor object for this CPU. This occurs 836 * for logical CPUs in the HTT case. 837 */ 838 sc = cpu_softc[PCPU_GET(cpuid)]; 839 if (sc == NULL) { 840 acpi_cpu_c1(); 841 return; 842 } 843 844 /* 845 * If we slept 100 us or more, use the lowest Cx state. Otherwise, 846 * find the lowest state that has a latency less than or equal to 847 * the length of our last sleep. 848 */ 849 cx_next_idx = cpu_cx_lowest; 850 if (sc->cpu_prev_sleep < 100) 851 for (i = cpu_cx_lowest; i >= 0; i--) 852 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) { 853 cx_next_idx = i; 854 break; 855 } 856 857 /* 858 * Check for bus master activity. If there was activity, clear 859 * the bit and use the lowest non-C3 state. Note that the USB 860 * driver polling for new devices keeps this bit set all the 861 * time if USB is loaded. 862 */ 863 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active, 864 ACPI_MTX_DO_NOT_LOCK); 865 if (bm_active != 0) { 866 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1, 867 ACPI_MTX_DO_NOT_LOCK); 868 cx_next_idx = min(cx_next_idx, cpu_non_c3); 869 } 870 871 /* Select the next state and update statistics. */ 872 cx_next = &sc->cpu_cx_states[cx_next_idx]; 873 cpu_cx_stats[cx_next_idx]++; 874 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 875 876 /* 877 * Execute HLT (or equivalent) and wait for an interrupt. We can't 878 * calculate the time spent in C1 since the place we wake up is an 879 * ISR. Assume we slept one quantum and return. 880 */ 881 if (cx_next->type == ACPI_STATE_C1) { 882 sc->cpu_prev_sleep = 1000000 / hz; 883 acpi_cpu_c1(); 884 return; 885 } 886 887 /* For C3, disable bus master arbitration and enable bus master wake. */ 888 if (cx_next->type == ACPI_STATE_C3) { 889 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK); 890 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1, ACPI_MTX_DO_NOT_LOCK); 891 } 892 893 /* 894 * Read from P_LVLx to enter C2(+), checking time spent asleep. 895 * Use the ACPI timer for measuring sleep time. Since we need to 896 * get the time very close to the CPU start/stop clock logic, this 897 * is the only reliable time source. 898 */ 899 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk); 900 CPU_GET_REG(cx_next->p_lvlx, 1); 901 902 /* 903 * Read the end time twice. Since it may take an arbitrary time 904 * to enter the idle state, the first read may be executed before 905 * the processor has stopped. Doing it again provides enough 906 * margin that we are certain to have a correct value. 907 */ 908 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 909 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 910 911 /* Enable bus master arbitration and disable bus master wakeup. */ 912 if (cx_next->type == ACPI_STATE_C3) { 913 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK); 914 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK); 915 } 916 917 /* Find the actual time asleep in microseconds, minus overhead. */ 918 end_time = acpi_TimerDelta(end_time, start_time); 919 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat; 920 ACPI_ENABLE_IRQS(); 921 } 922 923 /* Put the CPU in C1 in a machine-dependant way. */ 924 static void 925 acpi_cpu_c1() 926 { 927 #ifdef __ia64__ 928 ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0); 929 #else 930 __asm __volatile("sti; hlt"); 931 #endif 932 } 933 934 /* 935 * Re-evaluate the _PSS and _CST objects when we are notified that they 936 * have changed. 937 * 938 * XXX Re-evaluation disabled until locking is done. 939 */ 940 static void 941 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 942 { 943 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 944 945 switch (notify) { 946 case ACPI_CPU_NOTIFY_PERF_STATES: 947 device_printf(sc->cpu_dev, "Performance states changed\n"); 948 /* acpi_cpu_px_available(sc); */ 949 break; 950 case ACPI_CPU_NOTIFY_CX_STATES: 951 device_printf(sc->cpu_dev, "Cx states changed\n"); 952 /* acpi_cpu_cx_cst(sc); */ 953 break; 954 default: 955 device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify); 956 break; 957 } 958 } 959 960 static int 961 acpi_cpu_quirks(struct acpi_cpu_softc *sc) 962 { 963 964 /* 965 * C3 is not supported on multiple CPUs since this would require 966 * flushing all caches which is currently too expensive. 967 */ 968 if (mp_ncpus > 1) 969 cpu_quirks |= CPU_QUIRK_NO_C3; 970 971 #ifdef notyet 972 /* Look for various quirks of the PIIX4 part. */ 973 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 974 if (acpi_dev != NULL) { 975 switch (pci_get_revid(acpi_dev)) { 976 /* 977 * Disable throttling control on PIIX4 A and B-step. 978 * See specification changes #13 ("Manual Throttle Duty Cycle") 979 * and #14 ("Enabling and Disabling Manual Throttle"), plus 980 * erratum #5 ("STPCLK# Deassertion Time") from the January 981 * 2002 PIIX4 specification update. Note that few (if any) 982 * mobile systems ever used this part. 983 */ 984 case PCI_REVISION_A_STEP: 985 case PCI_REVISION_B_STEP: 986 cpu_quirks |= CPU_QUIRK_NO_THROTTLE; 987 /* FALLTHROUGH */ 988 /* 989 * Disable C3 support for all PIIX4 chipsets. Some of these parts 990 * do not report the BMIDE status to the BM status register and 991 * others have a livelock bug if Type-F DMA is enabled. Linux 992 * works around the BMIDE bug by reading the BM status directly 993 * but we take the simpler approach of disabling C3 for these 994 * parts. 995 * 996 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 997 * Livelock") from the January 2002 PIIX4 specification update. 998 * Applies to all PIIX4 models. 999 */ 1000 case PCI_REVISION_4E: 1001 case PCI_REVISION_4M: 1002 cpu_quirks |= CPU_QUIRK_NO_C3; 1003 break; 1004 default: 1005 break; 1006 } 1007 } 1008 #endif 1009 1010 return (0); 1011 } 1012 1013 /* Handle changes in the CPU throttling setting. */ 1014 static int 1015 acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS) 1016 { 1017 uint32_t *argp; 1018 uint32_t arg; 1019 int error; 1020 ACPI_LOCK_DECL; 1021 1022 argp = (uint32_t *)oidp->oid_arg1; 1023 arg = *argp; 1024 error = sysctl_handle_int(oidp, &arg, 0, req); 1025 1026 /* Error or no new value */ 1027 if (error != 0 || req->newptr == NULL) 1028 return (error); 1029 if (arg < 1 || arg > cpu_throttle_max) 1030 return (EINVAL); 1031 1032 /* If throttling changed, notify the BIOS of the new rate. */ 1033 ACPI_LOCK; 1034 if (*argp != arg) { 1035 *argp = arg; 1036 acpi_cpu_throttle_set(arg); 1037 } 1038 ACPI_UNLOCK; 1039 1040 return (0); 1041 } 1042 1043 static int 1044 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 1045 { 1046 struct sbuf sb; 1047 char buf[128]; 1048 int i; 1049 uintmax_t fract, sum, whole; 1050 1051 sum = 0; 1052 for (i = 0; i < cpu_cx_count; i++) 1053 sum += cpu_cx_stats[i]; 1054 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1055 for (i = 0; i < cpu_cx_count; i++) { 1056 if (sum > 0) { 1057 whole = (uintmax_t)cpu_cx_stats[i] * 100; 1058 fract = (whole % sum) * 100; 1059 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 1060 (u_int)(fract / sum)); 1061 } else 1062 sbuf_printf(&sb, "0%% "); 1063 } 1064 sbuf_trim(&sb); 1065 sbuf_finish(&sb); 1066 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1067 sbuf_delete(&sb); 1068 1069 return (0); 1070 } 1071 1072 static int 1073 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1074 { 1075 struct acpi_cpu_softc *sc; 1076 char state[8]; 1077 int val, error, i; 1078 1079 sc = device_get_softc(cpu_devices[0]); 1080 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1081 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1082 if (error != 0 || req->newptr == NULL) 1083 return (error); 1084 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1085 return (EINVAL); 1086 val = (int) strtol(state + 1, NULL, 10) - 1; 1087 if (val < 0 || val > cpu_cx_count - 1) 1088 return (EINVAL); 1089 1090 cpu_cx_lowest = val; 1091 1092 /* If not disabling, cache the new lowest non-C3 state. */ 1093 cpu_non_c3 = 0; 1094 for (i = cpu_cx_lowest; i >= 0; i--) { 1095 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1096 cpu_non_c3 = i; 1097 break; 1098 } 1099 } 1100 1101 /* Reset the statistics counters. */ 1102 bzero(cpu_cx_stats, sizeof(cpu_cx_stats)); 1103 1104 return (0); 1105 } 1106