1 /*- 2 * Copyright (c) 2003 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/pcpu.h> 37 #include <sys/power.h> 38 #include <sys/proc.h> 39 #include <sys/sbuf.h> 40 #include <sys/smp.h> 41 42 #include <dev/pci/pcivar.h> 43 #include <machine/atomic.h> 44 #include <machine/bus.h> 45 #ifdef __ia64__ 46 #include <machine/pal.h> 47 #endif 48 #include <sys/rman.h> 49 50 #include "acpi.h" 51 #include <dev/acpica/acpivar.h> 52 53 /* 54 * Support for ACPI Processor devices, including ACPI 2.0 throttling 55 * and C[1-3] sleep states. 56 * 57 * TODO: implement scans of all CPUs to be sure all Cx states are 58 * equivalent. 59 */ 60 61 /* Hooks for the ACPI CA debugging infrastructure */ 62 #define _COMPONENT ACPI_PROCESSOR 63 ACPI_MODULE_NAME("PROCESSOR") 64 65 struct acpi_cx { 66 struct resource *p_lvlx; /* Register to read to enter state. */ 67 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 68 uint32_t trans_lat; /* Transition latency (usec). */ 69 uint32_t power; /* Power consumed (mW). */ 70 }; 71 #define MAX_CX_STATES 8 72 73 struct acpi_cx_stats { 74 int long_slp; /* Count of sleeps >= trans_lat. */ 75 int short_slp; /* Count of sleeps < trans_lat. */ 76 }; 77 78 struct acpi_cpu_softc { 79 device_t cpu_dev; 80 ACPI_HANDLE cpu_handle; 81 uint32_t acpi_id; /* ACPI processor id */ 82 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 83 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 84 struct resource *cpu_p_cnt; /* Throttling control register */ 85 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 86 int cpu_cx_count; /* Number of valid Cx states. */ 87 }; 88 89 #define CPU_GET_REG(reg, width) \ 90 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 91 rman_get_bushandle((reg)), 0)) 92 #define CPU_SET_REG(reg, width, val) \ 93 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 94 rman_get_bushandle((reg)), 0, (val))) 95 96 /* 97 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and 98 * reported to the user in tenths of a percent. 99 */ 100 static uint32_t cpu_duty_offset; 101 static uint32_t cpu_duty_width; 102 #define CPU_MAX_SPEED (1 << cpu_duty_width) 103 #define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED) 104 #define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \ 105 (CPU_SPEED_PERCENT(x) % 10) 106 #define CPU_P_CNT_THT_EN (1<<4) 107 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 108 109 #define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */ 110 #define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 111 112 #define CPU_QUIRK_NO_C3 0x0001 /* C3-type states are not usable. */ 113 #define CPU_QUIRK_NO_THROTTLE 0x0002 /* Throttling is not usable. */ 114 115 #define PCI_VENDOR_INTEL 0x8086 116 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 117 #define PCI_REVISION_A_STEP 0 118 #define PCI_REVISION_B_STEP 1 119 #define PCI_REVISION_4E 2 120 #define PCI_REVISION_4M 3 121 122 /* Platform hardware resource information. */ 123 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 124 static uint8_t cpu_pstate_cnt;/* Register to take over throttling. */ 125 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 126 static uint32_t cpu_rid; /* Driver-wide resource id. */ 127 static uint32_t cpu_quirks; /* Indicate any hardware bugs. */ 128 129 /* Runtime state. */ 130 static int cpu_cx_count; /* Number of valid states */ 131 static uint32_t cpu_cx_next; /* State to use for next sleep. */ 132 static uint32_t cpu_non_c3; /* Index of lowest non-C3 state. */ 133 static struct acpi_cx_stats cpu_cx_stats[MAX_CX_STATES]; 134 static int cpu_idle_busy; /* Count of CPUs in acpi_cpu_idle. */ 135 136 /* Values for sysctl. */ 137 static uint32_t cpu_throttle_state; 138 static uint32_t cpu_throttle_max; 139 static int cpu_cx_lowest; 140 static char cpu_cx_supported[64]; 141 142 static device_t *cpu_devices; 143 static int cpu_ndevices; 144 static struct acpi_cpu_softc **cpu_softc; 145 146 static struct sysctl_ctx_list acpi_cpu_sysctl_ctx; 147 static struct sysctl_oid *acpi_cpu_sysctl_tree; 148 149 static int acpi_cpu_probe(device_t dev); 150 static int acpi_cpu_attach(device_t dev); 151 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 152 uint32_t *cpu_id); 153 static int acpi_cpu_shutdown(device_t dev); 154 static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc); 155 static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 156 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 157 static void acpi_cpu_startup(void *arg); 158 static void acpi_cpu_startup_throttling(void); 159 static void acpi_cpu_startup_cx(void); 160 static void acpi_cpu_throttle_set(uint32_t speed); 161 static void acpi_cpu_idle(void); 162 static void acpi_cpu_c1(void); 163 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 164 static int acpi_cpu_quirks(struct acpi_cpu_softc *sc); 165 static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS); 166 static int acpi_cpu_history_sysctl(SYSCTL_HANDLER_ARGS); 167 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 168 169 static device_method_t acpi_cpu_methods[] = { 170 /* Device interface */ 171 DEVMETHOD(device_probe, acpi_cpu_probe), 172 DEVMETHOD(device_attach, acpi_cpu_attach), 173 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 174 175 {0, 0} 176 }; 177 178 static driver_t acpi_cpu_driver = { 179 "cpu", 180 acpi_cpu_methods, 181 sizeof(struct acpi_cpu_softc), 182 }; 183 184 static devclass_t acpi_cpu_devclass; 185 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 186 MODULE_DEPEND(cpu, acpi, 1, 1, 1); 187 188 static int 189 acpi_cpu_probe(device_t dev) 190 { 191 int acpi_id, cpu_id, cx_count; 192 ACPI_BUFFER buf; 193 ACPI_HANDLE handle; 194 char msg[32]; 195 ACPI_OBJECT *obj; 196 ACPI_STATUS status; 197 198 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 199 return (ENXIO); 200 201 handle = acpi_get_handle(dev); 202 if (cpu_softc == NULL) 203 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 204 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 205 206 /* Get our Processor object. */ 207 buf.Pointer = NULL; 208 buf.Length = ACPI_ALLOCATE_BUFFER; 209 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 210 if (ACPI_FAILURE(status)) { 211 device_printf(dev, "probe failed to get Processor obj - %s\n", 212 AcpiFormatException(status)); 213 return (ENXIO); 214 } 215 obj = (ACPI_OBJECT *)buf.Pointer; 216 if (obj->Type != ACPI_TYPE_PROCESSOR) { 217 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 218 AcpiOsFree(obj); 219 return (ENXIO); 220 } 221 222 /* 223 * Find the processor associated with our unit. We could use the 224 * ProcId as a key, however, some boxes do not have the same values 225 * in their Processor object as the ProcId values in the MADT. 226 */ 227 acpi_id = obj->Processor.ProcId; 228 AcpiOsFree(obj); 229 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 230 return (ENXIO); 231 232 /* 233 * Check if we already probed this processor. We scan the bus twice 234 * so it's possible we've already seen this one. 235 */ 236 if (cpu_softc[cpu_id] != NULL) 237 return (ENXIO); 238 239 /* Get a count of Cx states for our device string. */ 240 cx_count = 0; 241 buf.Pointer = NULL; 242 buf.Length = ACPI_ALLOCATE_BUFFER; 243 status = AcpiEvaluateObject(handle, "_CST", NULL, &buf); 244 if (ACPI_SUCCESS(status)) { 245 obj = (ACPI_OBJECT *)buf.Pointer; 246 if (ACPI_PKG_VALID(obj, 2)) 247 acpi_PkgInt32(obj, 0, &cx_count); 248 AcpiOsFree(obj); 249 } else { 250 if (AcpiGbl_FADT->Plvl2Lat <= 100) 251 cx_count++; 252 if (AcpiGbl_FADT->Plvl3Lat <= 1000) 253 cx_count++; 254 if (cx_count > 0) 255 cx_count++; 256 } 257 if (cx_count > 0) 258 snprintf(msg, sizeof(msg), "ACPI CPU (%d Cx states)", cx_count); 259 else 260 strlcpy(msg, "ACPI CPU", sizeof(msg)); 261 device_set_desc_copy(dev, msg); 262 263 /* Mark this processor as in-use and save our derived id for attach. */ 264 cpu_softc[cpu_id] = (void *)1; 265 acpi_set_magic(dev, cpu_id); 266 267 return (0); 268 } 269 270 static int 271 acpi_cpu_attach(device_t dev) 272 { 273 ACPI_BUFFER buf; 274 ACPI_OBJECT *obj; 275 struct acpi_cpu_softc *sc; 276 struct acpi_softc *acpi_sc; 277 ACPI_STATUS status; 278 int thr_ret, cx_ret; 279 280 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 281 282 ACPI_ASSERTLOCK; 283 284 sc = device_get_softc(dev); 285 sc->cpu_dev = dev; 286 sc->cpu_handle = acpi_get_handle(dev); 287 cpu_softc[acpi_get_magic(dev)] = sc; 288 289 buf.Pointer = NULL; 290 buf.Length = ACPI_ALLOCATE_BUFFER; 291 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 292 if (ACPI_FAILURE(status)) { 293 device_printf(dev, "attach failed to get Processor obj - %s\n", 294 AcpiFormatException(status)); 295 return (ENXIO); 296 } 297 obj = (ACPI_OBJECT *)buf.Pointer; 298 sc->cpu_p_blk = obj->Processor.PblkAddress; 299 sc->cpu_p_blk_len = obj->Processor.PblkLength; 300 sc->acpi_id = obj->Processor.ProcId; 301 AcpiOsFree(obj); 302 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 303 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 304 305 acpi_sc = acpi_device_get_parent_softc(dev); 306 sysctl_ctx_init(&acpi_cpu_sysctl_ctx); 307 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx, 308 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), 309 OID_AUTO, "cpu", CTLFLAG_RD, 0, ""); 310 311 /* If this is the first device probed, check for quirks. */ 312 if (device_get_unit(dev) == 0) 313 acpi_cpu_quirks(sc); 314 315 /* 316 * Probe for throttling and Cx state support. 317 * If none of these is present, free up unused resources. 318 */ 319 thr_ret = acpi_cpu_throttle_probe(sc); 320 cx_ret = acpi_cpu_cx_probe(sc); 321 if (thr_ret == 0 || cx_ret == 0) { 322 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 323 acpi_cpu_notify, sc); 324 if (device_get_unit(dev) == 0) 325 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL); 326 } else { 327 sysctl_ctx_free(&acpi_cpu_sysctl_ctx); 328 } 329 330 return_VALUE (0); 331 } 332 333 /* 334 * Find the nth present CPU and return its pc_cpuid as well as set the 335 * pc_acpi_id from the most reliable source. 336 */ 337 static int 338 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 339 { 340 struct pcpu *pcpu_data; 341 uint32_t i; 342 343 KASSERT(acpi_id != NULL, ("Null acpi_id")); 344 KASSERT(cpu_id != NULL, ("Null cpu_id")); 345 for (i = 0; i <= mp_maxid; i++) { 346 if (CPU_ABSENT(i)) 347 continue; 348 pcpu_data = pcpu_find(i); 349 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 350 if (idx-- == 0) { 351 /* 352 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 353 * override it with the value from the ASL. Otherwise, if the 354 * two don't match, prefer the MADT-derived value. Finally, 355 * return the pc_cpuid to reference this processor. 356 */ 357 if (pcpu_data->pc_acpi_id == 0xffffffff) 358 pcpu_data->pc_acpi_id = *acpi_id; 359 else if (pcpu_data->pc_acpi_id != *acpi_id) 360 *acpi_id = pcpu_data->pc_acpi_id; 361 *cpu_id = pcpu_data->pc_cpuid; 362 return (0); 363 } 364 } 365 366 return (ESRCH); 367 } 368 369 static int 370 acpi_cpu_shutdown(device_t dev) 371 { 372 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 373 374 /* Disable any entry to the idle function. */ 375 cpu_cx_count = 0; 376 377 /* Wait for all processors to exit acpi_cpu_idle(). */ 378 smp_rendezvous(NULL, NULL, NULL, NULL); 379 while (cpu_idle_busy > 0) 380 DELAY(1); 381 382 return_VALUE (0); 383 } 384 385 static int 386 acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc) 387 { 388 uint32_t duty_end; 389 ACPI_BUFFER buf; 390 ACPI_OBJECT obj; 391 ACPI_GENERIC_ADDRESS gas; 392 ACPI_STATUS status; 393 394 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 395 396 ACPI_ASSERTLOCK; 397 398 /* Get throttling parameters from the FADT. 0 means not supported. */ 399 if (device_get_unit(sc->cpu_dev) == 0) { 400 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd; 401 cpu_pstate_cnt = AcpiGbl_FADT->PstateCnt; 402 cpu_cst_cnt = AcpiGbl_FADT->CstCnt; 403 cpu_duty_offset = AcpiGbl_FADT->DutyOffset; 404 cpu_duty_width = AcpiGbl_FADT->DutyWidth; 405 } 406 if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0) 407 return (ENXIO); 408 409 /* Validate the duty offset/width. */ 410 duty_end = cpu_duty_offset + cpu_duty_width - 1; 411 if (duty_end > 31) { 412 device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n"); 413 return (ENXIO); 414 } 415 if (cpu_duty_offset <= 4 && duty_end >= 4) { 416 device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n"); 417 return (ENXIO); 418 } 419 420 /* 421 * If not present, fall back to using the processor's P_BLK to find 422 * the P_CNT register. 423 * 424 * Note that some systems seem to duplicate the P_BLK pointer 425 * across multiple CPUs, so not getting the resource is not fatal. 426 */ 427 buf.Pointer = &obj; 428 buf.Length = sizeof(obj); 429 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf); 430 if (ACPI_SUCCESS(status)) { 431 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) { 432 device_printf(sc->cpu_dev, "_PTC buffer too small\n"); 433 return (ENXIO); 434 } 435 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas)); 436 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 437 if (sc->cpu_p_cnt != NULL) { 438 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from _PTC\n", 439 device_get_unit(sc->cpu_dev))); 440 } 441 } 442 443 /* If _PTC not present or other failure, try the P_BLK. */ 444 if (sc->cpu_p_cnt == NULL) { 445 /* 446 * The spec says P_BLK must be 6 bytes long. However, some 447 * systems use it to indicate a fractional set of features 448 * present so we take anything >= 4. 449 */ 450 if (sc->cpu_p_blk_len < 4) 451 return (ENXIO); 452 gas.Address = sc->cpu_p_blk; 453 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 454 gas.RegisterBitWidth = 32; 455 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 456 if (sc->cpu_p_cnt != NULL) { 457 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from P_BLK\n", 458 device_get_unit(sc->cpu_dev))); 459 } else { 460 device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n"); 461 return (ENXIO); 462 } 463 } 464 cpu_rid++; 465 466 return (0); 467 } 468 469 static int 470 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 471 { 472 ACPI_GENERIC_ADDRESS gas; 473 struct acpi_cx *cx_ptr; 474 int error; 475 476 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 477 478 /* Bus mastering arbitration control is needed for C3. */ 479 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) { 480 cpu_quirks |= CPU_QUIRK_NO_C3; 481 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 482 "acpi_cpu%d: No BM control, C3 disabled\n", 483 device_get_unit(sc->cpu_dev))); 484 } 485 486 /* 487 * First, check for the ACPI 2.0 _CST sleep states object. 488 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3. 489 */ 490 sc->cpu_cx_count = 0; 491 error = acpi_cpu_cx_cst(sc); 492 if (error != 0) { 493 cx_ptr = sc->cpu_cx_states; 494 495 /* C1 has been required since just after ACPI 1.0 */ 496 cx_ptr->type = ACPI_STATE_C1; 497 cx_ptr->trans_lat = 0; 498 cpu_non_c3 = 0; 499 cx_ptr++; 500 sc->cpu_cx_count++; 501 502 /* 503 * The spec says P_BLK must be 6 bytes long. However, some systems 504 * use it to indicate a fractional set of features present so we 505 * take 5 as C2. Some may also have a value of 7 to indicate 506 * another C3 but most use _CST for this (as required) and having 507 * "only" C1-C3 is not a hardship. 508 */ 509 if (sc->cpu_p_blk_len < 5) 510 goto done; 511 512 /* Validate and allocate resources for C2 (P_LVL2). */ 513 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 514 gas.RegisterBitWidth = 8; 515 if (AcpiGbl_FADT->Plvl2Lat <= 100) { 516 gas.Address = sc->cpu_p_blk + 4; 517 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 518 if (cx_ptr->p_lvlx != NULL) { 519 cpu_rid++; 520 cx_ptr->type = ACPI_STATE_C2; 521 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat; 522 cpu_non_c3 = 1; 523 cx_ptr++; 524 sc->cpu_cx_count++; 525 } 526 } 527 if (sc->cpu_p_blk_len < 6) 528 goto done; 529 530 /* Validate and allocate resources for C3 (P_LVL3). */ 531 if (AcpiGbl_FADT->Plvl3Lat <= 1000 && 532 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) { 533 534 gas.Address = sc->cpu_p_blk + 5; 535 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 536 if (cx_ptr->p_lvlx != NULL) { 537 cpu_rid++; 538 cx_ptr->type = ACPI_STATE_C3; 539 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat; 540 cx_ptr++; 541 sc->cpu_cx_count++; 542 } 543 } 544 } 545 546 done: 547 /* If no valid registers were found, don't attach. */ 548 if (sc->cpu_cx_count == 0) 549 return (ENXIO); 550 551 return (0); 552 } 553 554 /* 555 * Parse a _CST package and set up its Cx states. Since the _CST object 556 * can change dynamically, our notify handler may call this function 557 * to clean up and probe the new _CST package. 558 */ 559 static int 560 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 561 { 562 struct acpi_cx *cx_ptr; 563 ACPI_STATUS status; 564 ACPI_BUFFER buf; 565 ACPI_OBJECT *top; 566 ACPI_OBJECT *pkg; 567 uint32_t count; 568 int i; 569 570 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 571 572 buf.Pointer = NULL; 573 buf.Length = ACPI_ALLOCATE_BUFFER; 574 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 575 if (ACPI_FAILURE(status)) 576 return (ENXIO); 577 578 /* _CST is a package with a count and at least one Cx package. */ 579 top = (ACPI_OBJECT *)buf.Pointer; 580 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 581 device_printf(sc->cpu_dev, "Invalid _CST package\n"); 582 AcpiOsFree(buf.Pointer); 583 return (ENXIO); 584 } 585 if (count != top->Package.Count - 1) { 586 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n", 587 count, top->Package.Count - 1); 588 count = top->Package.Count - 1; 589 } 590 if (count > MAX_CX_STATES) { 591 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 592 count = MAX_CX_STATES; 593 } 594 595 /* Set up all valid states. */ 596 sc->cpu_cx_count = 0; 597 cx_ptr = sc->cpu_cx_states; 598 for (i = 0; i < count; i++) { 599 pkg = &top->Package.Elements[i + 1]; 600 if (!ACPI_PKG_VALID(pkg, 4) || 601 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 602 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 603 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 604 605 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n"); 606 continue; 607 } 608 609 /* Validate the state to see if we should use it. */ 610 switch (cx_ptr->type) { 611 case ACPI_STATE_C1: 612 cpu_non_c3 = i; 613 cx_ptr++; 614 sc->cpu_cx_count++; 615 continue; 616 case ACPI_STATE_C2: 617 if (cx_ptr->trans_lat > 100) { 618 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 619 "acpi_cpu%d: C2[%d] not available.\n", 620 device_get_unit(sc->cpu_dev), i)); 621 continue; 622 } 623 cpu_non_c3 = i; 624 break; 625 case ACPI_STATE_C3: 626 default: 627 if (cx_ptr->trans_lat > 1000 || 628 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 629 630 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 631 "acpi_cpu%d: C3[%d] not available.\n", 632 device_get_unit(sc->cpu_dev), i)); 633 continue; 634 } 635 break; 636 } 637 638 #ifdef notyet 639 /* Free up any previous register. */ 640 if (cx_ptr->p_lvlx != NULL) { 641 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 642 cx_ptr->p_lvlx = NULL; 643 } 644 #endif 645 646 /* Allocate the control register for C2 or C3. */ 647 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cpu_rid, &cx_ptr->p_lvlx); 648 if (cx_ptr->p_lvlx != NULL) { 649 cpu_rid++; 650 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 651 "acpi_cpu%d: Got C%d - %d latency\n", 652 device_get_unit(sc->cpu_dev), cx_ptr->type, 653 cx_ptr->trans_lat)); 654 cx_ptr++; 655 sc->cpu_cx_count++; 656 } 657 } 658 AcpiOsFree(buf.Pointer); 659 660 return (0); 661 } 662 663 /* 664 * Call this *after* all CPUs have been attached. 665 */ 666 static void 667 acpi_cpu_startup(void *arg) 668 { 669 struct acpi_cpu_softc *sc; 670 int count, i; 671 672 /* Get set of CPU devices */ 673 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 674 675 /* 676 * Make sure all the processors' Cx counts match. We should probably 677 * also check the contents of each. However, no known systems have 678 * non-matching Cx counts so we'll deal with this later. 679 */ 680 count = MAX_CX_STATES; 681 for (i = 0; i < cpu_ndevices; i++) { 682 sc = device_get_softc(cpu_devices[i]); 683 count = min(sc->cpu_cx_count, count); 684 } 685 cpu_cx_count = count; 686 687 /* Perform throttling and Cx final initialization. */ 688 sc = device_get_softc(cpu_devices[0]); 689 if (sc->cpu_p_cnt != NULL) 690 acpi_cpu_startup_throttling(); 691 if (cpu_cx_count > 0) 692 acpi_cpu_startup_cx(); 693 } 694 695 /* 696 * Takes the ACPI lock to avoid fighting anyone over the SMI command 697 * port. 698 */ 699 static void 700 acpi_cpu_startup_throttling() 701 { 702 ACPI_LOCK_DECL; 703 704 /* Initialise throttling states */ 705 cpu_throttle_max = CPU_MAX_SPEED; 706 cpu_throttle_state = CPU_MAX_SPEED; 707 708 SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx, 709 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 710 OID_AUTO, "throttle_max", CTLFLAG_RD, 711 &cpu_throttle_max, 0, "maximum CPU speed"); 712 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 713 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 714 OID_AUTO, "throttle_state", 715 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_state, 716 0, acpi_cpu_throttle_sysctl, "I", "current CPU speed"); 717 718 /* If ACPI 2.0+, signal platform that we are taking over throttling. */ 719 ACPI_LOCK; 720 if (cpu_pstate_cnt != 0) 721 AcpiOsWritePort(cpu_smi_cmd, cpu_pstate_cnt, 8); 722 723 /* Set initial speed to maximum. */ 724 acpi_cpu_throttle_set(cpu_throttle_max); 725 ACPI_UNLOCK; 726 727 printf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), " 728 "currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1), 729 CPU_SPEED_PRINTABLE(cpu_throttle_state)); 730 } 731 732 static void 733 acpi_cpu_startup_cx() 734 { 735 struct acpi_cpu_softc *sc; 736 struct sbuf sb; 737 int i; 738 ACPI_LOCK_DECL; 739 740 sc = device_get_softc(cpu_devices[0]); 741 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN); 742 for (i = 0; i < cpu_cx_count; i++) 743 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 744 sbuf_trim(&sb); 745 sbuf_finish(&sb); 746 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx, 747 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 748 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported, 749 0, "Cx/microsecond values for supported Cx states"); 750 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 751 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 752 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 753 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A", 754 "lowest Cx sleep state to use"); 755 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 756 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 757 OID_AUTO, "cx_history", CTLTYPE_STRING | CTLFLAG_RD, 758 NULL, 0, acpi_cpu_history_sysctl, "A", 759 "count of full sleeps for Cx state / short sleeps"); 760 761 #ifdef notyet 762 /* Signal platform that we can handle _CST notification. */ 763 if (cpu_cst_cnt != 0) { 764 ACPI_LOCK; 765 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 766 ACPI_UNLOCK; 767 } 768 #endif 769 770 /* Take over idling from cpu_idle_default(). */ 771 cpu_cx_next = cpu_cx_lowest; 772 cpu_idle_hook = acpi_cpu_idle; 773 } 774 775 /* 776 * Set CPUs to the new state. 777 * 778 * Must be called with the ACPI lock held. 779 */ 780 static void 781 acpi_cpu_throttle_set(uint32_t speed) 782 { 783 struct acpi_cpu_softc *sc; 784 int i; 785 uint32_t p_cnt, clk_val; 786 787 ACPI_ASSERTLOCK; 788 789 /* Iterate over processors */ 790 for (i = 0; i < cpu_ndevices; i++) { 791 sc = device_get_softc(cpu_devices[i]); 792 if (sc->cpu_p_cnt == NULL) 793 continue; 794 795 /* Get the current P_CNT value and disable throttling */ 796 p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4); 797 p_cnt &= ~CPU_P_CNT_THT_EN; 798 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 799 800 /* If we're at maximum speed, that's all */ 801 if (speed < CPU_MAX_SPEED) { 802 /* Mask the old CLK_VAL off and or-in the new value */ 803 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset; 804 p_cnt &= ~clk_val; 805 p_cnt |= (speed << cpu_duty_offset); 806 807 /* Write the new P_CNT value and then enable throttling */ 808 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 809 p_cnt |= CPU_P_CNT_THT_EN; 810 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 811 } 812 ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev), 813 "set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed)); 814 } 815 cpu_throttle_state = speed; 816 } 817 818 /* 819 * Idle the CPU in the lowest state possible. 820 * This function is called with interrupts disabled. 821 */ 822 static void 823 acpi_cpu_idle() 824 { 825 struct acpi_cpu_softc *sc; 826 struct acpi_cx *cx_next; 827 uint32_t start_time, end_time; 828 int bm_active, i, asleep; 829 830 /* If disabled, return immediately. */ 831 if (cpu_cx_count == 0) { 832 ACPI_ENABLE_IRQS(); 833 return; 834 } 835 836 /* 837 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 838 * since there is no ACPI processor object for this CPU. This occurs 839 * for logical CPUs in the HTT case. 840 */ 841 sc = cpu_softc[PCPU_GET(cpuid)]; 842 if (sc == NULL) { 843 acpi_cpu_c1(); 844 return; 845 } 846 847 /* Record that a CPU is in the idle function. */ 848 atomic_add_int(&cpu_idle_busy, 1); 849 850 /* 851 * Check for bus master activity. If there was activity, clear 852 * the bit and use the lowest non-C3 state. Note that the USB 853 * driver polling for new devices keeps this bit set all the 854 * time if USB is enabled. 855 */ 856 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active, 857 ACPI_MTX_DO_NOT_LOCK); 858 if (bm_active != 0) { 859 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1, 860 ACPI_MTX_DO_NOT_LOCK); 861 cpu_cx_next = min(cpu_cx_next, cpu_non_c3); 862 } 863 864 /* Perform the actual sleep based on the Cx-specific semantics. */ 865 cx_next = &sc->cpu_cx_states[cpu_cx_next]; 866 switch (cx_next->type) { 867 case ACPI_STATE_C0: 868 panic("acpi_cpu_idle: attempting to sleep in C0"); 869 /* NOTREACHED */ 870 case ACPI_STATE_C1: 871 /* Execute HLT (or equivalent) and wait for an interrupt. */ 872 acpi_cpu_c1(); 873 874 /* 875 * We can't calculate the time spent in C1 since the place we 876 * wake up is an ISR. Use a constant time of 1 ms. 877 */ 878 start_time = 0; 879 end_time = 1000; 880 break; 881 case ACPI_STATE_C2: 882 /* 883 * Read from P_LVLx to enter C2, checking time spent asleep. 884 * Use the ACPI timer for measuring sleep time. Since we need to 885 * get the time very close to the CPU start/stop clock logic, this 886 * is the only reliable time source. 887 */ 888 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk); 889 CPU_GET_REG(cx_next->p_lvlx, 1); 890 891 /* 892 * Read the end time twice. Since it may take an arbitrary time 893 * to enter the idle state, the first read may be executed before 894 * the processor has stopped. Doing it again provides enough 895 * margin that we are certain to have a correct value. 896 */ 897 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 898 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 899 ACPI_ENABLE_IRQS(); 900 break; 901 case ACPI_STATE_C3: 902 default: 903 /* Disable bus master arbitration and enable bus master wakeup. */ 904 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK); 905 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1, ACPI_MTX_DO_NOT_LOCK); 906 907 /* Read from P_LVLx to enter C3, checking time spent asleep. */ 908 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk); 909 CPU_GET_REG(cx_next->p_lvlx, 1); 910 911 /* Read the end time twice. See comment for C2 above. */ 912 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 913 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 914 915 /* Enable bus master arbitration and disable bus master wakeup. */ 916 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK); 917 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK); 918 ACPI_ENABLE_IRQS(); 919 break; 920 } 921 922 /* Find the actual time asleep in microseconds, minus overhead. */ 923 end_time = acpi_TimerDelta(end_time, start_time); 924 asleep = PM_USEC(end_time) - cx_next->trans_lat; 925 926 /* Record statistics */ 927 if (asleep < cx_next->trans_lat) 928 cpu_cx_stats[cpu_cx_next].short_slp++; 929 else 930 cpu_cx_stats[cpu_cx_next].long_slp++; 931 932 /* 933 * If we slept 100 us or more, use the lowest Cx state. 934 * Otherwise, find the lowest state that has a latency less than 935 * or equal to the length of our last sleep. 936 */ 937 if (asleep >= 100) 938 cpu_cx_next = cpu_cx_lowest; 939 else { 940 for (i = cpu_cx_lowest; i >= 0; i--) { 941 if (sc->cpu_cx_states[i].trans_lat <= asleep) { 942 cpu_cx_next = i; 943 break; 944 } 945 } 946 } 947 948 /* Decrement reference count checked by acpi_cpu_shutdown(). */ 949 atomic_subtract_int(&cpu_idle_busy, 1); 950 } 951 952 /* Put the CPU in C1 in a machine-dependant way. */ 953 static void 954 acpi_cpu_c1() 955 { 956 #ifdef __ia64__ 957 ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0); 958 #else 959 __asm __volatile("sti; hlt"); 960 #endif 961 } 962 963 /* 964 * Re-evaluate the _PSS and _CST objects when we are notified that they 965 * have changed. 966 * 967 * XXX Re-evaluation disabled until locking is done. 968 */ 969 static void 970 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 971 { 972 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 973 974 switch (notify) { 975 case ACPI_CPU_NOTIFY_PERF_STATES: 976 device_printf(sc->cpu_dev, "Performance states changed\n"); 977 /* acpi_cpu_px_available(sc); */ 978 break; 979 case ACPI_CPU_NOTIFY_CX_STATES: 980 device_printf(sc->cpu_dev, "Cx states changed\n"); 981 /* acpi_cpu_cx_cst(sc); */ 982 break; 983 default: 984 device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify); 985 break; 986 } 987 } 988 989 static int 990 acpi_cpu_quirks(struct acpi_cpu_softc *sc) 991 { 992 993 /* 994 * C3 is not supported on multiple CPUs since this would require 995 * flushing all caches which is currently too expensive. 996 */ 997 if (mp_ncpus > 1) 998 cpu_quirks |= CPU_QUIRK_NO_C3; 999 1000 #ifdef notyet 1001 /* Look for various quirks of the PIIX4 part. */ 1002 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 1003 if (acpi_dev != NULL) { 1004 switch (pci_get_revid(acpi_dev)) { 1005 /* 1006 * Disable throttling control on PIIX4 A and B-step. 1007 * See specification changes #13 ("Manual Throttle Duty Cycle") 1008 * and #14 ("Enabling and Disabling Manual Throttle"), plus 1009 * erratum #5 ("STPCLK# Deassertion Time") from the January 1010 * 2002 PIIX4 specification update. Note that few (if any) 1011 * mobile systems ever used this part. 1012 */ 1013 case PCI_REVISION_A_STEP: 1014 case PCI_REVISION_B_STEP: 1015 cpu_quirks |= CPU_QUIRK_NO_THROTTLE; 1016 /* FALLTHROUGH */ 1017 /* 1018 * Disable C3 support for all PIIX4 chipsets. Some of these parts 1019 * do not report the BMIDE status to the BM status register and 1020 * others have a livelock bug if Type-F DMA is enabled. Linux 1021 * works around the BMIDE bug by reading the BM status directly 1022 * but we take the simpler approach of disabling C3 for these 1023 * parts. 1024 * 1025 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 1026 * Livelock") from the January 2002 PIIX4 specification update. 1027 * Applies to all PIIX4 models. 1028 */ 1029 case PCI_REVISION_4E: 1030 case PCI_REVISION_4M: 1031 cpu_quirks |= CPU_QUIRK_NO_C3; 1032 break; 1033 default: 1034 break; 1035 } 1036 } 1037 #endif 1038 1039 return (0); 1040 } 1041 1042 /* Handle changes in the CPU throttling setting. */ 1043 static int 1044 acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS) 1045 { 1046 uint32_t *argp; 1047 uint32_t arg; 1048 int error; 1049 ACPI_LOCK_DECL; 1050 1051 argp = (uint32_t *)oidp->oid_arg1; 1052 arg = *argp; 1053 error = sysctl_handle_int(oidp, &arg, 0, req); 1054 1055 /* Error or no new value */ 1056 if (error != 0 || req->newptr == NULL) 1057 return (error); 1058 if (arg < 1 || arg > cpu_throttle_max) 1059 return (EINVAL); 1060 1061 /* If throttling changed, notify the BIOS of the new rate. */ 1062 ACPI_LOCK; 1063 if (*argp != arg) { 1064 *argp = arg; 1065 acpi_cpu_throttle_set(arg); 1066 } 1067 ACPI_UNLOCK; 1068 1069 return (0); 1070 } 1071 1072 static int 1073 acpi_cpu_history_sysctl(SYSCTL_HANDLER_ARGS) 1074 { 1075 struct sbuf sb; 1076 char buf[128]; 1077 int i; 1078 1079 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1080 for (i = 0; i < cpu_cx_count; i++) { 1081 sbuf_printf(&sb, "%u/%u ", cpu_cx_stats[i].long_slp, 1082 cpu_cx_stats[i].short_slp); 1083 } 1084 sbuf_trim(&sb); 1085 sbuf_finish(&sb); 1086 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1087 sbuf_delete(&sb); 1088 1089 return (0); 1090 } 1091 1092 static int 1093 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1094 { 1095 struct acpi_cpu_softc *sc; 1096 char state[8]; 1097 int val, error, i; 1098 1099 sc = device_get_softc(cpu_devices[0]); 1100 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1101 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1102 if (error != 0 || req->newptr == NULL) 1103 return (error); 1104 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1105 return (EINVAL); 1106 val = (int) strtol(state + 1, NULL, 10) - 1; 1107 if (val < 0 || val > cpu_cx_count - 1) 1108 return (EINVAL); 1109 1110 /* Use the new value for the next idle slice. */ 1111 cpu_cx_lowest = val; 1112 cpu_cx_next = val; 1113 1114 /* If not disabling, cache the new lowest non-C3 state. */ 1115 cpu_non_c3 = 0; 1116 for (i = cpu_cx_lowest; i >= 0; i--) { 1117 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1118 cpu_non_c3 = i; 1119 break; 1120 } 1121 } 1122 1123 /* Reset the statistics counters. */ 1124 memset(cpu_cx_stats, 0, sizeof(cpu_cx_stats)); 1125 1126 return (0); 1127 } 1128