1 /*- 2 * Copyright (c) 2003 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/module.h> 37 #include <sys/pcpu.h> 38 #include <sys/power.h> 39 #include <sys/proc.h> 40 #include <sys/sbuf.h> 41 #include <sys/smp.h> 42 43 #include <dev/pci/pcivar.h> 44 #include <machine/atomic.h> 45 #include <machine/bus.h> 46 #ifdef __ia64__ 47 #include <machine/pal.h> 48 #endif 49 #include <sys/rman.h> 50 51 #include "acpi.h" 52 #include <dev/acpica/acpivar.h> 53 54 /* 55 * Support for ACPI Processor devices, including ACPI 2.0 throttling 56 * and C[1-3] sleep states. 57 * 58 * TODO: implement scans of all CPUs to be sure all Cx states are 59 * equivalent. 60 */ 61 62 /* Hooks for the ACPI CA debugging infrastructure */ 63 #define _COMPONENT ACPI_PROCESSOR 64 ACPI_MODULE_NAME("PROCESSOR") 65 66 struct acpi_cx { 67 struct resource *p_lvlx; /* Register to read to enter state. */ 68 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 69 uint32_t trans_lat; /* Transition latency (usec). */ 70 uint32_t power; /* Power consumed (mW). */ 71 }; 72 #define MAX_CX_STATES 8 73 74 struct acpi_cpu_softc { 75 device_t cpu_dev; 76 ACPI_HANDLE cpu_handle; 77 uint32_t acpi_id; /* ACPI processor id */ 78 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 79 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 80 struct resource *cpu_p_cnt; /* Throttling control register */ 81 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 82 int cpu_cx_count; /* Number of valid Cx states. */ 83 int cpu_prev_sleep;/* Last idle sleep duration. */ 84 }; 85 86 #define CPU_GET_REG(reg, width) \ 87 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 88 rman_get_bushandle((reg)), 0)) 89 #define CPU_SET_REG(reg, width, val) \ 90 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 91 rman_get_bushandle((reg)), 0, (val))) 92 93 /* 94 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and 95 * reported to the user in tenths of a percent. 96 */ 97 static uint32_t cpu_duty_offset; 98 static uint32_t cpu_duty_width; 99 #define CPU_MAX_SPEED (1 << cpu_duty_width) 100 #define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED) 101 #define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \ 102 (CPU_SPEED_PERCENT(x) % 10) 103 #define CPU_P_CNT_THT_EN (1<<4) 104 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 105 106 #define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */ 107 #define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 108 109 #define CPU_QUIRK_NO_C3 0x0001 /* C3-type states are not usable. */ 110 #define CPU_QUIRK_NO_THROTTLE 0x0002 /* Throttling is not usable. */ 111 112 #define PCI_VENDOR_INTEL 0x8086 113 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 114 #define PCI_REVISION_A_STEP 0 115 #define PCI_REVISION_B_STEP 1 116 #define PCI_REVISION_4E 2 117 #define PCI_REVISION_4M 3 118 119 /* Platform hardware resource information. */ 120 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 121 static uint8_t cpu_pstate_cnt;/* Register to take over throttling. */ 122 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 123 static int cpu_rid; /* Driver-wide resource id. */ 124 static int cpu_quirks; /* Indicate any hardware bugs. */ 125 126 /* Runtime state. */ 127 static int cpu_cx_count; /* Number of valid states */ 128 static int cpu_non_c3; /* Index of lowest non-C3 state. */ 129 static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 130 131 /* Values for sysctl. */ 132 static uint32_t cpu_throttle_state; 133 static uint32_t cpu_throttle_max; 134 static int cpu_cx_lowest; 135 static char cpu_cx_supported[64]; 136 137 static device_t *cpu_devices; 138 static int cpu_ndevices; 139 static struct acpi_cpu_softc **cpu_softc; 140 ACPI_SERIAL_DECL(cpu, "ACPI CPU"); 141 142 static struct sysctl_ctx_list acpi_cpu_sysctl_ctx; 143 static struct sysctl_oid *acpi_cpu_sysctl_tree; 144 145 static int acpi_cpu_probe(device_t dev); 146 static int acpi_cpu_attach(device_t dev); 147 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 148 uint32_t *cpu_id); 149 static int acpi_cpu_shutdown(device_t dev); 150 static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc); 151 static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 152 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 153 static void acpi_cpu_startup(void *arg); 154 static void acpi_cpu_startup_throttling(void); 155 static void acpi_cpu_startup_cx(void); 156 static void acpi_cpu_throttle_set(uint32_t speed); 157 static void acpi_cpu_idle(void); 158 static void acpi_cpu_c1(void); 159 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 160 static int acpi_cpu_quirks(struct acpi_cpu_softc *sc); 161 static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS); 162 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 163 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 164 165 static device_method_t acpi_cpu_methods[] = { 166 /* Device interface */ 167 DEVMETHOD(device_probe, acpi_cpu_probe), 168 DEVMETHOD(device_attach, acpi_cpu_attach), 169 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 170 171 {0, 0} 172 }; 173 174 static driver_t acpi_cpu_driver = { 175 "cpu", 176 acpi_cpu_methods, 177 sizeof(struct acpi_cpu_softc), 178 }; 179 180 static devclass_t acpi_cpu_devclass; 181 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 182 MODULE_DEPEND(cpu, acpi, 1, 1, 1); 183 184 static int 185 acpi_cpu_probe(device_t dev) 186 { 187 int acpi_id, cpu_id, cx_count; 188 ACPI_BUFFER buf; 189 ACPI_HANDLE handle; 190 char msg[32]; 191 ACPI_OBJECT *obj; 192 ACPI_STATUS status; 193 194 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 195 return (ENXIO); 196 197 handle = acpi_get_handle(dev); 198 if (cpu_softc == NULL) 199 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 200 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 201 202 /* Get our Processor object. */ 203 buf.Pointer = NULL; 204 buf.Length = ACPI_ALLOCATE_BUFFER; 205 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 206 if (ACPI_FAILURE(status)) { 207 device_printf(dev, "probe failed to get Processor obj - %s\n", 208 AcpiFormatException(status)); 209 return (ENXIO); 210 } 211 obj = (ACPI_OBJECT *)buf.Pointer; 212 if (obj->Type != ACPI_TYPE_PROCESSOR) { 213 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 214 AcpiOsFree(obj); 215 return (ENXIO); 216 } 217 218 /* 219 * Find the processor associated with our unit. We could use the 220 * ProcId as a key, however, some boxes do not have the same values 221 * in their Processor object as the ProcId values in the MADT. 222 */ 223 acpi_id = obj->Processor.ProcId; 224 AcpiOsFree(obj); 225 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 226 return (ENXIO); 227 228 /* 229 * Check if we already probed this processor. We scan the bus twice 230 * so it's possible we've already seen this one. 231 */ 232 if (cpu_softc[cpu_id] != NULL) 233 return (ENXIO); 234 235 /* Get a count of Cx states for our device string. */ 236 cx_count = 0; 237 buf.Pointer = NULL; 238 buf.Length = ACPI_ALLOCATE_BUFFER; 239 status = AcpiEvaluateObject(handle, "_CST", NULL, &buf); 240 if (ACPI_SUCCESS(status)) { 241 obj = (ACPI_OBJECT *)buf.Pointer; 242 if (ACPI_PKG_VALID(obj, 2)) 243 acpi_PkgInt32(obj, 0, &cx_count); 244 AcpiOsFree(obj); 245 } else { 246 if (AcpiGbl_FADT->Plvl2Lat <= 100) 247 cx_count++; 248 if (AcpiGbl_FADT->Plvl3Lat <= 1000) 249 cx_count++; 250 if (cx_count > 0) 251 cx_count++; 252 } 253 if (cx_count > 0) 254 snprintf(msg, sizeof(msg), "ACPI CPU (%d Cx states)", cx_count); 255 else 256 strlcpy(msg, "ACPI CPU", sizeof(msg)); 257 device_set_desc_copy(dev, msg); 258 259 /* Mark this processor as in-use and save our derived id for attach. */ 260 cpu_softc[cpu_id] = (void *)1; 261 acpi_set_magic(dev, cpu_id); 262 263 return (0); 264 } 265 266 static int 267 acpi_cpu_attach(device_t dev) 268 { 269 ACPI_BUFFER buf; 270 ACPI_OBJECT *obj; 271 struct acpi_cpu_softc *sc; 272 struct acpi_softc *acpi_sc; 273 ACPI_STATUS status; 274 int thr_ret, cx_ret; 275 276 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 277 278 sc = device_get_softc(dev); 279 sc->cpu_dev = dev; 280 sc->cpu_handle = acpi_get_handle(dev); 281 cpu_softc[acpi_get_magic(dev)] = sc; 282 283 buf.Pointer = NULL; 284 buf.Length = ACPI_ALLOCATE_BUFFER; 285 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 286 if (ACPI_FAILURE(status)) { 287 device_printf(dev, "attach failed to get Processor obj - %s\n", 288 AcpiFormatException(status)); 289 return (ENXIO); 290 } 291 obj = (ACPI_OBJECT *)buf.Pointer; 292 sc->cpu_p_blk = obj->Processor.PblkAddress; 293 sc->cpu_p_blk_len = obj->Processor.PblkLength; 294 sc->acpi_id = obj->Processor.ProcId; 295 AcpiOsFree(obj); 296 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 297 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 298 299 acpi_sc = acpi_device_get_parent_softc(dev); 300 sysctl_ctx_init(&acpi_cpu_sysctl_ctx); 301 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx, 302 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), 303 OID_AUTO, "cpu", CTLFLAG_RD, 0, ""); 304 305 /* If this is the first device probed, check for quirks. */ 306 if (device_get_unit(dev) == 0) 307 acpi_cpu_quirks(sc); 308 309 /* 310 * Probe for throttling and Cx state support. 311 * If none of these is present, free up unused resources. 312 */ 313 thr_ret = acpi_cpu_throttle_probe(sc); 314 cx_ret = acpi_cpu_cx_probe(sc); 315 if (thr_ret == 0 || cx_ret == 0) { 316 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 317 acpi_cpu_notify, sc); 318 if (device_get_unit(dev) == 0) 319 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL); 320 } else { 321 sysctl_ctx_free(&acpi_cpu_sysctl_ctx); 322 } 323 324 return_VALUE (0); 325 } 326 327 /* 328 * Find the nth present CPU and return its pc_cpuid as well as set the 329 * pc_acpi_id from the most reliable source. 330 */ 331 static int 332 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 333 { 334 struct pcpu *pcpu_data; 335 uint32_t i; 336 337 KASSERT(acpi_id != NULL, ("Null acpi_id")); 338 KASSERT(cpu_id != NULL, ("Null cpu_id")); 339 for (i = 0; i <= mp_maxid; i++) { 340 if (CPU_ABSENT(i)) 341 continue; 342 pcpu_data = pcpu_find(i); 343 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 344 if (idx-- == 0) { 345 /* 346 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 347 * override it with the value from the ASL. Otherwise, if the 348 * two don't match, prefer the MADT-derived value. Finally, 349 * return the pc_cpuid to reference this processor. 350 */ 351 if (pcpu_data->pc_acpi_id == 0xffffffff) 352 pcpu_data->pc_acpi_id = *acpi_id; 353 else if (pcpu_data->pc_acpi_id != *acpi_id) 354 *acpi_id = pcpu_data->pc_acpi_id; 355 *cpu_id = pcpu_data->pc_cpuid; 356 return (0); 357 } 358 } 359 360 return (ESRCH); 361 } 362 363 static int 364 acpi_cpu_shutdown(device_t dev) 365 { 366 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 367 368 /* Disable any entry to the idle function. */ 369 cpu_cx_count = 0; 370 371 /* Signal and wait for all processors to exit acpi_cpu_idle(). */ 372 smp_rendezvous(NULL, NULL, NULL, NULL); 373 374 return_VALUE (0); 375 } 376 377 static int 378 acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc) 379 { 380 uint32_t duty_end; 381 ACPI_BUFFER buf; 382 ACPI_OBJECT obj; 383 ACPI_GENERIC_ADDRESS gas; 384 ACPI_STATUS status; 385 386 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 387 388 /* Get throttling parameters from the FADT. 0 means not supported. */ 389 if (device_get_unit(sc->cpu_dev) == 0) { 390 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd; 391 cpu_pstate_cnt = AcpiGbl_FADT->PstateCnt; 392 cpu_cst_cnt = AcpiGbl_FADT->CstCnt; 393 cpu_duty_offset = AcpiGbl_FADT->DutyOffset; 394 cpu_duty_width = AcpiGbl_FADT->DutyWidth; 395 } 396 if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0) 397 return (ENXIO); 398 399 /* Validate the duty offset/width. */ 400 duty_end = cpu_duty_offset + cpu_duty_width - 1; 401 if (duty_end > 31) { 402 device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n"); 403 return (ENXIO); 404 } 405 if (cpu_duty_offset <= 4 && duty_end >= 4) { 406 device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n"); 407 return (ENXIO); 408 } 409 410 /* 411 * If not present, fall back to using the processor's P_BLK to find 412 * the P_CNT register. 413 * 414 * Note that some systems seem to duplicate the P_BLK pointer 415 * across multiple CPUs, so not getting the resource is not fatal. 416 */ 417 buf.Pointer = &obj; 418 buf.Length = sizeof(obj); 419 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf); 420 if (ACPI_SUCCESS(status)) { 421 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) { 422 device_printf(sc->cpu_dev, "_PTC buffer too small\n"); 423 return (ENXIO); 424 } 425 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas)); 426 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 427 if (sc->cpu_p_cnt != NULL) { 428 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from _PTC\n", 429 device_get_unit(sc->cpu_dev))); 430 } 431 } 432 433 /* If _PTC not present or other failure, try the P_BLK. */ 434 if (sc->cpu_p_cnt == NULL) { 435 /* 436 * The spec says P_BLK must be 6 bytes long. However, some 437 * systems use it to indicate a fractional set of features 438 * present so we take anything >= 4. 439 */ 440 if (sc->cpu_p_blk_len < 4) 441 return (ENXIO); 442 gas.Address = sc->cpu_p_blk; 443 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 444 gas.RegisterBitWidth = 32; 445 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 446 if (sc->cpu_p_cnt != NULL) { 447 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from P_BLK\n", 448 device_get_unit(sc->cpu_dev))); 449 } else { 450 device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n"); 451 return (ENXIO); 452 } 453 } 454 cpu_rid++; 455 456 return (0); 457 } 458 459 static int 460 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 461 { 462 ACPI_GENERIC_ADDRESS gas; 463 struct acpi_cx *cx_ptr; 464 int error; 465 466 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 467 468 /* Bus mastering arbitration control is needed for C3. */ 469 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) { 470 cpu_quirks |= CPU_QUIRK_NO_C3; 471 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 472 "acpi_cpu%d: No BM control, C3 disabled\n", 473 device_get_unit(sc->cpu_dev))); 474 } 475 476 /* 477 * First, check for the ACPI 2.0 _CST sleep states object. 478 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3. 479 */ 480 sc->cpu_cx_count = 0; 481 error = acpi_cpu_cx_cst(sc); 482 if (error != 0) { 483 cx_ptr = sc->cpu_cx_states; 484 485 /* C1 has been required since just after ACPI 1.0 */ 486 cx_ptr->type = ACPI_STATE_C1; 487 cx_ptr->trans_lat = 0; 488 cpu_non_c3 = 0; 489 cx_ptr++; 490 sc->cpu_cx_count++; 491 492 /* 493 * The spec says P_BLK must be 6 bytes long. However, some systems 494 * use it to indicate a fractional set of features present so we 495 * take 5 as C2. Some may also have a value of 7 to indicate 496 * another C3 but most use _CST for this (as required) and having 497 * "only" C1-C3 is not a hardship. 498 */ 499 if (sc->cpu_p_blk_len < 5) 500 goto done; 501 502 /* Validate and allocate resources for C2 (P_LVL2). */ 503 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 504 gas.RegisterBitWidth = 8; 505 if (AcpiGbl_FADT->Plvl2Lat <= 100) { 506 gas.Address = sc->cpu_p_blk + 4; 507 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 508 if (cx_ptr->p_lvlx != NULL) { 509 cpu_rid++; 510 cx_ptr->type = ACPI_STATE_C2; 511 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat; 512 cpu_non_c3 = 1; 513 cx_ptr++; 514 sc->cpu_cx_count++; 515 } 516 } 517 if (sc->cpu_p_blk_len < 6) 518 goto done; 519 520 /* Validate and allocate resources for C3 (P_LVL3). */ 521 if (AcpiGbl_FADT->Plvl3Lat <= 1000 && 522 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) { 523 524 gas.Address = sc->cpu_p_blk + 5; 525 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 526 if (cx_ptr->p_lvlx != NULL) { 527 cpu_rid++; 528 cx_ptr->type = ACPI_STATE_C3; 529 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat; 530 cx_ptr++; 531 sc->cpu_cx_count++; 532 } 533 } 534 } 535 536 done: 537 /* If no valid registers were found, don't attach. */ 538 if (sc->cpu_cx_count == 0) 539 return (ENXIO); 540 541 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 542 sc->cpu_prev_sleep = 1000000; 543 544 return (0); 545 } 546 547 /* 548 * Parse a _CST package and set up its Cx states. Since the _CST object 549 * can change dynamically, our notify handler may call this function 550 * to clean up and probe the new _CST package. 551 */ 552 static int 553 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 554 { 555 struct acpi_cx *cx_ptr; 556 ACPI_STATUS status; 557 ACPI_BUFFER buf; 558 ACPI_OBJECT *top; 559 ACPI_OBJECT *pkg; 560 uint32_t count; 561 int i; 562 563 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 564 565 buf.Pointer = NULL; 566 buf.Length = ACPI_ALLOCATE_BUFFER; 567 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 568 if (ACPI_FAILURE(status)) 569 return (ENXIO); 570 571 /* _CST is a package with a count and at least one Cx package. */ 572 top = (ACPI_OBJECT *)buf.Pointer; 573 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 574 device_printf(sc->cpu_dev, "Invalid _CST package\n"); 575 AcpiOsFree(buf.Pointer); 576 return (ENXIO); 577 } 578 if (count != top->Package.Count - 1) { 579 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n", 580 count, top->Package.Count - 1); 581 count = top->Package.Count - 1; 582 } 583 if (count > MAX_CX_STATES) { 584 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 585 count = MAX_CX_STATES; 586 } 587 588 /* Set up all valid states. */ 589 sc->cpu_cx_count = 0; 590 cx_ptr = sc->cpu_cx_states; 591 for (i = 0; i < count; i++) { 592 pkg = &top->Package.Elements[i + 1]; 593 if (!ACPI_PKG_VALID(pkg, 4) || 594 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 595 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 596 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 597 598 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n"); 599 continue; 600 } 601 602 /* Validate the state to see if we should use it. */ 603 switch (cx_ptr->type) { 604 case ACPI_STATE_C1: 605 cpu_non_c3 = i; 606 cx_ptr++; 607 sc->cpu_cx_count++; 608 continue; 609 case ACPI_STATE_C2: 610 if (cx_ptr->trans_lat > 100) { 611 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 612 "acpi_cpu%d: C2[%d] not available.\n", 613 device_get_unit(sc->cpu_dev), i)); 614 continue; 615 } 616 cpu_non_c3 = i; 617 break; 618 case ACPI_STATE_C3: 619 default: 620 if (cx_ptr->trans_lat > 1000 || 621 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 622 623 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 624 "acpi_cpu%d: C3[%d] not available.\n", 625 device_get_unit(sc->cpu_dev), i)); 626 continue; 627 } 628 break; 629 } 630 631 #ifdef notyet 632 /* Free up any previous register. */ 633 if (cx_ptr->p_lvlx != NULL) { 634 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 635 cx_ptr->p_lvlx = NULL; 636 } 637 #endif 638 639 /* Allocate the control register for C2 or C3. */ 640 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cpu_rid, &cx_ptr->p_lvlx); 641 if (cx_ptr->p_lvlx != NULL) { 642 cpu_rid++; 643 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 644 "acpi_cpu%d: Got C%d - %d latency\n", 645 device_get_unit(sc->cpu_dev), cx_ptr->type, 646 cx_ptr->trans_lat)); 647 cx_ptr++; 648 sc->cpu_cx_count++; 649 } 650 } 651 AcpiOsFree(buf.Pointer); 652 653 return (0); 654 } 655 656 /* 657 * Call this *after* all CPUs have been attached. 658 */ 659 static void 660 acpi_cpu_startup(void *arg) 661 { 662 struct acpi_cpu_softc *sc; 663 int count, i; 664 665 /* Get set of CPU devices */ 666 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 667 668 /* 669 * Make sure all the processors' Cx counts match. We should probably 670 * also check the contents of each. However, no known systems have 671 * non-matching Cx counts so we'll deal with this later. 672 */ 673 count = MAX_CX_STATES; 674 for (i = 0; i < cpu_ndevices; i++) { 675 sc = device_get_softc(cpu_devices[i]); 676 count = min(sc->cpu_cx_count, count); 677 } 678 cpu_cx_count = count; 679 680 /* Perform throttling and Cx final initialization. */ 681 sc = device_get_softc(cpu_devices[0]); 682 if (sc->cpu_p_cnt != NULL) 683 acpi_cpu_startup_throttling(); 684 if (cpu_cx_count > 0) 685 acpi_cpu_startup_cx(); 686 } 687 688 /* 689 * Takes the ACPI lock to avoid fighting anyone over the SMI command 690 * port. 691 */ 692 static void 693 acpi_cpu_startup_throttling() 694 { 695 696 /* Initialise throttling states */ 697 cpu_throttle_max = CPU_MAX_SPEED; 698 cpu_throttle_state = CPU_MAX_SPEED; 699 700 SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx, 701 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 702 OID_AUTO, "throttle_max", CTLFLAG_RD, 703 &cpu_throttle_max, 0, "maximum CPU speed"); 704 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 705 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 706 OID_AUTO, "throttle_state", 707 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_state, 708 0, acpi_cpu_throttle_sysctl, "I", "current CPU speed"); 709 710 /* If ACPI 2.0+, signal platform that we are taking over throttling. */ 711 if (cpu_pstate_cnt != 0) { 712 ACPI_LOCK(acpi); 713 AcpiOsWritePort(cpu_smi_cmd, cpu_pstate_cnt, 8); 714 ACPI_UNLOCK(acpi); 715 } 716 717 /* Set initial speed to maximum. */ 718 ACPI_SERIAL_BEGIN(cpu); 719 acpi_cpu_throttle_set(cpu_throttle_max); 720 ACPI_SERIAL_END(cpu); 721 722 printf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), " 723 "currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1), 724 CPU_SPEED_PRINTABLE(cpu_throttle_state)); 725 } 726 727 static void 728 acpi_cpu_startup_cx() 729 { 730 struct acpi_cpu_softc *sc; 731 struct sbuf sb; 732 int i; 733 734 sc = device_get_softc(cpu_devices[0]); 735 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN); 736 for (i = 0; i < cpu_cx_count; i++) 737 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 738 sbuf_trim(&sb); 739 sbuf_finish(&sb); 740 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx, 741 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 742 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported, 743 0, "Cx/microsecond values for supported Cx states"); 744 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 745 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 746 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 747 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A", 748 "lowest Cx sleep state to use"); 749 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 750 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 751 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 752 NULL, 0, acpi_cpu_usage_sysctl, "A", 753 "percent usage for each Cx state"); 754 755 #ifdef notyet 756 /* Signal platform that we can handle _CST notification. */ 757 if (cpu_cst_cnt != 0) { 758 ACPI_LOCK(acpi); 759 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 760 ACPI_UNLOCK(acpi); 761 } 762 #endif 763 764 /* Take over idling from cpu_idle_default(). */ 765 cpu_idle_hook = acpi_cpu_idle; 766 } 767 768 /* 769 * Set CPUs to the new state. 770 * 771 * Must be called with the ACPI lock held. 772 */ 773 static void 774 acpi_cpu_throttle_set(uint32_t speed) 775 { 776 struct acpi_cpu_softc *sc; 777 int i; 778 uint32_t p_cnt, clk_val; 779 780 ACPI_SERIAL_ASSERT(cpu); 781 782 /* Iterate over processors */ 783 for (i = 0; i < cpu_ndevices; i++) { 784 sc = device_get_softc(cpu_devices[i]); 785 if (sc->cpu_p_cnt == NULL) 786 continue; 787 788 /* Get the current P_CNT value and disable throttling */ 789 p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4); 790 p_cnt &= ~CPU_P_CNT_THT_EN; 791 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 792 793 /* If we're at maximum speed, that's all */ 794 if (speed < CPU_MAX_SPEED) { 795 /* Mask the old CLK_VAL off and or-in the new value */ 796 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset; 797 p_cnt &= ~clk_val; 798 p_cnt |= (speed << cpu_duty_offset); 799 800 /* Write the new P_CNT value and then enable throttling */ 801 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 802 p_cnt |= CPU_P_CNT_THT_EN; 803 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 804 } 805 ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev), 806 "set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed)); 807 } 808 cpu_throttle_state = speed; 809 } 810 811 /* 812 * Idle the CPU in the lowest state possible. This function is called with 813 * interrupts disabled. Note that once it re-enables interrupts, a task 814 * switch can occur so do not access shared data (i.e. the softc) after 815 * interrupts are re-enabled. 816 */ 817 static void 818 acpi_cpu_idle() 819 { 820 struct acpi_cpu_softc *sc; 821 struct acpi_cx *cx_next; 822 uint32_t start_time, end_time; 823 int bm_active, cx_next_idx, i; 824 825 /* If disabled, return immediately. */ 826 if (cpu_cx_count == 0) { 827 ACPI_ENABLE_IRQS(); 828 return; 829 } 830 831 /* 832 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 833 * since there is no ACPI processor object for this CPU. This occurs 834 * for logical CPUs in the HTT case. 835 */ 836 sc = cpu_softc[PCPU_GET(cpuid)]; 837 if (sc == NULL) { 838 acpi_cpu_c1(); 839 return; 840 } 841 842 /* 843 * If we slept 100 us or more, use the lowest Cx state. Otherwise, 844 * find the lowest state that has a latency less than or equal to 845 * the length of our last sleep. 846 */ 847 cx_next_idx = cpu_cx_lowest; 848 if (sc->cpu_prev_sleep < 100) 849 for (i = cpu_cx_lowest; i >= 0; i--) 850 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) { 851 cx_next_idx = i; 852 break; 853 } 854 855 /* 856 * Check for bus master activity. If there was activity, clear 857 * the bit and use the lowest non-C3 state. Note that the USB 858 * driver polling for new devices keeps this bit set all the 859 * time if USB is loaded. 860 */ 861 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active, 862 ACPI_MTX_DO_NOT_LOCK); 863 if (bm_active != 0) { 864 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1, 865 ACPI_MTX_DO_NOT_LOCK); 866 cx_next_idx = min(cx_next_idx, cpu_non_c3); 867 } 868 869 /* Select the next state and update statistics. */ 870 cx_next = &sc->cpu_cx_states[cx_next_idx]; 871 cpu_cx_stats[cx_next_idx]++; 872 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 873 874 /* 875 * Execute HLT (or equivalent) and wait for an interrupt. We can't 876 * calculate the time spent in C1 since the place we wake up is an 877 * ISR. Assume we slept one quantum and return. 878 */ 879 if (cx_next->type == ACPI_STATE_C1) { 880 sc->cpu_prev_sleep = 1000000 / hz; 881 acpi_cpu_c1(); 882 return; 883 } 884 885 /* For C3, disable bus master arbitration and enable bus master wake. */ 886 if (cx_next->type == ACPI_STATE_C3) { 887 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK); 888 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1, ACPI_MTX_DO_NOT_LOCK); 889 } 890 891 /* 892 * Read from P_LVLx to enter C2(+), checking time spent asleep. 893 * Use the ACPI timer for measuring sleep time. Since we need to 894 * get the time very close to the CPU start/stop clock logic, this 895 * is the only reliable time source. 896 */ 897 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk); 898 CPU_GET_REG(cx_next->p_lvlx, 1); 899 900 /* 901 * Read the end time twice. Since it may take an arbitrary time 902 * to enter the idle state, the first read may be executed before 903 * the processor has stopped. Doing it again provides enough 904 * margin that we are certain to have a correct value. 905 */ 906 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 907 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 908 909 /* Enable bus master arbitration and disable bus master wakeup. */ 910 if (cx_next->type == ACPI_STATE_C3) { 911 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK); 912 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK); 913 } 914 915 /* Find the actual time asleep in microseconds, minus overhead. */ 916 end_time = acpi_TimerDelta(end_time, start_time); 917 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat; 918 ACPI_ENABLE_IRQS(); 919 } 920 921 /* Put the CPU in C1 in a machine-dependant way. */ 922 static void 923 acpi_cpu_c1() 924 { 925 #ifdef __ia64__ 926 ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0); 927 #else 928 __asm __volatile("sti; hlt"); 929 #endif 930 } 931 932 /* 933 * Re-evaluate the _PSS and _CST objects when we are notified that they 934 * have changed. 935 * 936 * XXX Re-evaluation disabled until locking is done. 937 */ 938 static void 939 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 940 { 941 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 942 943 switch (notify) { 944 case ACPI_CPU_NOTIFY_PERF_STATES: 945 device_printf(sc->cpu_dev, "Performance states changed\n"); 946 /* acpi_cpu_px_available(sc); */ 947 break; 948 case ACPI_CPU_NOTIFY_CX_STATES: 949 device_printf(sc->cpu_dev, "Cx states changed\n"); 950 /* acpi_cpu_cx_cst(sc); */ 951 break; 952 default: 953 device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify); 954 break; 955 } 956 } 957 958 static int 959 acpi_cpu_quirks(struct acpi_cpu_softc *sc) 960 { 961 962 /* 963 * C3 is not supported on multiple CPUs since this would require 964 * flushing all caches which is currently too expensive. 965 */ 966 if (mp_ncpus > 1) 967 cpu_quirks |= CPU_QUIRK_NO_C3; 968 969 #ifdef notyet 970 /* Look for various quirks of the PIIX4 part. */ 971 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 972 if (acpi_dev != NULL) { 973 switch (pci_get_revid(acpi_dev)) { 974 /* 975 * Disable throttling control on PIIX4 A and B-step. 976 * See specification changes #13 ("Manual Throttle Duty Cycle") 977 * and #14 ("Enabling and Disabling Manual Throttle"), plus 978 * erratum #5 ("STPCLK# Deassertion Time") from the January 979 * 2002 PIIX4 specification update. Note that few (if any) 980 * mobile systems ever used this part. 981 */ 982 case PCI_REVISION_A_STEP: 983 case PCI_REVISION_B_STEP: 984 cpu_quirks |= CPU_QUIRK_NO_THROTTLE; 985 /* FALLTHROUGH */ 986 /* 987 * Disable C3 support for all PIIX4 chipsets. Some of these parts 988 * do not report the BMIDE status to the BM status register and 989 * others have a livelock bug if Type-F DMA is enabled. Linux 990 * works around the BMIDE bug by reading the BM status directly 991 * but we take the simpler approach of disabling C3 for these 992 * parts. 993 * 994 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 995 * Livelock") from the January 2002 PIIX4 specification update. 996 * Applies to all PIIX4 models. 997 */ 998 case PCI_REVISION_4E: 999 case PCI_REVISION_4M: 1000 cpu_quirks |= CPU_QUIRK_NO_C3; 1001 break; 1002 default: 1003 break; 1004 } 1005 } 1006 #endif 1007 1008 return (0); 1009 } 1010 1011 /* Handle changes in the CPU throttling setting. */ 1012 static int 1013 acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS) 1014 { 1015 uint32_t *argp; 1016 uint32_t arg; 1017 int error; 1018 1019 argp = (uint32_t *)oidp->oid_arg1; 1020 arg = *argp; 1021 error = sysctl_handle_int(oidp, &arg, 0, req); 1022 1023 /* Error or no new value */ 1024 if (error != 0 || req->newptr == NULL) 1025 return (error); 1026 if (arg < 1 || arg > cpu_throttle_max) 1027 return (EINVAL); 1028 1029 /* If throttling changed, notify the BIOS of the new rate. */ 1030 ACPI_SERIAL_BEGIN(cpu); 1031 if (*argp != arg) { 1032 *argp = arg; 1033 acpi_cpu_throttle_set(arg); 1034 } 1035 ACPI_SERIAL_END(cpu); 1036 1037 return (0); 1038 } 1039 1040 static int 1041 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 1042 { 1043 struct sbuf sb; 1044 char buf[128]; 1045 int i; 1046 uintmax_t fract, sum, whole; 1047 1048 sum = 0; 1049 for (i = 0; i < cpu_cx_count; i++) 1050 sum += cpu_cx_stats[i]; 1051 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1052 for (i = 0; i < cpu_cx_count; i++) { 1053 if (sum > 0) { 1054 whole = (uintmax_t)cpu_cx_stats[i] * 100; 1055 fract = (whole % sum) * 100; 1056 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 1057 (u_int)(fract / sum)); 1058 } else 1059 sbuf_printf(&sb, "0%% "); 1060 } 1061 sbuf_trim(&sb); 1062 sbuf_finish(&sb); 1063 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1064 sbuf_delete(&sb); 1065 1066 return (0); 1067 } 1068 1069 static int 1070 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1071 { 1072 struct acpi_cpu_softc *sc; 1073 char state[8]; 1074 int val, error, i; 1075 1076 sc = device_get_softc(cpu_devices[0]); 1077 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1078 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1079 if (error != 0 || req->newptr == NULL) 1080 return (error); 1081 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1082 return (EINVAL); 1083 val = (int) strtol(state + 1, NULL, 10) - 1; 1084 if (val < 0 || val > cpu_cx_count - 1) 1085 return (EINVAL); 1086 1087 ACPI_SERIAL_BEGIN(cpu); 1088 cpu_cx_lowest = val; 1089 1090 /* If not disabling, cache the new lowest non-C3 state. */ 1091 cpu_non_c3 = 0; 1092 for (i = cpu_cx_lowest; i >= 0; i--) { 1093 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1094 cpu_non_c3 = i; 1095 break; 1096 } 1097 } 1098 1099 /* Reset the statistics counters. */ 1100 bzero(cpu_cx_stats, sizeof(cpu_cx_stats)); 1101 ACPI_SERIAL_END(cpu); 1102 1103 return (0); 1104 } 1105