1 /*- 2 * Copyright (c) 2003 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/module.h> 37 #include <sys/pcpu.h> 38 #include <sys/power.h> 39 #include <sys/proc.h> 40 #include <sys/sbuf.h> 41 #include <sys/smp.h> 42 43 #include <dev/pci/pcivar.h> 44 #include <machine/atomic.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 48 #include "acpi.h" 49 #include <dev/acpica/acpivar.h> 50 51 /* 52 * Support for ACPI Processor devices, including ACPI 2.0 throttling 53 * and C[1-3] sleep states. 54 * 55 * TODO: implement scans of all CPUs to be sure all Cx states are 56 * equivalent. 57 */ 58 59 /* Hooks for the ACPI CA debugging infrastructure */ 60 #define _COMPONENT ACPI_PROCESSOR 61 ACPI_MODULE_NAME("PROCESSOR") 62 63 struct acpi_cx { 64 struct resource *p_lvlx; /* Register to read to enter state. */ 65 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 66 uint32_t trans_lat; /* Transition latency (usec). */ 67 uint32_t power; /* Power consumed (mW). */ 68 }; 69 #define MAX_CX_STATES 8 70 71 struct acpi_cpu_softc { 72 device_t cpu_dev; 73 ACPI_HANDLE cpu_handle; 74 uint32_t acpi_id; /* ACPI processor id */ 75 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 76 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 77 struct resource *cpu_p_cnt; /* Throttling control register */ 78 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 79 int cpu_cx_count; /* Number of valid Cx states. */ 80 int cpu_prev_sleep;/* Last idle sleep duration. */ 81 }; 82 83 #define CPU_GET_REG(reg, width) \ 84 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 85 rman_get_bushandle((reg)), 0)) 86 #define CPU_SET_REG(reg, width, val) \ 87 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 88 rman_get_bushandle((reg)), 0, (val))) 89 90 /* 91 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and 92 * reported to the user in tenths of a percent. 93 */ 94 static uint32_t cpu_duty_offset; 95 static uint32_t cpu_duty_width; 96 #define CPU_MAX_SPEED (1 << cpu_duty_width) 97 #define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED) 98 #define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \ 99 (CPU_SPEED_PERCENT(x) % 10) 100 #define CPU_P_CNT_THT_EN (1<<4) 101 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 102 103 #define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */ 104 #define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 105 106 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */ 107 #define CPU_QUIRK_NO_THROTTLE (1<<1) /* Throttling is not usable. */ 108 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */ 109 110 #define PCI_VENDOR_INTEL 0x8086 111 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 112 #define PCI_REVISION_A_STEP 0 113 #define PCI_REVISION_B_STEP 1 114 #define PCI_REVISION_4E 2 115 #define PCI_REVISION_4M 3 116 117 /* Platform hardware resource information. */ 118 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 119 static uint8_t cpu_pstate_cnt;/* Register to take over throttling. */ 120 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 121 static int cpu_rid; /* Driver-wide resource id. */ 122 static int cpu_quirks; /* Indicate any hardware bugs. */ 123 124 /* Runtime state. */ 125 static int cpu_cx_count; /* Number of valid states */ 126 static int cpu_non_c3; /* Index of lowest non-C3 state. */ 127 static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 128 129 /* Values for sysctl. */ 130 static uint32_t cpu_throttle_state; 131 static uint32_t cpu_throttle_max; 132 static int cpu_cx_lowest; 133 static char cpu_cx_supported[64]; 134 135 static device_t *cpu_devices; 136 static int cpu_ndevices; 137 static struct acpi_cpu_softc **cpu_softc; 138 ACPI_SERIAL_DECL(cpu, "ACPI CPU"); 139 140 static struct sysctl_ctx_list acpi_cpu_sysctl_ctx; 141 static struct sysctl_oid *acpi_cpu_sysctl_tree; 142 143 static int acpi_cpu_probe(device_t dev); 144 static int acpi_cpu_attach(device_t dev); 145 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 146 uint32_t *cpu_id); 147 static int acpi_cpu_shutdown(device_t dev); 148 static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc); 149 static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 150 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 151 static void acpi_cpu_startup(void *arg); 152 static void acpi_cpu_startup_throttling(void); 153 static void acpi_cpu_startup_cx(void); 154 static void acpi_cpu_throttle_set(uint32_t speed); 155 static void acpi_cpu_idle(void); 156 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 157 static int acpi_cpu_quirks(struct acpi_cpu_softc *sc); 158 static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS); 159 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 160 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 161 162 static device_method_t acpi_cpu_methods[] = { 163 /* Device interface */ 164 DEVMETHOD(device_probe, acpi_cpu_probe), 165 DEVMETHOD(device_attach, acpi_cpu_attach), 166 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 167 168 {0, 0} 169 }; 170 171 static driver_t acpi_cpu_driver = { 172 "cpu", 173 acpi_cpu_methods, 174 sizeof(struct acpi_cpu_softc), 175 }; 176 177 static devclass_t acpi_cpu_devclass; 178 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 179 MODULE_DEPEND(cpu, acpi, 1, 1, 1); 180 181 static int 182 acpi_cpu_probe(device_t dev) 183 { 184 int acpi_id, cpu_id, cx_count; 185 ACPI_BUFFER buf; 186 ACPI_HANDLE handle; 187 char msg[32]; 188 ACPI_OBJECT *obj; 189 ACPI_STATUS status; 190 191 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 192 return (ENXIO); 193 194 handle = acpi_get_handle(dev); 195 if (cpu_softc == NULL) 196 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 197 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 198 199 /* Get our Processor object. */ 200 buf.Pointer = NULL; 201 buf.Length = ACPI_ALLOCATE_BUFFER; 202 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 203 if (ACPI_FAILURE(status)) { 204 device_printf(dev, "probe failed to get Processor obj - %s\n", 205 AcpiFormatException(status)); 206 return (ENXIO); 207 } 208 obj = (ACPI_OBJECT *)buf.Pointer; 209 if (obj->Type != ACPI_TYPE_PROCESSOR) { 210 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 211 AcpiOsFree(obj); 212 return (ENXIO); 213 } 214 215 /* 216 * Find the processor associated with our unit. We could use the 217 * ProcId as a key, however, some boxes do not have the same values 218 * in their Processor object as the ProcId values in the MADT. 219 */ 220 acpi_id = obj->Processor.ProcId; 221 AcpiOsFree(obj); 222 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 223 return (ENXIO); 224 225 /* 226 * Check if we already probed this processor. We scan the bus twice 227 * so it's possible we've already seen this one. 228 */ 229 if (cpu_softc[cpu_id] != NULL) 230 return (ENXIO); 231 232 /* Get a count of Cx states for our device string. */ 233 cx_count = 0; 234 buf.Pointer = NULL; 235 buf.Length = ACPI_ALLOCATE_BUFFER; 236 status = AcpiEvaluateObject(handle, "_CST", NULL, &buf); 237 if (ACPI_SUCCESS(status)) { 238 obj = (ACPI_OBJECT *)buf.Pointer; 239 if (ACPI_PKG_VALID(obj, 2)) 240 acpi_PkgInt32(obj, 0, &cx_count); 241 AcpiOsFree(obj); 242 } else { 243 if (AcpiGbl_FADT->Plvl2Lat <= 100) 244 cx_count++; 245 if (AcpiGbl_FADT->Plvl3Lat <= 1000) 246 cx_count++; 247 if (cx_count > 0) 248 cx_count++; 249 } 250 if (cx_count > 0) 251 snprintf(msg, sizeof(msg), "ACPI CPU (%d Cx states)", cx_count); 252 else 253 strlcpy(msg, "ACPI CPU", sizeof(msg)); 254 device_set_desc_copy(dev, msg); 255 256 /* Mark this processor as in-use and save our derived id for attach. */ 257 cpu_softc[cpu_id] = (void *)1; 258 acpi_set_magic(dev, cpu_id); 259 260 return (0); 261 } 262 263 static int 264 acpi_cpu_attach(device_t dev) 265 { 266 ACPI_BUFFER buf; 267 ACPI_OBJECT *obj; 268 struct acpi_cpu_softc *sc; 269 struct acpi_softc *acpi_sc; 270 ACPI_STATUS status; 271 int thr_ret, cx_ret; 272 273 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 274 275 sc = device_get_softc(dev); 276 sc->cpu_dev = dev; 277 sc->cpu_handle = acpi_get_handle(dev); 278 cpu_softc[acpi_get_magic(dev)] = sc; 279 280 buf.Pointer = NULL; 281 buf.Length = ACPI_ALLOCATE_BUFFER; 282 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 283 if (ACPI_FAILURE(status)) { 284 device_printf(dev, "attach failed to get Processor obj - %s\n", 285 AcpiFormatException(status)); 286 return (ENXIO); 287 } 288 obj = (ACPI_OBJECT *)buf.Pointer; 289 sc->cpu_p_blk = obj->Processor.PblkAddress; 290 sc->cpu_p_blk_len = obj->Processor.PblkLength; 291 sc->acpi_id = obj->Processor.ProcId; 292 AcpiOsFree(obj); 293 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 294 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 295 296 acpi_sc = acpi_device_get_parent_softc(dev); 297 sysctl_ctx_init(&acpi_cpu_sysctl_ctx); 298 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx, 299 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), 300 OID_AUTO, "cpu", CTLFLAG_RD, 0, ""); 301 302 /* 303 * Probe for throttling and Cx state support. 304 * If none of these is present, free up unused resources. 305 */ 306 thr_ret = acpi_cpu_throttle_probe(sc); 307 cx_ret = acpi_cpu_cx_probe(sc); 308 if (thr_ret == 0 || cx_ret == 0) { 309 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 310 acpi_cpu_notify, sc); 311 if (device_get_unit(dev) == 0) 312 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL); 313 } else { 314 sysctl_ctx_free(&acpi_cpu_sysctl_ctx); 315 } 316 317 return_VALUE (0); 318 } 319 320 /* 321 * Find the nth present CPU and return its pc_cpuid as well as set the 322 * pc_acpi_id from the most reliable source. 323 */ 324 static int 325 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 326 { 327 struct pcpu *pcpu_data; 328 uint32_t i; 329 330 KASSERT(acpi_id != NULL, ("Null acpi_id")); 331 KASSERT(cpu_id != NULL, ("Null cpu_id")); 332 for (i = 0; i <= mp_maxid; i++) { 333 if (CPU_ABSENT(i)) 334 continue; 335 pcpu_data = pcpu_find(i); 336 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 337 if (idx-- == 0) { 338 /* 339 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 340 * override it with the value from the ASL. Otherwise, if the 341 * two don't match, prefer the MADT-derived value. Finally, 342 * return the pc_cpuid to reference this processor. 343 */ 344 if (pcpu_data->pc_acpi_id == 0xffffffff) 345 pcpu_data->pc_acpi_id = *acpi_id; 346 else if (pcpu_data->pc_acpi_id != *acpi_id) 347 *acpi_id = pcpu_data->pc_acpi_id; 348 *cpu_id = pcpu_data->pc_cpuid; 349 return (0); 350 } 351 } 352 353 return (ESRCH); 354 } 355 356 static int 357 acpi_cpu_shutdown(device_t dev) 358 { 359 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 360 361 /* Disable any entry to the idle function. */ 362 cpu_cx_count = 0; 363 364 /* Signal and wait for all processors to exit acpi_cpu_idle(). */ 365 smp_rendezvous(NULL, NULL, NULL, NULL); 366 367 return_VALUE (0); 368 } 369 370 static int 371 acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc) 372 { 373 uint32_t duty_end; 374 ACPI_BUFFER buf; 375 ACPI_OBJECT obj; 376 ACPI_GENERIC_ADDRESS gas; 377 ACPI_STATUS status; 378 379 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 380 381 /* Get throttling parameters from the FADT. 0 means not supported. */ 382 if (device_get_unit(sc->cpu_dev) == 0) { 383 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd; 384 cpu_pstate_cnt = AcpiGbl_FADT->PstateCnt; 385 cpu_cst_cnt = AcpiGbl_FADT->CstCnt; 386 cpu_duty_offset = AcpiGbl_FADT->DutyOffset; 387 cpu_duty_width = AcpiGbl_FADT->DutyWidth; 388 } 389 if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0) 390 return (ENXIO); 391 392 /* Validate the duty offset/width. */ 393 duty_end = cpu_duty_offset + cpu_duty_width - 1; 394 if (duty_end > 31) { 395 device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n"); 396 return (ENXIO); 397 } 398 if (cpu_duty_offset <= 4 && duty_end >= 4) { 399 device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n"); 400 return (ENXIO); 401 } 402 403 /* 404 * If not present, fall back to using the processor's P_BLK to find 405 * the P_CNT register. 406 * 407 * Note that some systems seem to duplicate the P_BLK pointer 408 * across multiple CPUs, so not getting the resource is not fatal. 409 */ 410 buf.Pointer = &obj; 411 buf.Length = sizeof(obj); 412 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf); 413 if (ACPI_SUCCESS(status)) { 414 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) { 415 device_printf(sc->cpu_dev, "_PTC buffer too small\n"); 416 return (ENXIO); 417 } 418 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas)); 419 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 420 if (sc->cpu_p_cnt != NULL) { 421 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from _PTC\n", 422 device_get_unit(sc->cpu_dev))); 423 } 424 } 425 426 /* If _PTC not present or other failure, try the P_BLK. */ 427 if (sc->cpu_p_cnt == NULL) { 428 /* 429 * The spec says P_BLK must be 6 bytes long. However, some 430 * systems use it to indicate a fractional set of features 431 * present so we take anything >= 4. 432 */ 433 if (sc->cpu_p_blk_len < 4) 434 return (ENXIO); 435 gas.Address = sc->cpu_p_blk; 436 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 437 gas.RegisterBitWidth = 32; 438 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 439 if (sc->cpu_p_cnt != NULL) { 440 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from P_BLK\n", 441 device_get_unit(sc->cpu_dev))); 442 } else { 443 device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n"); 444 return (ENXIO); 445 } 446 } 447 cpu_rid++; 448 449 return (0); 450 } 451 452 static int 453 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 454 { 455 ACPI_GENERIC_ADDRESS gas; 456 struct acpi_cx *cx_ptr; 457 int error; 458 459 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 460 461 /* 462 * Bus mastering arbitration control is needed to keep caches coherent 463 * while sleeping in C3. If it's not present but a working flush cache 464 * instruction is present, flush the caches before entering C3 instead. 465 * Otherwise, just disable C3 completely. 466 */ 467 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) { 468 if (AcpiGbl_FADT->WbInvd && AcpiGbl_FADT->WbInvdFlush == 0) { 469 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 470 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 471 "acpi_cpu%d: no BM control, using flush cache method\n", 472 device_get_unit(sc->cpu_dev))); 473 } else { 474 cpu_quirks |= CPU_QUIRK_NO_C3; 475 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 476 "acpi_cpu%d: no BM control, C3 not available\n", 477 device_get_unit(sc->cpu_dev))); 478 } 479 } 480 481 /* 482 * First, check for the ACPI 2.0 _CST sleep states object. 483 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3. 484 */ 485 sc->cpu_cx_count = 0; 486 error = acpi_cpu_cx_cst(sc); 487 if (error != 0) { 488 cx_ptr = sc->cpu_cx_states; 489 490 /* C1 has been required since just after ACPI 1.0 */ 491 cx_ptr->type = ACPI_STATE_C1; 492 cx_ptr->trans_lat = 0; 493 cpu_non_c3 = 0; 494 cx_ptr++; 495 sc->cpu_cx_count++; 496 497 /* 498 * The spec says P_BLK must be 6 bytes long. However, some systems 499 * use it to indicate a fractional set of features present so we 500 * take 5 as C2. Some may also have a value of 7 to indicate 501 * another C3 but most use _CST for this (as required) and having 502 * "only" C1-C3 is not a hardship. 503 */ 504 if (sc->cpu_p_blk_len < 5) 505 goto done; 506 507 /* Validate and allocate resources for C2 (P_LVL2). */ 508 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 509 gas.RegisterBitWidth = 8; 510 if (AcpiGbl_FADT->Plvl2Lat <= 100) { 511 gas.Address = sc->cpu_p_blk + 4; 512 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 513 if (cx_ptr->p_lvlx != NULL) { 514 cpu_rid++; 515 cx_ptr->type = ACPI_STATE_C2; 516 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat; 517 cpu_non_c3 = 1; 518 cx_ptr++; 519 sc->cpu_cx_count++; 520 } 521 } 522 if (sc->cpu_p_blk_len < 6) 523 goto done; 524 525 /* Validate and allocate resources for C3 (P_LVL3). */ 526 if (AcpiGbl_FADT->Plvl3Lat <= 1000 && 527 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) { 528 529 gas.Address = sc->cpu_p_blk + 5; 530 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 531 if (cx_ptr->p_lvlx != NULL) { 532 cpu_rid++; 533 cx_ptr->type = ACPI_STATE_C3; 534 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat; 535 cx_ptr++; 536 sc->cpu_cx_count++; 537 } 538 } 539 } 540 541 done: 542 /* If no valid registers were found, don't attach. */ 543 if (sc->cpu_cx_count == 0) 544 return (ENXIO); 545 546 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 547 sc->cpu_prev_sleep = 1000000; 548 549 return (0); 550 } 551 552 /* 553 * Parse a _CST package and set up its Cx states. Since the _CST object 554 * can change dynamically, our notify handler may call this function 555 * to clean up and probe the new _CST package. 556 */ 557 static int 558 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 559 { 560 struct acpi_cx *cx_ptr; 561 ACPI_STATUS status; 562 ACPI_BUFFER buf; 563 ACPI_OBJECT *top; 564 ACPI_OBJECT *pkg; 565 uint32_t count; 566 int i; 567 568 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 569 570 buf.Pointer = NULL; 571 buf.Length = ACPI_ALLOCATE_BUFFER; 572 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 573 if (ACPI_FAILURE(status)) 574 return (ENXIO); 575 576 /* _CST is a package with a count and at least one Cx package. */ 577 top = (ACPI_OBJECT *)buf.Pointer; 578 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 579 device_printf(sc->cpu_dev, "Invalid _CST package\n"); 580 AcpiOsFree(buf.Pointer); 581 return (ENXIO); 582 } 583 if (count != top->Package.Count - 1) { 584 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n", 585 count, top->Package.Count - 1); 586 count = top->Package.Count - 1; 587 } 588 if (count > MAX_CX_STATES) { 589 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 590 count = MAX_CX_STATES; 591 } 592 593 /* Set up all valid states. */ 594 sc->cpu_cx_count = 0; 595 cx_ptr = sc->cpu_cx_states; 596 for (i = 0; i < count; i++) { 597 pkg = &top->Package.Elements[i + 1]; 598 if (!ACPI_PKG_VALID(pkg, 4) || 599 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 600 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 601 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 602 603 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n"); 604 continue; 605 } 606 607 /* Validate the state to see if we should use it. */ 608 switch (cx_ptr->type) { 609 case ACPI_STATE_C1: 610 cpu_non_c3 = i; 611 cx_ptr++; 612 sc->cpu_cx_count++; 613 continue; 614 case ACPI_STATE_C2: 615 if (cx_ptr->trans_lat > 100) { 616 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 617 "acpi_cpu%d: C2[%d] not available.\n", 618 device_get_unit(sc->cpu_dev), i)); 619 continue; 620 } 621 cpu_non_c3 = i; 622 break; 623 case ACPI_STATE_C3: 624 default: 625 if (cx_ptr->trans_lat > 1000 || 626 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 627 628 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 629 "acpi_cpu%d: C3[%d] not available.\n", 630 device_get_unit(sc->cpu_dev), i)); 631 continue; 632 } 633 break; 634 } 635 636 #ifdef notyet 637 /* Free up any previous register. */ 638 if (cx_ptr->p_lvlx != NULL) { 639 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 640 cx_ptr->p_lvlx = NULL; 641 } 642 #endif 643 644 /* Allocate the control register for C2 or C3. */ 645 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cpu_rid, &cx_ptr->p_lvlx); 646 if (cx_ptr->p_lvlx != NULL) { 647 cpu_rid++; 648 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 649 "acpi_cpu%d: Got C%d - %d latency\n", 650 device_get_unit(sc->cpu_dev), cx_ptr->type, 651 cx_ptr->trans_lat)); 652 cx_ptr++; 653 sc->cpu_cx_count++; 654 } 655 } 656 AcpiOsFree(buf.Pointer); 657 658 return (0); 659 } 660 661 /* 662 * Call this *after* all CPUs have been attached. 663 */ 664 static void 665 acpi_cpu_startup(void *arg) 666 { 667 struct acpi_cpu_softc *sc; 668 int count, i; 669 670 /* Get set of CPU devices */ 671 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 672 673 /* Check for quirks via the first CPU device. */ 674 sc = device_get_softc(cpu_devices[0]); 675 acpi_cpu_quirks(sc); 676 677 /* 678 * Make sure all the processors' Cx counts match. We should probably 679 * also check the contents of each. However, no known systems have 680 * non-matching Cx counts so we'll deal with this later. 681 */ 682 count = MAX_CX_STATES; 683 for (i = 0; i < cpu_ndevices; i++) { 684 sc = device_get_softc(cpu_devices[i]); 685 count = min(sc->cpu_cx_count, count); 686 } 687 cpu_cx_count = count; 688 689 /* Perform throttling and Cx final initialization. */ 690 sc = device_get_softc(cpu_devices[0]); 691 if (sc->cpu_p_cnt != NULL) 692 acpi_cpu_startup_throttling(); 693 if (cpu_cx_count > 0) 694 acpi_cpu_startup_cx(); 695 } 696 697 /* 698 * Takes the ACPI lock to avoid fighting anyone over the SMI command 699 * port. 700 */ 701 static void 702 acpi_cpu_startup_throttling() 703 { 704 705 /* If throttling is not usable, don't initialize it. */ 706 if (cpu_quirks & CPU_QUIRK_NO_THROTTLE) 707 return; 708 709 /* Initialise throttling states */ 710 cpu_throttle_max = CPU_MAX_SPEED; 711 cpu_throttle_state = CPU_MAX_SPEED; 712 713 SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx, 714 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 715 OID_AUTO, "throttle_max", CTLFLAG_RD, 716 &cpu_throttle_max, 0, "maximum CPU speed"); 717 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 718 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 719 OID_AUTO, "throttle_state", 720 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_state, 721 0, acpi_cpu_throttle_sysctl, "I", "current CPU speed"); 722 723 /* If ACPI 2.0+, signal platform that we are taking over throttling. */ 724 if (cpu_pstate_cnt != 0) { 725 ACPI_LOCK(acpi); 726 AcpiOsWritePort(cpu_smi_cmd, cpu_pstate_cnt, 8); 727 ACPI_UNLOCK(acpi); 728 } 729 730 /* Set initial speed to maximum. */ 731 ACPI_SERIAL_BEGIN(cpu); 732 acpi_cpu_throttle_set(cpu_throttle_max); 733 ACPI_SERIAL_END(cpu); 734 735 printf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), " 736 "currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1), 737 CPU_SPEED_PRINTABLE(cpu_throttle_state)); 738 } 739 740 static void 741 acpi_cpu_startup_cx() 742 { 743 struct acpi_cpu_softc *sc; 744 struct sbuf sb; 745 int i; 746 747 /* 748 * Set up the list of Cx states, eliminating C3 states by truncating 749 * cpu_cx_count if quirks indicate C3 is not usable. 750 */ 751 sc = device_get_softc(cpu_devices[0]); 752 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN); 753 for (i = 0; i < cpu_cx_count; i++) { 754 if ((cpu_quirks & CPU_QUIRK_NO_C3) == 0 || 755 sc->cpu_cx_states[i].type != ACPI_STATE_C3) 756 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 757 else 758 cpu_cx_count = i; 759 } 760 sbuf_trim(&sb); 761 sbuf_finish(&sb); 762 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx, 763 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 764 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported, 765 0, "Cx/microsecond values for supported Cx states"); 766 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 767 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 768 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 769 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A", 770 "lowest Cx sleep state to use"); 771 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 772 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 773 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 774 NULL, 0, acpi_cpu_usage_sysctl, "A", 775 "percent usage for each Cx state"); 776 777 #ifdef notyet 778 /* Signal platform that we can handle _CST notification. */ 779 if (cpu_cst_cnt != 0) { 780 ACPI_LOCK(acpi); 781 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 782 ACPI_UNLOCK(acpi); 783 } 784 #endif 785 786 /* Take over idling from cpu_idle_default(). */ 787 cpu_idle_hook = acpi_cpu_idle; 788 } 789 790 /* 791 * Set CPUs to the new state. 792 * 793 * Must be called with the ACPI lock held. 794 */ 795 static void 796 acpi_cpu_throttle_set(uint32_t speed) 797 { 798 struct acpi_cpu_softc *sc; 799 int i; 800 uint32_t p_cnt, clk_val; 801 802 ACPI_SERIAL_ASSERT(cpu); 803 804 /* Iterate over processors */ 805 for (i = 0; i < cpu_ndevices; i++) { 806 sc = device_get_softc(cpu_devices[i]); 807 if (sc->cpu_p_cnt == NULL) 808 continue; 809 810 /* Get the current P_CNT value and disable throttling */ 811 p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4); 812 p_cnt &= ~CPU_P_CNT_THT_EN; 813 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 814 815 /* If we're at maximum speed, that's all */ 816 if (speed < CPU_MAX_SPEED) { 817 /* Mask the old CLK_VAL off and or-in the new value */ 818 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset; 819 p_cnt &= ~clk_val; 820 p_cnt |= (speed << cpu_duty_offset); 821 822 /* Write the new P_CNT value and then enable throttling */ 823 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 824 p_cnt |= CPU_P_CNT_THT_EN; 825 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 826 } 827 ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev), 828 "set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed)); 829 } 830 cpu_throttle_state = speed; 831 } 832 833 /* 834 * Idle the CPU in the lowest state possible. This function is called with 835 * interrupts disabled. Note that once it re-enables interrupts, a task 836 * switch can occur so do not access shared data (i.e. the softc) after 837 * interrupts are re-enabled. 838 */ 839 static void 840 acpi_cpu_idle() 841 { 842 struct acpi_cpu_softc *sc; 843 struct acpi_cx *cx_next; 844 uint32_t start_time, end_time; 845 int bm_active, cx_next_idx, i; 846 847 /* If disabled, return immediately. */ 848 if (cpu_cx_count == 0) { 849 ACPI_ENABLE_IRQS(); 850 return; 851 } 852 853 /* 854 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 855 * since there is no ACPI processor object for this CPU. This occurs 856 * for logical CPUs in the HTT case. 857 */ 858 sc = cpu_softc[PCPU_GET(cpuid)]; 859 if (sc == NULL) { 860 acpi_cpu_c1(); 861 return; 862 } 863 864 /* 865 * If we slept 100 us or more, use the lowest Cx state. Otherwise, 866 * find the lowest state that has a latency less than or equal to 867 * the length of our last sleep. 868 */ 869 cx_next_idx = cpu_cx_lowest; 870 if (sc->cpu_prev_sleep < 100) 871 for (i = cpu_cx_lowest; i >= 0; i--) 872 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) { 873 cx_next_idx = i; 874 break; 875 } 876 877 /* 878 * Check for bus master activity. If there was activity, clear 879 * the bit and use the lowest non-C3 state. Note that the USB 880 * driver polling for new devices keeps this bit set all the 881 * time if USB is loaded. 882 */ 883 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 884 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active, 885 ACPI_MTX_DO_NOT_LOCK); 886 if (bm_active != 0) { 887 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1, 888 ACPI_MTX_DO_NOT_LOCK); 889 cx_next_idx = min(cx_next_idx, cpu_non_c3); 890 } 891 } 892 893 /* Select the next state and update statistics. */ 894 cx_next = &sc->cpu_cx_states[cx_next_idx]; 895 cpu_cx_stats[cx_next_idx]++; 896 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 897 898 /* 899 * Execute HLT (or equivalent) and wait for an interrupt. We can't 900 * calculate the time spent in C1 since the place we wake up is an 901 * ISR. Assume we slept one quantum and return. 902 */ 903 if (cx_next->type == ACPI_STATE_C1) { 904 sc->cpu_prev_sleep = 1000000 / hz; 905 acpi_cpu_c1(); 906 return; 907 } 908 909 /* 910 * For C3, disable bus master arbitration and enable bus master wake 911 * if BM control is available, otherwise flush the CPU cache. 912 */ 913 if (cx_next->type == ACPI_STATE_C3) { 914 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 915 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK); 916 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1, 917 ACPI_MTX_DO_NOT_LOCK); 918 } else 919 ACPI_FLUSH_CPU_CACHE(); 920 } 921 922 /* 923 * Read from P_LVLx to enter C2(+), checking time spent asleep. 924 * Use the ACPI timer for measuring sleep time. Since we need to 925 * get the time very close to the CPU start/stop clock logic, this 926 * is the only reliable time source. 927 */ 928 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk); 929 CPU_GET_REG(cx_next->p_lvlx, 1); 930 931 /* 932 * Read the end time twice. Since it may take an arbitrary time 933 * to enter the idle state, the first read may be executed before 934 * the processor has stopped. Doing it again provides enough 935 * margin that we are certain to have a correct value. 936 */ 937 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 938 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 939 940 /* Enable bus master arbitration and disable bus master wakeup. */ 941 if (cx_next->type == ACPI_STATE_C3 && 942 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 943 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK); 944 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK); 945 } 946 947 /* Find the actual time asleep in microseconds, minus overhead. */ 948 end_time = acpi_TimerDelta(end_time, start_time); 949 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat; 950 ACPI_ENABLE_IRQS(); 951 } 952 953 /* 954 * Re-evaluate the _PSS and _CST objects when we are notified that they 955 * have changed. 956 * 957 * XXX Re-evaluation disabled until locking is done. 958 */ 959 static void 960 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 961 { 962 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 963 964 switch (notify) { 965 case ACPI_CPU_NOTIFY_PERF_STATES: 966 device_printf(sc->cpu_dev, "Performance states changed\n"); 967 /* acpi_cpu_px_available(sc); */ 968 break; 969 case ACPI_CPU_NOTIFY_CX_STATES: 970 device_printf(sc->cpu_dev, "Cx states changed\n"); 971 /* acpi_cpu_cx_cst(sc); */ 972 break; 973 default: 974 device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify); 975 break; 976 } 977 } 978 979 static int 980 acpi_cpu_quirks(struct acpi_cpu_softc *sc) 981 { 982 device_t acpi_dev; 983 984 /* 985 * C3 on multiple CPUs requires using the expensive flush cache 986 * instruction. 987 */ 988 if (mp_ncpus > 1) 989 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 990 991 /* Look for various quirks of the PIIX4 part. */ 992 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 993 if (acpi_dev != NULL) { 994 switch (pci_get_revid(acpi_dev)) { 995 /* 996 * Disable throttling control on PIIX4 A and B-step. 997 * See specification changes #13 ("Manual Throttle Duty Cycle") 998 * and #14 ("Enabling and Disabling Manual Throttle"), plus 999 * erratum #5 ("STPCLK# Deassertion Time") from the January 1000 * 2002 PIIX4 specification update. Note that few (if any) 1001 * mobile systems ever used this part. 1002 */ 1003 case PCI_REVISION_A_STEP: 1004 case PCI_REVISION_B_STEP: 1005 cpu_quirks |= CPU_QUIRK_NO_THROTTLE; 1006 /* FALLTHROUGH */ 1007 /* 1008 * Disable C3 support for all PIIX4 chipsets. Some of these parts 1009 * do not report the BMIDE status to the BM status register and 1010 * others have a livelock bug if Type-F DMA is enabled. Linux 1011 * works around the BMIDE bug by reading the BM status directly 1012 * but we take the simpler approach of disabling C3 for these 1013 * parts. 1014 * 1015 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 1016 * Livelock") from the January 2002 PIIX4 specification update. 1017 * Applies to all PIIX4 models. 1018 */ 1019 case PCI_REVISION_4E: 1020 case PCI_REVISION_4M: 1021 cpu_quirks |= CPU_QUIRK_NO_C3; 1022 break; 1023 default: 1024 break; 1025 } 1026 } 1027 1028 return (0); 1029 } 1030 1031 /* Handle changes in the CPU throttling setting. */ 1032 static int 1033 acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS) 1034 { 1035 uint32_t *argp; 1036 uint32_t arg; 1037 int error; 1038 1039 argp = (uint32_t *)oidp->oid_arg1; 1040 arg = *argp; 1041 error = sysctl_handle_int(oidp, &arg, 0, req); 1042 1043 /* Error or no new value */ 1044 if (error != 0 || req->newptr == NULL) 1045 return (error); 1046 if (arg < 1 || arg > cpu_throttle_max) 1047 return (EINVAL); 1048 1049 /* If throttling changed, notify the BIOS of the new rate. */ 1050 ACPI_SERIAL_BEGIN(cpu); 1051 if (*argp != arg) { 1052 *argp = arg; 1053 acpi_cpu_throttle_set(arg); 1054 } 1055 ACPI_SERIAL_END(cpu); 1056 1057 return (0); 1058 } 1059 1060 static int 1061 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 1062 { 1063 struct sbuf sb; 1064 char buf[128]; 1065 int i; 1066 uintmax_t fract, sum, whole; 1067 1068 sum = 0; 1069 for (i = 0; i < cpu_cx_count; i++) 1070 sum += cpu_cx_stats[i]; 1071 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1072 for (i = 0; i < cpu_cx_count; i++) { 1073 if (sum > 0) { 1074 whole = (uintmax_t)cpu_cx_stats[i] * 100; 1075 fract = (whole % sum) * 100; 1076 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 1077 (u_int)(fract / sum)); 1078 } else 1079 sbuf_printf(&sb, "0%% "); 1080 } 1081 sbuf_trim(&sb); 1082 sbuf_finish(&sb); 1083 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1084 sbuf_delete(&sb); 1085 1086 return (0); 1087 } 1088 1089 static int 1090 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1091 { 1092 struct acpi_cpu_softc *sc; 1093 char state[8]; 1094 int val, error, i; 1095 1096 sc = device_get_softc(cpu_devices[0]); 1097 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1098 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1099 if (error != 0 || req->newptr == NULL) 1100 return (error); 1101 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1102 return (EINVAL); 1103 val = (int) strtol(state + 1, NULL, 10) - 1; 1104 if (val < 0 || val > cpu_cx_count - 1) 1105 return (EINVAL); 1106 1107 ACPI_SERIAL_BEGIN(cpu); 1108 cpu_cx_lowest = val; 1109 1110 /* If not disabling, cache the new lowest non-C3 state. */ 1111 cpu_non_c3 = 0; 1112 for (i = cpu_cx_lowest; i >= 0; i--) { 1113 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1114 cpu_non_c3 = i; 1115 break; 1116 } 1117 } 1118 1119 /* Reset the statistics counters. */ 1120 bzero(cpu_cx_stats, sizeof(cpu_cx_stats)); 1121 ACPI_SERIAL_END(cpu); 1122 1123 return (0); 1124 } 1125