xref: /freebsd/sys/crypto/openssl/arm_arch.h (revision 397e83df75e0fcd0d3fcb95ae4d794cb7600fc89)
1 /*
2  * Copyright 2011-2023 The OpenSSL Project Authors. All Rights Reserved.
3  *
4  * Licensed under the Apache License 2.0 (the "License").  You may not use
5  * this file except in compliance with the License.  You can obtain a copy
6  * in the file LICENSE in the source distribution or at
7  * https://www.openssl.org/source/license.html
8  */
9 
10 #ifndef OSSL_CRYPTO_ARM_ARCH_H
11 # define OSSL_CRYPTO_ARM_ARCH_H
12 
13 # if !defined(__ARM_ARCH__)
14 #  if defined(__CC_ARM)
15 #   define __ARM_ARCH__ __TARGET_ARCH_ARM
16 #   if defined(__BIG_ENDIAN)
17 #    define __ARMEB__
18 #   else
19 #    define __ARMEL__
20 #   endif
21 #  elif defined(__GNUC__)
22 #   if   defined(__aarch64__)
23 #    define __ARM_ARCH__ 8
24   /*
25    * Why doesn't gcc define __ARM_ARCH__? Instead it defines
26    * bunch of below macros. See all_architectures[] table in
27    * gcc/config/arm/arm.c. On a side note it defines
28    * __ARMEL__/__ARMEB__ for little-/big-endian.
29    */
30 #   elif defined(__ARM_ARCH)
31 #    define __ARM_ARCH__ __ARM_ARCH
32 #   elif defined(__ARM_ARCH_8A__)
33 #    define __ARM_ARCH__ 8
34 #   elif defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__)     || \
35         defined(__ARM_ARCH_7R__)|| defined(__ARM_ARCH_7M__)     || \
36         defined(__ARM_ARCH_7EM__)
37 #    define __ARM_ARCH__ 7
38 #   elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__)     || \
39         defined(__ARM_ARCH_6K__)|| defined(__ARM_ARCH_6M__)     || \
40         defined(__ARM_ARCH_6Z__)|| defined(__ARM_ARCH_6ZK__)    || \
41         defined(__ARM_ARCH_6T2__)
42 #    define __ARM_ARCH__ 6
43 #   elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__)     || \
44         defined(__ARM_ARCH_5E__)|| defined(__ARM_ARCH_5TE__)    || \
45         defined(__ARM_ARCH_5TEJ__)
46 #    define __ARM_ARCH__ 5
47 #   elif defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__)
48 #    define __ARM_ARCH__ 4
49 #   else
50 #    error "unsupported ARM architecture"
51 #   endif
52 #  endif
53 # endif
54 
55 # if !defined(__ARM_MAX_ARCH__)
56 #  define __ARM_MAX_ARCH__ __ARM_ARCH__
57 # endif
58 
59 # if __ARM_MAX_ARCH__<__ARM_ARCH__
60 #  error "__ARM_MAX_ARCH__ can't be less than __ARM_ARCH__"
61 # elif __ARM_MAX_ARCH__!=__ARM_ARCH__
62 #  if __ARM_ARCH__<7 && __ARM_MAX_ARCH__>=7 && defined(__ARMEB__)
63 #   error "can't build universal big-endian binary"
64 #  endif
65 # endif
66 
67 # ifndef __ASSEMBLER__
68 extern unsigned int OPENSSL_armcap_P;
69 extern unsigned int OPENSSL_arm_midr;
70 extern unsigned int OPENSSL_armv8_rsa_neonized;
71 # endif
72 
73 # define ARMV7_NEON      (1<<0)
74 # define ARMV7_TICK      (1<<1)
75 # define ARMV8_AES       (1<<2)
76 # define ARMV8_SHA1      (1<<3)
77 # define ARMV8_SHA256    (1<<4)
78 # define ARMV8_PMULL     (1<<5)
79 # define ARMV8_SHA512    (1<<6)
80 # define ARMV8_CPUID     (1<<7)
81 
82 /*
83  * MIDR_EL1 system register
84  *
85  * 63___ _ ___32_31___ _ ___24_23_____20_19_____16_15__ _ __4_3_______0
86  * |            |             |         |         |          |        |
87  * |RES0        | Implementer | Variant | Arch    | PartNum  |Revision|
88  * |____ _ _____|_____ _ _____|_________|_______ _|____ _ ___|________|
89  *
90  */
91 
92 # define ARM_CPU_IMP_ARM           0x41
93 
94 # define ARM_CPU_PART_CORTEX_A72   0xD08
95 # define ARM_CPU_PART_N1           0xD0C
96 
97 # define MIDR_PARTNUM_SHIFT       4
98 # define MIDR_PARTNUM_MASK        (0xfffU << MIDR_PARTNUM_SHIFT)
99 # define MIDR_PARTNUM(midr)       \
100            (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
101 
102 # define MIDR_IMPLEMENTER_SHIFT   24
103 # define MIDR_IMPLEMENTER_MASK    (0xffU << MIDR_IMPLEMENTER_SHIFT)
104 # define MIDR_IMPLEMENTER(midr)   \
105            (((midr) & MIDR_IMPLEMENTER_MASK) >> MIDR_IMPLEMENTER_SHIFT)
106 
107 # define MIDR_ARCHITECTURE_SHIFT  16
108 # define MIDR_ARCHITECTURE_MASK   (0xfU << MIDR_ARCHITECTURE_SHIFT)
109 # define MIDR_ARCHITECTURE(midr)  \
110            (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
111 
112 # define MIDR_CPU_MODEL_MASK \
113            (MIDR_IMPLEMENTER_MASK | \
114             MIDR_PARTNUM_MASK     | \
115             MIDR_ARCHITECTURE_MASK)
116 
117 # define MIDR_CPU_MODEL(imp, partnum) \
118            (((imp)     << MIDR_IMPLEMENTER_SHIFT)  | \
119             (0xfU      << MIDR_ARCHITECTURE_SHIFT) | \
120             ((partnum) << MIDR_PARTNUM_SHIFT))
121 
122 # define MIDR_IS_CPU_MODEL(midr, imp, partnum) \
123            (((midr) & MIDR_CPU_MODEL_MASK) == MIDR_CPU_MODEL(imp, partnum))
124 
125 #if defined(__ASSEMBLER__)
126 
127    /*
128     * Support macros for
129     *   - Armv8.3-A Pointer Authentication and
130     *   - Armv8.5-A Branch Target Identification
131     * features which require emitting a .note.gnu.property section with the
132     * appropriate architecture-dependent feature bits set.
133     * Read more: "ELF for the Arm® 64-bit Architecture"
134     */
135 
136 #  if defined(__ARM_FEATURE_BTI_DEFAULT) && __ARM_FEATURE_BTI_DEFAULT == 1
137 #   define GNU_PROPERTY_AARCH64_BTI (1 << 0)   /* Has Branch Target Identification */
138 #   define AARCH64_VALID_CALL_TARGET hint #34  /* BTI 'c' */
139 #  else
140 #   define GNU_PROPERTY_AARCH64_BTI 0  /* No Branch Target Identification */
141 #   define AARCH64_VALID_CALL_TARGET
142 #  endif
143 
144 #  if defined(__ARM_FEATURE_PAC_DEFAULT) && \
145        (__ARM_FEATURE_PAC_DEFAULT & 1) == 1  /* Signed with A-key */
146 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH \
147      (1 << 1)                                       /* Has Pointer Authentication */
148 #   define AARCH64_SIGN_LINK_REGISTER hint #25      /* PACIASP */
149 #   define AARCH64_VALIDATE_LINK_REGISTER hint #29  /* AUTIASP */
150 #  elif defined(__ARM_FEATURE_PAC_DEFAULT) && \
151        (__ARM_FEATURE_PAC_DEFAULT & 2) == 2  /* Signed with B-key */
152 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH \
153      (1 << 1)                                       /* Has Pointer Authentication */
154 #   define AARCH64_SIGN_LINK_REGISTER hint #27      /* PACIBSP */
155 #   define AARCH64_VALIDATE_LINK_REGISTER hint #31  /* AUTIBSP */
156 #  else
157 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH 0  /* No Pointer Authentication */
158 #   if GNU_PROPERTY_AARCH64_BTI != 0
159 #    define AARCH64_SIGN_LINK_REGISTER AARCH64_VALID_CALL_TARGET
160 #   else
161 #    define AARCH64_SIGN_LINK_REGISTER
162 #   endif
163 #   define AARCH64_VALIDATE_LINK_REGISTER
164 #  endif
165 
166 #  if GNU_PROPERTY_AARCH64_POINTER_AUTH != 0 || GNU_PROPERTY_AARCH64_BTI != 0
167     .pushsection .note.gnu.property, "a";
168     .balign 8;
169     .long 4;
170     .long 0x10;
171     .long 0x5;
172     .asciz "GNU";
173     .long 0xc0000000; /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
174     .long 4;
175     .long (GNU_PROPERTY_AARCH64_POINTER_AUTH | GNU_PROPERTY_AARCH64_BTI);
176     .long 0;
177     .popsection;
178 #  endif
179 
180 # endif  /* defined __ASSEMBLER__ */
181 
182 #endif
183