1 /*- 2 * Copyright (c) 2005-2008 Pawel Jakub Dawidek <pjd@FreeBSD.org> 3 * Copyright (c) 2010 Konstantin Belousov <kib@FreeBSD.org> 4 * Copyright (c) 2014-2021 The FreeBSD Foundation 5 * Copyright (c) 2017 Conrad Meyer <cem@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Portions of this software were developed by John-Mark Gurney 9 * under sponsorship of the FreeBSD Foundation and 10 * Rubicon Communications, LLC (Netgate). 11 * 12 * Portions of this software were developed by Ararat River 13 * Consulting, LLC under sponsorship of the FreeBSD Foundation. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 */ 36 37 #include <sys/cdefs.h> 38 #include <sys/param.h> 39 #include <sys/bus.h> 40 #include <sys/kernel.h> 41 #include <sys/kobj.h> 42 #include <sys/libkern.h> 43 #include <sys/malloc.h> 44 #include <sys/mbuf.h> 45 #include <sys/module.h> 46 #include <sys/smp.h> 47 #include <sys/systm.h> 48 #include <sys/uio.h> 49 50 #include <crypto/aesni/aesni.h> 51 #include <crypto/aesni/sha_sse.h> 52 #include <crypto/sha1.h> 53 #include <crypto/sha2/sha224.h> 54 #include <crypto/sha2/sha256.h> 55 56 #include <opencrypto/cryptodev.h> 57 #include <opencrypto/gmac.h> 58 #include <cryptodev_if.h> 59 60 #include <machine/md_var.h> 61 #include <machine/specialreg.h> 62 #include <machine/fpu.h> 63 64 struct aesni_softc { 65 int32_t cid; 66 bool has_aes; 67 bool has_sha; 68 }; 69 70 static int aesni_cipher_setup(struct aesni_session *ses, 71 const struct crypto_session_params *csp); 72 static int aesni_cipher_process(struct aesni_session *ses, struct cryptop *crp); 73 static int aesni_cipher_crypt(struct aesni_session *ses, struct cryptop *crp, 74 const struct crypto_session_params *csp); 75 static int aesni_cipher_mac(struct aesni_session *ses, struct cryptop *crp, 76 const struct crypto_session_params *csp); 77 78 MALLOC_DEFINE(M_AESNI, "aesni_data", "AESNI Data"); 79 80 static void 81 aesni_identify(driver_t *drv, device_t parent) 82 { 83 84 /* NB: order 10 is so we get attached after h/w devices */ 85 if (device_find_child(parent, "aesni", -1) == NULL && 86 BUS_ADD_CHILD(parent, 10, "aesni", -1) == 0) 87 panic("aesni: could not attach"); 88 } 89 90 static void 91 detect_cpu_features(bool *has_aes, bool *has_sha) 92 { 93 94 *has_aes = ((cpu_feature2 & CPUID2_AESNI) != 0 && 95 (cpu_feature2 & CPUID2_SSE41) != 0); 96 *has_sha = ((cpu_stdext_feature & CPUID_STDEXT_SHA) != 0 && 97 (cpu_feature2 & CPUID2_SSSE3) != 0); 98 } 99 100 static int 101 aesni_probe(device_t dev) 102 { 103 bool has_aes, has_sha; 104 105 detect_cpu_features(&has_aes, &has_sha); 106 if (!has_aes && !has_sha) { 107 device_printf(dev, "No AES or SHA support.\n"); 108 return (EINVAL); 109 } else if (has_aes && has_sha) 110 device_set_desc(dev, 111 "AES-CBC,AES-CCM,AES-GCM,AES-ICM,AES-XTS,SHA1,SHA256"); 112 else if (has_aes) 113 device_set_desc(dev, 114 "AES-CBC,AES-CCM,AES-GCM,AES-ICM,AES-XTS"); 115 else 116 device_set_desc(dev, "SHA1,SHA256"); 117 118 return (0); 119 } 120 121 static int 122 aesni_attach(device_t dev) 123 { 124 struct aesni_softc *sc; 125 126 sc = device_get_softc(dev); 127 128 sc->cid = crypto_get_driverid(dev, sizeof(struct aesni_session), 129 CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_SYNC | 130 CRYPTOCAP_F_ACCEL_SOFTWARE); 131 if (sc->cid < 0) { 132 device_printf(dev, "Could not get crypto driver id.\n"); 133 return (ENOMEM); 134 } 135 136 detect_cpu_features(&sc->has_aes, &sc->has_sha); 137 return (0); 138 } 139 140 static int 141 aesni_detach(device_t dev) 142 { 143 struct aesni_softc *sc; 144 145 sc = device_get_softc(dev); 146 147 crypto_unregister_all(sc->cid); 148 149 return (0); 150 } 151 152 static bool 153 aesni_auth_supported(struct aesni_softc *sc, 154 const struct crypto_session_params *csp) 155 { 156 157 if (!sc->has_sha) 158 return (false); 159 160 switch (csp->csp_auth_alg) { 161 case CRYPTO_SHA1: 162 case CRYPTO_SHA2_224: 163 case CRYPTO_SHA2_256: 164 case CRYPTO_SHA1_HMAC: 165 case CRYPTO_SHA2_224_HMAC: 166 case CRYPTO_SHA2_256_HMAC: 167 break; 168 default: 169 return (false); 170 } 171 172 return (true); 173 } 174 175 static bool 176 aesni_cipher_supported(struct aesni_softc *sc, 177 const struct crypto_session_params *csp) 178 { 179 180 if (!sc->has_aes) 181 return (false); 182 183 switch (csp->csp_cipher_alg) { 184 case CRYPTO_AES_CBC: 185 case CRYPTO_AES_ICM: 186 switch (csp->csp_cipher_klen * 8) { 187 case 128: 188 case 192: 189 case 256: 190 break; 191 default: 192 CRYPTDEB("invalid CBC/ICM key length"); 193 return (false); 194 } 195 if (csp->csp_ivlen != AES_BLOCK_LEN) 196 return (false); 197 break; 198 case CRYPTO_AES_XTS: 199 switch (csp->csp_cipher_klen * 8) { 200 case 256: 201 case 512: 202 break; 203 default: 204 CRYPTDEB("invalid XTS key length"); 205 return (false); 206 } 207 if (csp->csp_ivlen != AES_XTS_IV_LEN) 208 return (false); 209 break; 210 default: 211 return (false); 212 } 213 214 return (true); 215 } 216 217 #define SUPPORTED_SES (CSP_F_SEPARATE_OUTPUT | CSP_F_SEPARATE_AAD | CSP_F_ESN) 218 219 static int 220 aesni_probesession(device_t dev, const struct crypto_session_params *csp) 221 { 222 struct aesni_softc *sc; 223 224 sc = device_get_softc(dev); 225 if ((csp->csp_flags & ~(SUPPORTED_SES)) != 0) 226 return (EINVAL); 227 switch (csp->csp_mode) { 228 case CSP_MODE_DIGEST: 229 if (!aesni_auth_supported(sc, csp)) 230 return (EINVAL); 231 break; 232 case CSP_MODE_CIPHER: 233 if (!aesni_cipher_supported(sc, csp)) 234 return (EINVAL); 235 break; 236 case CSP_MODE_AEAD: 237 switch (csp->csp_cipher_alg) { 238 case CRYPTO_AES_NIST_GCM_16: 239 switch (csp->csp_cipher_klen * 8) { 240 case 128: 241 case 192: 242 case 256: 243 break; 244 default: 245 CRYPTDEB("invalid GCM key length"); 246 return (EINVAL); 247 } 248 if (csp->csp_auth_mlen != 0 && 249 csp->csp_auth_mlen != GMAC_DIGEST_LEN) 250 return (EINVAL); 251 if (!sc->has_aes) 252 return (EINVAL); 253 break; 254 case CRYPTO_AES_CCM_16: 255 switch (csp->csp_cipher_klen * 8) { 256 case 128: 257 case 192: 258 case 256: 259 break; 260 default: 261 CRYPTDEB("invalid CCM key length"); 262 return (EINVAL); 263 } 264 if (!sc->has_aes) 265 return (EINVAL); 266 break; 267 default: 268 return (EINVAL); 269 } 270 break; 271 case CSP_MODE_ETA: 272 if (!aesni_auth_supported(sc, csp) || 273 !aesni_cipher_supported(sc, csp)) 274 return (EINVAL); 275 break; 276 default: 277 return (EINVAL); 278 } 279 280 return (CRYPTODEV_PROBE_ACCEL_SOFTWARE); 281 } 282 283 static int 284 aesni_newsession(device_t dev, crypto_session_t cses, 285 const struct crypto_session_params *csp) 286 { 287 struct aesni_session *ses; 288 int error; 289 290 ses = crypto_get_driver_session(cses); 291 292 switch (csp->csp_mode) { 293 case CSP_MODE_DIGEST: 294 case CSP_MODE_CIPHER: 295 case CSP_MODE_AEAD: 296 case CSP_MODE_ETA: 297 break; 298 default: 299 return (EINVAL); 300 } 301 error = aesni_cipher_setup(ses, csp); 302 if (error != 0) { 303 CRYPTDEB("setup failed"); 304 return (error); 305 } 306 307 return (0); 308 } 309 310 static int 311 aesni_process(device_t dev, struct cryptop *crp, int hint __unused) 312 { 313 struct aesni_session *ses; 314 int error; 315 316 ses = crypto_get_driver_session(crp->crp_session); 317 318 error = aesni_cipher_process(ses, crp); 319 320 crp->crp_etype = error; 321 crypto_done(crp); 322 return (0); 323 } 324 325 static uint8_t * 326 aesni_cipher_alloc(struct cryptop *crp, int start, int length, bool *allocated) 327 { 328 uint8_t *addr; 329 330 addr = crypto_contiguous_subsegment(crp, start, length); 331 if (addr != NULL) { 332 *allocated = false; 333 return (addr); 334 } 335 addr = malloc(length, M_AESNI, M_NOWAIT); 336 if (addr != NULL) { 337 *allocated = true; 338 crypto_copydata(crp, start, length, addr); 339 } else 340 *allocated = false; 341 return (addr); 342 } 343 344 static device_method_t aesni_methods[] = { 345 DEVMETHOD(device_identify, aesni_identify), 346 DEVMETHOD(device_probe, aesni_probe), 347 DEVMETHOD(device_attach, aesni_attach), 348 DEVMETHOD(device_detach, aesni_detach), 349 350 DEVMETHOD(cryptodev_probesession, aesni_probesession), 351 DEVMETHOD(cryptodev_newsession, aesni_newsession), 352 DEVMETHOD(cryptodev_process, aesni_process), 353 354 DEVMETHOD_END 355 }; 356 357 static driver_t aesni_driver = { 358 "aesni", 359 aesni_methods, 360 sizeof(struct aesni_softc), 361 }; 362 363 DRIVER_MODULE(aesni, nexus, aesni_driver, 0, 0); 364 MODULE_VERSION(aesni, 1); 365 MODULE_DEPEND(aesni, crypto, 1, 1, 1); 366 367 static int 368 intel_sha1_update(void *vctx, const void *vdata, u_int datalen) 369 { 370 struct sha1_ctxt *ctx = vctx; 371 const char *data = vdata; 372 size_t gaplen; 373 size_t gapstart; 374 size_t off; 375 size_t copysiz; 376 u_int blocks; 377 378 off = 0; 379 /* Do any aligned blocks without redundant copying. */ 380 if (datalen >= 64 && ctx->count % 64 == 0) { 381 blocks = datalen / 64; 382 ctx->c.b64[0] += blocks * 64 * 8; 383 intel_sha1_step(ctx->h.b32, data + off, blocks); 384 off += blocks * 64; 385 } 386 387 while (off < datalen) { 388 gapstart = ctx->count % 64; 389 gaplen = 64 - gapstart; 390 391 copysiz = (gaplen < datalen - off) ? gaplen : datalen - off; 392 bcopy(&data[off], &ctx->m.b8[gapstart], copysiz); 393 ctx->count += copysiz; 394 ctx->count %= 64; 395 ctx->c.b64[0] += copysiz * 8; 396 if (ctx->count % 64 == 0) 397 intel_sha1_step(ctx->h.b32, (void *)ctx->m.b8, 1); 398 off += copysiz; 399 } 400 401 return (0); 402 } 403 404 static void 405 SHA1_Init_fn(void *ctx) 406 { 407 sha1_init(ctx); 408 } 409 410 static void 411 SHA1_Finalize_fn(void *digest, void *ctx) 412 { 413 sha1_result(ctx, digest); 414 } 415 416 static int 417 intel_sha256_update(void *vctx, const void *vdata, u_int len) 418 { 419 SHA256_CTX *ctx = vctx; 420 uint64_t bitlen; 421 uint32_t r; 422 u_int blocks; 423 const unsigned char *src = vdata; 424 425 /* Number of bytes left in the buffer from previous updates */ 426 r = (ctx->count >> 3) & 0x3f; 427 428 /* Convert the length into a number of bits */ 429 bitlen = len << 3; 430 431 /* Update number of bits */ 432 ctx->count += bitlen; 433 434 /* Handle the case where we don't need to perform any transforms */ 435 if (len < 64 - r) { 436 memcpy(&ctx->buf[r], src, len); 437 return (0); 438 } 439 440 /* Finish the current block */ 441 memcpy(&ctx->buf[r], src, 64 - r); 442 intel_sha256_step(ctx->state, ctx->buf, 1); 443 src += 64 - r; 444 len -= 64 - r; 445 446 /* Perform complete blocks */ 447 if (len >= 64) { 448 blocks = len / 64; 449 intel_sha256_step(ctx->state, src, blocks); 450 src += blocks * 64; 451 len -= blocks * 64; 452 } 453 454 /* Copy left over data into buffer */ 455 memcpy(ctx->buf, src, len); 456 457 return (0); 458 } 459 460 static void 461 SHA224_Init_fn(void *ctx) 462 { 463 SHA224_Init(ctx); 464 } 465 466 static void 467 SHA224_Finalize_fn(void *digest, void *ctx) 468 { 469 SHA224_Final(digest, ctx); 470 } 471 472 static void 473 SHA256_Init_fn(void *ctx) 474 { 475 SHA256_Init(ctx); 476 } 477 478 static void 479 SHA256_Finalize_fn(void *digest, void *ctx) 480 { 481 SHA256_Final(digest, ctx); 482 } 483 484 static int 485 aesni_authprepare(struct aesni_session *ses, int klen) 486 { 487 488 if (klen > SHA1_BLOCK_LEN) 489 return (EINVAL); 490 if ((ses->hmac && klen == 0) || (!ses->hmac && klen != 0)) 491 return (EINVAL); 492 return (0); 493 } 494 495 static int 496 aesni_cipher_setup(struct aesni_session *ses, 497 const struct crypto_session_params *csp) 498 { 499 uint8_t *schedbase; 500 int error; 501 bool kt; 502 503 schedbase = (uint8_t *)roundup2((uintptr_t)ses->schedules, 504 AES_SCHED_ALIGN); 505 ses->enc_schedule = schedbase; 506 ses->dec_schedule = schedbase + AES_SCHED_LEN; 507 ses->xts_schedule = schedbase + AES_SCHED_LEN * 2; 508 509 switch (csp->csp_auth_alg) { 510 case CRYPTO_SHA1_HMAC: 511 ses->hmac = true; 512 /* FALLTHROUGH */ 513 case CRYPTO_SHA1: 514 ses->hash_len = SHA1_HASH_LEN; 515 ses->hash_init = SHA1_Init_fn; 516 ses->hash_update = intel_sha1_update; 517 ses->hash_finalize = SHA1_Finalize_fn; 518 break; 519 case CRYPTO_SHA2_224_HMAC: 520 ses->hmac = true; 521 /* FALLTHROUGH */ 522 case CRYPTO_SHA2_224: 523 ses->hash_len = SHA2_224_HASH_LEN; 524 ses->hash_init = SHA224_Init_fn; 525 ses->hash_update = intel_sha256_update; 526 ses->hash_finalize = SHA224_Finalize_fn; 527 break; 528 case CRYPTO_SHA2_256_HMAC: 529 ses->hmac = true; 530 /* FALLTHROUGH */ 531 case CRYPTO_SHA2_256: 532 ses->hash_len = SHA2_256_HASH_LEN; 533 ses->hash_init = SHA256_Init_fn; 534 ses->hash_update = intel_sha256_update; 535 ses->hash_finalize = SHA256_Finalize_fn; 536 break; 537 } 538 539 if (ses->hash_len != 0) { 540 if (csp->csp_auth_mlen == 0) 541 ses->mlen = ses->hash_len; 542 else 543 ses->mlen = csp->csp_auth_mlen; 544 545 error = aesni_authprepare(ses, csp->csp_auth_klen); 546 if (error != 0) 547 return (error); 548 } else if (csp->csp_cipher_alg == CRYPTO_AES_CCM_16) { 549 if (csp->csp_auth_mlen == 0) 550 ses->mlen = AES_CBC_MAC_HASH_LEN; 551 else 552 ses->mlen = csp->csp_auth_mlen; 553 } 554 555 kt = (csp->csp_cipher_alg == 0); 556 if (!kt) { 557 fpu_kern_enter(curthread, NULL, 558 FPU_KERN_NORMAL | FPU_KERN_NOCTX); 559 } 560 561 error = 0; 562 if (csp->csp_cipher_key != NULL) 563 aesni_cipher_setup_common(ses, csp, csp->csp_cipher_key, 564 csp->csp_cipher_klen); 565 566 if (!kt) { 567 fpu_kern_leave(curthread, NULL); 568 } 569 return (error); 570 } 571 572 static int 573 aesni_cipher_process(struct aesni_session *ses, struct cryptop *crp) 574 { 575 const struct crypto_session_params *csp; 576 int error; 577 578 csp = crypto_get_params(crp->crp_session); 579 switch (csp->csp_cipher_alg) { 580 case CRYPTO_AES_CCM_16: 581 if (crp->crp_payload_length > ccm_max_payload_length(csp)) 582 return (EMSGSIZE); 583 /* FALLTHROUGH */ 584 case CRYPTO_AES_ICM: 585 case CRYPTO_AES_NIST_GCM_16: 586 if ((crp->crp_flags & CRYPTO_F_IV_SEPARATE) == 0) 587 return (EINVAL); 588 break; 589 case CRYPTO_AES_CBC: 590 case CRYPTO_AES_XTS: 591 /* CBC & XTS can only handle full blocks for now */ 592 if ((crp->crp_payload_length % AES_BLOCK_LEN) != 0) 593 return (EINVAL); 594 break; 595 } 596 597 /* Do work */ 598 if (csp->csp_mode == CSP_MODE_ETA) { 599 if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) { 600 error = aesni_cipher_crypt(ses, crp, csp); 601 if (error == 0) 602 error = aesni_cipher_mac(ses, crp, csp); 603 } else { 604 error = aesni_cipher_mac(ses, crp, csp); 605 if (error == 0) 606 error = aesni_cipher_crypt(ses, crp, csp); 607 } 608 } else if (csp->csp_mode == CSP_MODE_DIGEST) 609 error = aesni_cipher_mac(ses, crp, csp); 610 else 611 error = aesni_cipher_crypt(ses, crp, csp); 612 613 return (error); 614 } 615 616 static int 617 aesni_cipher_crypt(struct aesni_session *ses, struct cryptop *crp, 618 const struct crypto_session_params *csp) 619 { 620 uint8_t iv[AES_BLOCK_LEN], tag[GMAC_DIGEST_LEN]; 621 uint8_t *authbuf, *buf, *outbuf; 622 int error; 623 bool encflag, allocated, authallocated, outallocated, outcopy; 624 625 if (crp->crp_payload_length == 0) { 626 buf = NULL; 627 allocated = false; 628 } else { 629 buf = aesni_cipher_alloc(crp, crp->crp_payload_start, 630 crp->crp_payload_length, &allocated); 631 if (buf == NULL) 632 return (ENOMEM); 633 } 634 635 outallocated = false; 636 authallocated = false; 637 authbuf = NULL; 638 if (csp->csp_cipher_alg == CRYPTO_AES_NIST_GCM_16 || 639 csp->csp_cipher_alg == CRYPTO_AES_CCM_16) { 640 if (crp->crp_aad_length == 0) { 641 authbuf = NULL; 642 } else if (crp->crp_aad != NULL) { 643 authbuf = crp->crp_aad; 644 } else { 645 authbuf = aesni_cipher_alloc(crp, crp->crp_aad_start, 646 crp->crp_aad_length, &authallocated); 647 if (authbuf == NULL) { 648 error = ENOMEM; 649 goto out; 650 } 651 } 652 } 653 654 if (CRYPTO_HAS_OUTPUT_BUFFER(crp) && crp->crp_payload_length > 0) { 655 outbuf = crypto_buffer_contiguous_subsegment(&crp->crp_obuf, 656 crp->crp_payload_output_start, crp->crp_payload_length); 657 if (outbuf == NULL) { 658 outcopy = true; 659 if (allocated) 660 outbuf = buf; 661 else { 662 outbuf = malloc(crp->crp_payload_length, 663 M_AESNI, M_NOWAIT); 664 if (outbuf == NULL) { 665 error = ENOMEM; 666 goto out; 667 } 668 outallocated = true; 669 } 670 } else 671 outcopy = false; 672 } else { 673 outbuf = buf; 674 outcopy = allocated; 675 } 676 677 fpu_kern_enter(curthread, NULL, FPU_KERN_NORMAL | FPU_KERN_NOCTX); 678 679 error = 0; 680 encflag = CRYPTO_OP_IS_ENCRYPT(crp->crp_op); 681 if (crp->crp_cipher_key != NULL) 682 aesni_cipher_setup_common(ses, csp, crp->crp_cipher_key, 683 csp->csp_cipher_klen); 684 685 crypto_read_iv(crp, iv); 686 687 switch (csp->csp_cipher_alg) { 688 case CRYPTO_AES_CBC: 689 if (encflag) 690 aesni_encrypt_cbc(ses->rounds, ses->enc_schedule, 691 crp->crp_payload_length, buf, outbuf, iv); 692 else { 693 if (buf != outbuf) 694 memcpy(outbuf, buf, crp->crp_payload_length); 695 aesni_decrypt_cbc(ses->rounds, ses->dec_schedule, 696 crp->crp_payload_length, outbuf, iv); 697 } 698 break; 699 case CRYPTO_AES_ICM: 700 /* encryption & decryption are the same */ 701 aesni_encrypt_icm(ses->rounds, ses->enc_schedule, 702 crp->crp_payload_length, buf, outbuf, iv); 703 break; 704 case CRYPTO_AES_XTS: 705 if (encflag) 706 aesni_encrypt_xts(ses->rounds, ses->enc_schedule, 707 ses->xts_schedule, crp->crp_payload_length, buf, 708 outbuf, iv); 709 else 710 aesni_decrypt_xts(ses->rounds, ses->dec_schedule, 711 ses->xts_schedule, crp->crp_payload_length, buf, 712 outbuf, iv); 713 break; 714 case CRYPTO_AES_NIST_GCM_16: 715 if (encflag) { 716 memset(tag, 0, sizeof(tag)); 717 AES_GCM_encrypt(buf, outbuf, authbuf, iv, tag, 718 crp->crp_payload_length, crp->crp_aad_length, 719 csp->csp_ivlen, ses->enc_schedule, ses->rounds); 720 crypto_copyback(crp, crp->crp_digest_start, sizeof(tag), 721 tag); 722 } else { 723 crypto_copydata(crp, crp->crp_digest_start, sizeof(tag), 724 tag); 725 if (!AES_GCM_decrypt(buf, outbuf, authbuf, iv, tag, 726 crp->crp_payload_length, crp->crp_aad_length, 727 csp->csp_ivlen, ses->enc_schedule, ses->rounds)) 728 error = EBADMSG; 729 } 730 break; 731 case CRYPTO_AES_CCM_16: 732 if (encflag) { 733 memset(tag, 0, sizeof(tag)); 734 AES_CCM_encrypt(buf, outbuf, authbuf, iv, tag, 735 crp->crp_payload_length, crp->crp_aad_length, 736 csp->csp_ivlen, ses->mlen, ses->enc_schedule, 737 ses->rounds); 738 crypto_copyback(crp, crp->crp_digest_start, ses->mlen, 739 tag); 740 } else { 741 crypto_copydata(crp, crp->crp_digest_start, ses->mlen, 742 tag); 743 if (!AES_CCM_decrypt(buf, outbuf, authbuf, iv, tag, 744 crp->crp_payload_length, crp->crp_aad_length, 745 csp->csp_ivlen, ses->mlen, ses->enc_schedule, 746 ses->rounds)) 747 error = EBADMSG; 748 } 749 break; 750 } 751 752 fpu_kern_leave(curthread, NULL); 753 754 if (outcopy && error == 0) 755 crypto_copyback(crp, CRYPTO_HAS_OUTPUT_BUFFER(crp) ? 756 crp->crp_payload_output_start : crp->crp_payload_start, 757 crp->crp_payload_length, outbuf); 758 759 out: 760 if (allocated) 761 zfree(buf, M_AESNI); 762 if (authallocated) 763 zfree(authbuf, M_AESNI); 764 if (outallocated) 765 zfree(outbuf, M_AESNI); 766 explicit_bzero(iv, sizeof(iv)); 767 explicit_bzero(tag, sizeof(tag)); 768 return (error); 769 } 770 771 static int 772 aesni_cipher_mac(struct aesni_session *ses, struct cryptop *crp, 773 const struct crypto_session_params *csp) 774 { 775 union { 776 struct SHA256Context sha2 __aligned(16); 777 struct sha1_ctxt sha1 __aligned(16); 778 } sctx; 779 uint32_t res[SHA2_256_HASH_LEN / sizeof(uint32_t)]; 780 const uint8_t *key; 781 int i, keylen; 782 783 if (crp->crp_auth_key != NULL) 784 key = crp->crp_auth_key; 785 else 786 key = csp->csp_auth_key; 787 keylen = csp->csp_auth_klen; 788 789 fpu_kern_enter(curthread, NULL, FPU_KERN_NORMAL | FPU_KERN_NOCTX); 790 791 if (ses->hmac) { 792 uint8_t hmac_key[SHA1_BLOCK_LEN] __aligned(16); 793 794 /* Inner hash: (K ^ IPAD) || data */ 795 ses->hash_init(&sctx); 796 for (i = 0; i < keylen; i++) 797 hmac_key[i] = key[i] ^ HMAC_IPAD_VAL; 798 for (i = keylen; i < sizeof(hmac_key); i++) 799 hmac_key[i] = 0 ^ HMAC_IPAD_VAL; 800 ses->hash_update(&sctx, hmac_key, sizeof(hmac_key)); 801 802 if (crp->crp_aad != NULL) 803 ses->hash_update(&sctx, crp->crp_aad, 804 crp->crp_aad_length); 805 else 806 crypto_apply(crp, crp->crp_aad_start, 807 crp->crp_aad_length, ses->hash_update, &sctx); 808 if (CRYPTO_HAS_OUTPUT_BUFFER(crp) && 809 CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) 810 crypto_apply_buf(&crp->crp_obuf, 811 crp->crp_payload_output_start, 812 crp->crp_payload_length, 813 ses->hash_update, &sctx); 814 else 815 crypto_apply(crp, crp->crp_payload_start, 816 crp->crp_payload_length, ses->hash_update, &sctx); 817 818 if (csp->csp_flags & CSP_F_ESN) 819 ses->hash_update(&sctx, crp->crp_esn, 4); 820 821 ses->hash_finalize(res, &sctx); 822 823 /* Outer hash: (K ^ OPAD) || inner hash */ 824 ses->hash_init(&sctx); 825 for (i = 0; i < keylen; i++) 826 hmac_key[i] = key[i] ^ HMAC_OPAD_VAL; 827 for (i = keylen; i < sizeof(hmac_key); i++) 828 hmac_key[i] = 0 ^ HMAC_OPAD_VAL; 829 ses->hash_update(&sctx, hmac_key, sizeof(hmac_key)); 830 ses->hash_update(&sctx, res, ses->hash_len); 831 ses->hash_finalize(res, &sctx); 832 explicit_bzero(hmac_key, sizeof(hmac_key)); 833 } else { 834 ses->hash_init(&sctx); 835 836 if (crp->crp_aad != NULL) 837 ses->hash_update(&sctx, crp->crp_aad, 838 crp->crp_aad_length); 839 else 840 crypto_apply(crp, crp->crp_aad_start, 841 crp->crp_aad_length, ses->hash_update, &sctx); 842 if (CRYPTO_HAS_OUTPUT_BUFFER(crp) && 843 CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) 844 crypto_apply_buf(&crp->crp_obuf, 845 crp->crp_payload_output_start, 846 crp->crp_payload_length, 847 ses->hash_update, &sctx); 848 else 849 crypto_apply(crp, crp->crp_payload_start, 850 crp->crp_payload_length, 851 ses->hash_update, &sctx); 852 853 ses->hash_finalize(res, &sctx); 854 } 855 856 fpu_kern_leave(curthread, NULL); 857 858 if (crp->crp_op & CRYPTO_OP_VERIFY_DIGEST) { 859 uint32_t res2[SHA2_256_HASH_LEN / sizeof(uint32_t)]; 860 861 crypto_copydata(crp, crp->crp_digest_start, ses->mlen, res2); 862 if (timingsafe_bcmp(res, res2, ses->mlen) != 0) 863 return (EBADMSG); 864 explicit_bzero(res2, sizeof(res2)); 865 } else 866 crypto_copyback(crp, crp->crp_digest_start, ses->mlen, res); 867 explicit_bzero(res, sizeof(res)); 868 return (0); 869 } 870