1*3a9fd824SRoger Pau Monné /* 2*3a9fd824SRoger Pau Monné * PCI Backend/Frontend Common Data Structures & Macros 3*3a9fd824SRoger Pau Monné * 4*3a9fd824SRoger Pau Monné * Permission is hereby granted, free of charge, to any person obtaining a copy 5*3a9fd824SRoger Pau Monné * of this software and associated documentation files (the "Software"), to 6*3a9fd824SRoger Pau Monné * deal in the Software without restriction, including without limitation the 7*3a9fd824SRoger Pau Monné * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 8*3a9fd824SRoger Pau Monné * sell copies of the Software, and to permit persons to whom the Software is 9*3a9fd824SRoger Pau Monné * furnished to do so, subject to the following conditions: 10*3a9fd824SRoger Pau Monné * 11*3a9fd824SRoger Pau Monné * The above copyright notice and this permission notice shall be included in 12*3a9fd824SRoger Pau Monné * all copies or substantial portions of the Software. 13*3a9fd824SRoger Pau Monné * 14*3a9fd824SRoger Pau Monné * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*3a9fd824SRoger Pau Monné * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*3a9fd824SRoger Pau Monné * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 17*3a9fd824SRoger Pau Monné * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18*3a9fd824SRoger Pau Monné * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19*3a9fd824SRoger Pau Monné * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20*3a9fd824SRoger Pau Monné * DEALINGS IN THE SOFTWARE. 21*3a9fd824SRoger Pau Monné * 22*3a9fd824SRoger Pau Monné * Author: Ryan Wilson <hap9@epoch.ncsc.mil> 23*3a9fd824SRoger Pau Monné */ 24*3a9fd824SRoger Pau Monné #ifndef __XEN_PCI_COMMON_H__ 25*3a9fd824SRoger Pau Monné #define __XEN_PCI_COMMON_H__ 26*3a9fd824SRoger Pau Monné 27*3a9fd824SRoger Pau Monné /* Be sure to bump this number if you change this file */ 28*3a9fd824SRoger Pau Monné #define XEN_PCI_MAGIC "7" 29*3a9fd824SRoger Pau Monné 30*3a9fd824SRoger Pau Monné /* xen_pci_sharedinfo flags */ 31*3a9fd824SRoger Pau Monné #define _XEN_PCIF_active (0) 32*3a9fd824SRoger Pau Monné #define XEN_PCIF_active (1<<_XEN_PCIF_active) 33*3a9fd824SRoger Pau Monné #define _XEN_PCIB_AERHANDLER (1) 34*3a9fd824SRoger Pau Monné #define XEN_PCIB_AERHANDLER (1<<_XEN_PCIB_AERHANDLER) 35*3a9fd824SRoger Pau Monné #define _XEN_PCIB_active (2) 36*3a9fd824SRoger Pau Monné #define XEN_PCIB_active (1<<_XEN_PCIB_active) 37*3a9fd824SRoger Pau Monné 38*3a9fd824SRoger Pau Monné /* xen_pci_op commands */ 39*3a9fd824SRoger Pau Monné #define XEN_PCI_OP_conf_read (0) 40*3a9fd824SRoger Pau Monné #define XEN_PCI_OP_conf_write (1) 41*3a9fd824SRoger Pau Monné #define XEN_PCI_OP_enable_msi (2) 42*3a9fd824SRoger Pau Monné #define XEN_PCI_OP_disable_msi (3) 43*3a9fd824SRoger Pau Monné #define XEN_PCI_OP_enable_msix (4) 44*3a9fd824SRoger Pau Monné #define XEN_PCI_OP_disable_msix (5) 45*3a9fd824SRoger Pau Monné #define XEN_PCI_OP_aer_detected (6) 46*3a9fd824SRoger Pau Monné #define XEN_PCI_OP_aer_resume (7) 47*3a9fd824SRoger Pau Monné #define XEN_PCI_OP_aer_mmio (8) 48*3a9fd824SRoger Pau Monné #define XEN_PCI_OP_aer_slotreset (9) 49*3a9fd824SRoger Pau Monné #define XEN_PCI_OP_enable_multi_msi (10) 50*3a9fd824SRoger Pau Monné 51*3a9fd824SRoger Pau Monné /* xen_pci_op error numbers */ 52*3a9fd824SRoger Pau Monné #define XEN_PCI_ERR_success (0) 53*3a9fd824SRoger Pau Monné #define XEN_PCI_ERR_dev_not_found (-1) 54*3a9fd824SRoger Pau Monné #define XEN_PCI_ERR_invalid_offset (-2) 55*3a9fd824SRoger Pau Monné #define XEN_PCI_ERR_access_denied (-3) 56*3a9fd824SRoger Pau Monné #define XEN_PCI_ERR_not_implemented (-4) 57*3a9fd824SRoger Pau Monné /* XEN_PCI_ERR_op_failed - backend failed to complete the operation */ 58*3a9fd824SRoger Pau Monné #define XEN_PCI_ERR_op_failed (-5) 59*3a9fd824SRoger Pau Monné 60*3a9fd824SRoger Pau Monné /* 61*3a9fd824SRoger Pau Monné * it should be PAGE_SIZE-sizeof(struct xen_pci_op))/sizeof(struct msix_entry)) 62*3a9fd824SRoger Pau Monné * Should not exceed 128 63*3a9fd824SRoger Pau Monné */ 64*3a9fd824SRoger Pau Monné #define SH_INFO_MAX_VEC 128 65*3a9fd824SRoger Pau Monné 66*3a9fd824SRoger Pau Monné struct xen_msix_entry { 67*3a9fd824SRoger Pau Monné uint16_t vector; 68*3a9fd824SRoger Pau Monné uint16_t entry; 69*3a9fd824SRoger Pau Monné }; 70*3a9fd824SRoger Pau Monné struct xen_pci_op { 71*3a9fd824SRoger Pau Monné /* IN: what action to perform: XEN_PCI_OP_* */ 72*3a9fd824SRoger Pau Monné uint32_t cmd; 73*3a9fd824SRoger Pau Monné 74*3a9fd824SRoger Pau Monné /* OUT: will contain an error number (if any) from errno.h */ 75*3a9fd824SRoger Pau Monné int32_t err; 76*3a9fd824SRoger Pau Monné 77*3a9fd824SRoger Pau Monné /* IN: which device to touch */ 78*3a9fd824SRoger Pau Monné uint32_t domain; /* PCI Domain/Segment */ 79*3a9fd824SRoger Pau Monné uint32_t bus; 80*3a9fd824SRoger Pau Monné uint32_t devfn; 81*3a9fd824SRoger Pau Monné 82*3a9fd824SRoger Pau Monné /* IN: which configuration registers to touch */ 83*3a9fd824SRoger Pau Monné int32_t offset; 84*3a9fd824SRoger Pau Monné int32_t size; 85*3a9fd824SRoger Pau Monné 86*3a9fd824SRoger Pau Monné /* IN/OUT: Contains the result after a READ or the value to WRITE */ 87*3a9fd824SRoger Pau Monné uint32_t value; 88*3a9fd824SRoger Pau Monné /* IN: Contains extra infor for this operation */ 89*3a9fd824SRoger Pau Monné uint32_t info; 90*3a9fd824SRoger Pau Monné /*IN: param for msi-x */ 91*3a9fd824SRoger Pau Monné struct xen_msix_entry msix_entries[SH_INFO_MAX_VEC]; 92*3a9fd824SRoger Pau Monné }; 93*3a9fd824SRoger Pau Monné 94*3a9fd824SRoger Pau Monné /*used for pcie aer handling*/ 95*3a9fd824SRoger Pau Monné struct xen_pcie_aer_op 96*3a9fd824SRoger Pau Monné { 97*3a9fd824SRoger Pau Monné 98*3a9fd824SRoger Pau Monné /* IN: what action to perform: XEN_PCI_OP_* */ 99*3a9fd824SRoger Pau Monné uint32_t cmd; 100*3a9fd824SRoger Pau Monné /*IN/OUT: return aer_op result or carry error_detected state as input*/ 101*3a9fd824SRoger Pau Monné int32_t err; 102*3a9fd824SRoger Pau Monné 103*3a9fd824SRoger Pau Monné /* IN: which device to touch */ 104*3a9fd824SRoger Pau Monné uint32_t domain; /* PCI Domain/Segment*/ 105*3a9fd824SRoger Pau Monné uint32_t bus; 106*3a9fd824SRoger Pau Monné uint32_t devfn; 107*3a9fd824SRoger Pau Monné }; 108*3a9fd824SRoger Pau Monné struct xen_pci_sharedinfo { 109*3a9fd824SRoger Pau Monné /* flags - XEN_PCIF_* */ 110*3a9fd824SRoger Pau Monné uint32_t flags; 111*3a9fd824SRoger Pau Monné struct xen_pci_op op; 112*3a9fd824SRoger Pau Monné struct xen_pcie_aer_op aer_op; 113*3a9fd824SRoger Pau Monné }; 114*3a9fd824SRoger Pau Monné 115*3a9fd824SRoger Pau Monné #endif /* __XEN_PCI_COMMON_H__ */ 116*3a9fd824SRoger Pau Monné 117*3a9fd824SRoger Pau Monné /* 118*3a9fd824SRoger Pau Monné * Local variables: 119*3a9fd824SRoger Pau Monné * mode: C 120*3a9fd824SRoger Pau Monné * c-file-style: "BSD" 121*3a9fd824SRoger Pau Monné * c-basic-offset: 4 122*3a9fd824SRoger Pau Monné * tab-width: 4 123*3a9fd824SRoger Pau Monné * indent-tabs-mode: nil 124*3a9fd824SRoger Pau Monné * End: 125*3a9fd824SRoger Pau Monné */ 126