1*3a9fd824SRoger Pau Monné /****************************************************************************** 2*3a9fd824SRoger Pau Monné * xen-x86_64.h 3*3a9fd824SRoger Pau Monné * 4*3a9fd824SRoger Pau Monné * Guest OS interface to x86 64-bit Xen. 5*3a9fd824SRoger Pau Monné * 6*3a9fd824SRoger Pau Monné * Permission is hereby granted, free of charge, to any person obtaining a copy 7*3a9fd824SRoger Pau Monné * of this software and associated documentation files (the "Software"), to 8*3a9fd824SRoger Pau Monné * deal in the Software without restriction, including without limitation the 9*3a9fd824SRoger Pau Monné * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10*3a9fd824SRoger Pau Monné * sell copies of the Software, and to permit persons to whom the Software is 11*3a9fd824SRoger Pau Monné * furnished to do so, subject to the following conditions: 12*3a9fd824SRoger Pau Monné * 13*3a9fd824SRoger Pau Monné * The above copyright notice and this permission notice shall be included in 14*3a9fd824SRoger Pau Monné * all copies or substantial portions of the Software. 15*3a9fd824SRoger Pau Monné * 16*3a9fd824SRoger Pau Monné * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17*3a9fd824SRoger Pau Monné * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18*3a9fd824SRoger Pau Monné * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19*3a9fd824SRoger Pau Monné * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20*3a9fd824SRoger Pau Monné * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21*3a9fd824SRoger Pau Monné * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22*3a9fd824SRoger Pau Monné * DEALINGS IN THE SOFTWARE. 23*3a9fd824SRoger Pau Monné * 24*3a9fd824SRoger Pau Monné * Copyright (c) 2004-2006, K A Fraser 25*3a9fd824SRoger Pau Monné */ 26*3a9fd824SRoger Pau Monné 27*3a9fd824SRoger Pau Monné #ifndef __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__ 28*3a9fd824SRoger Pau Monné #define __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__ 29*3a9fd824SRoger Pau Monné 30*3a9fd824SRoger Pau Monné /* 31*3a9fd824SRoger Pau Monné * Hypercall interface: 32*3a9fd824SRoger Pau Monné * Input: %rdi, %rsi, %rdx, %r10, %r8, %r9 (arguments 1-6) 33*3a9fd824SRoger Pau Monné * Output: %rax 34*3a9fd824SRoger Pau Monné * Access is via hypercall page (set up by guest loader or via a Xen MSR): 35*3a9fd824SRoger Pau Monné * call hypercall_page + hypercall-number * 32 36*3a9fd824SRoger Pau Monné * Clobbered: argument registers (e.g., 2-arg hypercall clobbers %rdi,%rsi) 37*3a9fd824SRoger Pau Monné */ 38*3a9fd824SRoger Pau Monné 39*3a9fd824SRoger Pau Monné /* 40*3a9fd824SRoger Pau Monné * 64-bit segment selectors 41*3a9fd824SRoger Pau Monné * These flat segments are in the Xen-private section of every GDT. Since these 42*3a9fd824SRoger Pau Monné * are also present in the initial GDT, many OSes will be able to avoid 43*3a9fd824SRoger Pau Monné * installing their own GDT. 44*3a9fd824SRoger Pau Monné */ 45*3a9fd824SRoger Pau Monné 46*3a9fd824SRoger Pau Monné #define FLAT_RING3_CS32 0xe023 /* GDT index 260 */ 47*3a9fd824SRoger Pau Monné #define FLAT_RING3_CS64 0xe033 /* GDT index 262 */ 48*3a9fd824SRoger Pau Monné #define FLAT_RING3_DS32 0xe02b /* GDT index 261 */ 49*3a9fd824SRoger Pau Monné #define FLAT_RING3_DS64 0x0000 /* NULL selector */ 50*3a9fd824SRoger Pau Monné #define FLAT_RING3_SS32 0xe02b /* GDT index 261 */ 51*3a9fd824SRoger Pau Monné #define FLAT_RING3_SS64 0xe02b /* GDT index 261 */ 52*3a9fd824SRoger Pau Monné 53*3a9fd824SRoger Pau Monné #define FLAT_KERNEL_DS64 FLAT_RING3_DS64 54*3a9fd824SRoger Pau Monné #define FLAT_KERNEL_DS32 FLAT_RING3_DS32 55*3a9fd824SRoger Pau Monné #define FLAT_KERNEL_DS FLAT_KERNEL_DS64 56*3a9fd824SRoger Pau Monné #define FLAT_KERNEL_CS64 FLAT_RING3_CS64 57*3a9fd824SRoger Pau Monné #define FLAT_KERNEL_CS32 FLAT_RING3_CS32 58*3a9fd824SRoger Pau Monné #define FLAT_KERNEL_CS FLAT_KERNEL_CS64 59*3a9fd824SRoger Pau Monné #define FLAT_KERNEL_SS64 FLAT_RING3_SS64 60*3a9fd824SRoger Pau Monné #define FLAT_KERNEL_SS32 FLAT_RING3_SS32 61*3a9fd824SRoger Pau Monné #define FLAT_KERNEL_SS FLAT_KERNEL_SS64 62*3a9fd824SRoger Pau Monné 63*3a9fd824SRoger Pau Monné #define FLAT_USER_DS64 FLAT_RING3_DS64 64*3a9fd824SRoger Pau Monné #define FLAT_USER_DS32 FLAT_RING3_DS32 65*3a9fd824SRoger Pau Monné #define FLAT_USER_DS FLAT_USER_DS64 66*3a9fd824SRoger Pau Monné #define FLAT_USER_CS64 FLAT_RING3_CS64 67*3a9fd824SRoger Pau Monné #define FLAT_USER_CS32 FLAT_RING3_CS32 68*3a9fd824SRoger Pau Monné #define FLAT_USER_CS FLAT_USER_CS64 69*3a9fd824SRoger Pau Monné #define FLAT_USER_SS64 FLAT_RING3_SS64 70*3a9fd824SRoger Pau Monné #define FLAT_USER_SS32 FLAT_RING3_SS32 71*3a9fd824SRoger Pau Monné #define FLAT_USER_SS FLAT_USER_SS64 72*3a9fd824SRoger Pau Monné 73*3a9fd824SRoger Pau Monné #define __HYPERVISOR_VIRT_START 0xFFFF800000000000 74*3a9fd824SRoger Pau Monné #define __HYPERVISOR_VIRT_END 0xFFFF880000000000 75*3a9fd824SRoger Pau Monné #define __MACH2PHYS_VIRT_START 0xFFFF800000000000 76*3a9fd824SRoger Pau Monné #define __MACH2PHYS_VIRT_END 0xFFFF804000000000 77*3a9fd824SRoger Pau Monné 78*3a9fd824SRoger Pau Monné #ifndef HYPERVISOR_VIRT_START 79*3a9fd824SRoger Pau Monné #define HYPERVISOR_VIRT_START xen_mk_ulong(__HYPERVISOR_VIRT_START) 80*3a9fd824SRoger Pau Monné #define HYPERVISOR_VIRT_END xen_mk_ulong(__HYPERVISOR_VIRT_END) 81*3a9fd824SRoger Pau Monné #endif 82*3a9fd824SRoger Pau Monné 83*3a9fd824SRoger Pau Monné #define MACH2PHYS_VIRT_START xen_mk_ulong(__MACH2PHYS_VIRT_START) 84*3a9fd824SRoger Pau Monné #define MACH2PHYS_VIRT_END xen_mk_ulong(__MACH2PHYS_VIRT_END) 85*3a9fd824SRoger Pau Monné #define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>3) 86*3a9fd824SRoger Pau Monné #ifndef machine_to_phys_mapping 87*3a9fd824SRoger Pau Monné #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START) 88*3a9fd824SRoger Pau Monné #endif 89*3a9fd824SRoger Pau Monné 90*3a9fd824SRoger Pau Monné /* 91*3a9fd824SRoger Pau Monné * int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base) 92*3a9fd824SRoger Pau Monné * @which == SEGBASE_* ; @base == 64-bit base address 93*3a9fd824SRoger Pau Monné * Returns 0 on success. 94*3a9fd824SRoger Pau Monné */ 95*3a9fd824SRoger Pau Monné #define SEGBASE_FS 0 96*3a9fd824SRoger Pau Monné #define SEGBASE_GS_USER 1 97*3a9fd824SRoger Pau Monné #define SEGBASE_GS_KERNEL 2 98*3a9fd824SRoger Pau Monné #define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */ 99*3a9fd824SRoger Pau Monné 100*3a9fd824SRoger Pau Monné /* 101*3a9fd824SRoger Pau Monné * int HYPERVISOR_iret(void) 102*3a9fd824SRoger Pau Monné * All arguments are on the kernel stack, in the following format. 103*3a9fd824SRoger Pau Monné * Never returns if successful. Current kernel context is lost. 104*3a9fd824SRoger Pau Monné * The saved CS is mapped as follows: 105*3a9fd824SRoger Pau Monné * RING0 -> RING3 kernel mode. 106*3a9fd824SRoger Pau Monné * RING1 -> RING3 kernel mode. 107*3a9fd824SRoger Pau Monné * RING2 -> RING3 kernel mode. 108*3a9fd824SRoger Pau Monné * RING3 -> RING3 user mode. 109*3a9fd824SRoger Pau Monné * However RING0 indicates that the guest kernel should return to iteself 110*3a9fd824SRoger Pau Monné * directly with 111*3a9fd824SRoger Pau Monné * orb $3,1*8(%rsp) 112*3a9fd824SRoger Pau Monné * iretq 113*3a9fd824SRoger Pau Monné * If flags contains VGCF_in_syscall: 114*3a9fd824SRoger Pau Monné * Restore RAX, RIP, RFLAGS, RSP. 115*3a9fd824SRoger Pau Monné * Discard R11, RCX, CS, SS. 116*3a9fd824SRoger Pau Monné * Otherwise: 117*3a9fd824SRoger Pau Monné * Restore RAX, R11, RCX, CS:RIP, RFLAGS, SS:RSP. 118*3a9fd824SRoger Pau Monné * All other registers are saved on hypercall entry and restored to user. 119*3a9fd824SRoger Pau Monné */ 120*3a9fd824SRoger Pau Monné /* Guest exited in SYSCALL context? Return to guest with SYSRET? */ 121*3a9fd824SRoger Pau Monné #define _VGCF_in_syscall 8 122*3a9fd824SRoger Pau Monné #define VGCF_in_syscall (1<<_VGCF_in_syscall) 123*3a9fd824SRoger Pau Monné #define VGCF_IN_SYSCALL VGCF_in_syscall 124*3a9fd824SRoger Pau Monné 125*3a9fd824SRoger Pau Monné #ifndef __ASSEMBLY__ 126*3a9fd824SRoger Pau Monné 127*3a9fd824SRoger Pau Monné struct iret_context { 128*3a9fd824SRoger Pau Monné /* Top of stack (%rsp at point of hypercall). */ 129*3a9fd824SRoger Pau Monné uint64_t rax, r11, rcx, flags, rip, cs, rflags, rsp, ss; 130*3a9fd824SRoger Pau Monné /* Bottom of iret stack frame. */ 131*3a9fd824SRoger Pau Monné }; 132*3a9fd824SRoger Pau Monné 133*3a9fd824SRoger Pau Monné #if defined(__XEN__) || defined(__XEN_TOOLS__) 134*3a9fd824SRoger Pau Monné /* Anonymous unions include all permissible names (e.g., al/ah/ax/eax/rax). */ 135*3a9fd824SRoger Pau Monné #define __DECL_REG_LOHI(which) union { \ 136*3a9fd824SRoger Pau Monné uint64_t r ## which ## x; \ 137*3a9fd824SRoger Pau Monné uint32_t e ## which ## x; \ 138*3a9fd824SRoger Pau Monné uint16_t which ## x; \ 139*3a9fd824SRoger Pau Monné struct { \ 140*3a9fd824SRoger Pau Monné uint8_t which ## l; \ 141*3a9fd824SRoger Pau Monné uint8_t which ## h; \ 142*3a9fd824SRoger Pau Monné }; \ 143*3a9fd824SRoger Pau Monné } 144*3a9fd824SRoger Pau Monné #define __DECL_REG_LO8(name) union { \ 145*3a9fd824SRoger Pau Monné uint64_t r ## name; \ 146*3a9fd824SRoger Pau Monné uint32_t e ## name; \ 147*3a9fd824SRoger Pau Monné uint16_t name; \ 148*3a9fd824SRoger Pau Monné uint8_t name ## l; \ 149*3a9fd824SRoger Pau Monné } 150*3a9fd824SRoger Pau Monné #define __DECL_REG_LO16(name) union { \ 151*3a9fd824SRoger Pau Monné uint64_t r ## name; \ 152*3a9fd824SRoger Pau Monné uint32_t e ## name; \ 153*3a9fd824SRoger Pau Monné uint16_t name; \ 154*3a9fd824SRoger Pau Monné } 155*3a9fd824SRoger Pau Monné #define __DECL_REG_HI(num) union { \ 156*3a9fd824SRoger Pau Monné uint64_t r ## num; \ 157*3a9fd824SRoger Pau Monné uint32_t r ## num ## d; \ 158*3a9fd824SRoger Pau Monné uint16_t r ## num ## w; \ 159*3a9fd824SRoger Pau Monné uint8_t r ## num ## b; \ 160*3a9fd824SRoger Pau Monné } 161*3a9fd824SRoger Pau Monné #elif defined(__GNUC__) && !defined(__STRICT_ANSI__) 162*3a9fd824SRoger Pau Monné /* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */ 163*3a9fd824SRoger Pau Monné #define __DECL_REG(name) union { \ 164*3a9fd824SRoger Pau Monné uint64_t r ## name, e ## name; \ 165*3a9fd824SRoger Pau Monné uint32_t _e ## name; \ 166*3a9fd824SRoger Pau Monné } 167*3a9fd824SRoger Pau Monné #else 168*3a9fd824SRoger Pau Monné /* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */ 169*3a9fd824SRoger Pau Monné #define __DECL_REG(name) uint64_t r ## name 170*3a9fd824SRoger Pau Monné #endif 171*3a9fd824SRoger Pau Monné 172*3a9fd824SRoger Pau Monné #ifndef __DECL_REG_LOHI 173*3a9fd824SRoger Pau Monné #define __DECL_REG_LOHI(name) __DECL_REG(name ## x) 174*3a9fd824SRoger Pau Monné #define __DECL_REG_LO8 __DECL_REG 175*3a9fd824SRoger Pau Monné #define __DECL_REG_LO16 __DECL_REG 176*3a9fd824SRoger Pau Monné #define __DECL_REG_HI(num) uint64_t r ## num 177*3a9fd824SRoger Pau Monné #endif 178*3a9fd824SRoger Pau Monné 179*3a9fd824SRoger Pau Monné struct cpu_user_regs { 180*3a9fd824SRoger Pau Monné __DECL_REG_HI(15); 181*3a9fd824SRoger Pau Monné __DECL_REG_HI(14); 182*3a9fd824SRoger Pau Monné __DECL_REG_HI(13); 183*3a9fd824SRoger Pau Monné __DECL_REG_HI(12); 184*3a9fd824SRoger Pau Monné __DECL_REG_LO8(bp); 185*3a9fd824SRoger Pau Monné __DECL_REG_LOHI(b); 186*3a9fd824SRoger Pau Monné __DECL_REG_HI(11); 187*3a9fd824SRoger Pau Monné __DECL_REG_HI(10); 188*3a9fd824SRoger Pau Monné __DECL_REG_HI(9); 189*3a9fd824SRoger Pau Monné __DECL_REG_HI(8); 190*3a9fd824SRoger Pau Monné __DECL_REG_LOHI(a); 191*3a9fd824SRoger Pau Monné __DECL_REG_LOHI(c); 192*3a9fd824SRoger Pau Monné __DECL_REG_LOHI(d); 193*3a9fd824SRoger Pau Monné __DECL_REG_LO8(si); 194*3a9fd824SRoger Pau Monné __DECL_REG_LO8(di); 195*3a9fd824SRoger Pau Monné uint32_t error_code; /* private */ 196*3a9fd824SRoger Pau Monné uint32_t entry_vector; /* private */ 197*3a9fd824SRoger Pau Monné __DECL_REG_LO16(ip); 198*3a9fd824SRoger Pau Monné uint16_t cs, _pad0[1]; 199*3a9fd824SRoger Pau Monné uint8_t saved_upcall_mask; 200*3a9fd824SRoger Pau Monné uint8_t _pad1[3]; 201*3a9fd824SRoger Pau Monné __DECL_REG_LO16(flags); /* rflags.IF == !saved_upcall_mask */ 202*3a9fd824SRoger Pau Monné __DECL_REG_LO8(sp); 203*3a9fd824SRoger Pau Monné uint16_t ss, _pad2[3]; 204*3a9fd824SRoger Pau Monné uint16_t es, _pad3[3]; 205*3a9fd824SRoger Pau Monné uint16_t ds, _pad4[3]; 206*3a9fd824SRoger Pau Monné uint16_t fs, _pad5[3]; 207*3a9fd824SRoger Pau Monné uint16_t gs, _pad6[3]; 208*3a9fd824SRoger Pau Monné }; 209*3a9fd824SRoger Pau Monné typedef struct cpu_user_regs cpu_user_regs_t; 210*3a9fd824SRoger Pau Monné DEFINE_XEN_GUEST_HANDLE(cpu_user_regs_t); 211*3a9fd824SRoger Pau Monné 212*3a9fd824SRoger Pau Monné #undef __DECL_REG 213*3a9fd824SRoger Pau Monné #undef __DECL_REG_LOHI 214*3a9fd824SRoger Pau Monné #undef __DECL_REG_LO8 215*3a9fd824SRoger Pau Monné #undef __DECL_REG_LO16 216*3a9fd824SRoger Pau Monné #undef __DECL_REG_HI 217*3a9fd824SRoger Pau Monné 218*3a9fd824SRoger Pau Monné #define xen_pfn_to_cr3(pfn) ((unsigned long)(pfn) << 12) 219*3a9fd824SRoger Pau Monné #define xen_cr3_to_pfn(cr3) ((unsigned long)(cr3) >> 12) 220*3a9fd824SRoger Pau Monné 221*3a9fd824SRoger Pau Monné struct arch_vcpu_info { 222*3a9fd824SRoger Pau Monné unsigned long cr2; 223*3a9fd824SRoger Pau Monné unsigned long pad; /* sizeof(vcpu_info_t) == 64 */ 224*3a9fd824SRoger Pau Monné }; 225*3a9fd824SRoger Pau Monné typedef struct arch_vcpu_info arch_vcpu_info_t; 226*3a9fd824SRoger Pau Monné 227*3a9fd824SRoger Pau Monné typedef unsigned long xen_callback_t; 228*3a9fd824SRoger Pau Monné 229*3a9fd824SRoger Pau Monné #endif /* !__ASSEMBLY__ */ 230*3a9fd824SRoger Pau Monné 231*3a9fd824SRoger Pau Monné #endif /* __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__ */ 232*3a9fd824SRoger Pau Monné 233*3a9fd824SRoger Pau Monné /* 234*3a9fd824SRoger Pau Monné * Local variables: 235*3a9fd824SRoger Pau Monné * mode: C 236*3a9fd824SRoger Pau Monné * c-file-style: "BSD" 237*3a9fd824SRoger Pau Monné * c-basic-offset: 4 238*3a9fd824SRoger Pau Monné * tab-width: 4 239*3a9fd824SRoger Pau Monné * indent-tabs-mode: nil 240*3a9fd824SRoger Pau Monné * End: 241*3a9fd824SRoger Pau Monné */ 242