xref: /freebsd/sys/contrib/x86emu/x86emu_regs.h (revision aa3d547d095ff07fdc39ffc5ae4c371844b504ab)
1*aa3d547dSXin LI /*	$NetBSD: x86emu_regs.h,v 1.1 2007/12/01 20:14:10 joerg Exp $	*/
2*aa3d547dSXin LI /*	$OpenBSD: x86emu_regs.h,v 1.2 2009/06/06 03:45:05 matthieu Exp $ */
3*aa3d547dSXin LI 
4*aa3d547dSXin LI /****************************************************************************
5*aa3d547dSXin LI *
6*aa3d547dSXin LI *  Realmode X86 Emulator Library
7*aa3d547dSXin LI *
8*aa3d547dSXin LI *  Copyright (C) 1996-1999 SciTech Software, Inc.
9*aa3d547dSXin LI *  Copyright (C) David Mosberger-Tang
10*aa3d547dSXin LI *  Copyright (C) 1999 Egbert Eich
11*aa3d547dSXin LI *  Copyright (C) 2007 Joerg Sonnenberger
12*aa3d547dSXin LI *
13*aa3d547dSXin LI *  ========================================================================
14*aa3d547dSXin LI *
15*aa3d547dSXin LI *  Permission to use, copy, modify, distribute, and sell this software and
16*aa3d547dSXin LI *  its documentation for any purpose is hereby granted without fee,
17*aa3d547dSXin LI *  provided that the above copyright notice appear in all copies and that
18*aa3d547dSXin LI *  both that copyright notice and this permission notice appear in
19*aa3d547dSXin LI *  supporting documentation, and that the name of the authors not be used
20*aa3d547dSXin LI *  in advertising or publicity pertaining to distribution of the software
21*aa3d547dSXin LI *  without specific, written prior permission.  The authors makes no
22*aa3d547dSXin LI *  representations about the suitability of this software for any purpose.
23*aa3d547dSXin LI *  It is provided "as is" without express or implied warranty.
24*aa3d547dSXin LI *
25*aa3d547dSXin LI *  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
26*aa3d547dSXin LI *  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
27*aa3d547dSXin LI *  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
28*aa3d547dSXin LI *  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
29*aa3d547dSXin LI *  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
30*aa3d547dSXin LI *  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
31*aa3d547dSXin LI *  PERFORMANCE OF THIS SOFTWARE.
32*aa3d547dSXin LI *
33*aa3d547dSXin LI ****************************************************************************/
34*aa3d547dSXin LI 
35*aa3d547dSXin LI #ifndef __X86EMU_REGS_H
36*aa3d547dSXin LI #define __X86EMU_REGS_H
37*aa3d547dSXin LI 
38*aa3d547dSXin LI /*---------------------- Macros and type definitions ----------------------*/
39*aa3d547dSXin LI 
40*aa3d547dSXin LI /* 8 bit registers */
41*aa3d547dSXin LI #define R_AH  register_a.I8_reg.h_reg
42*aa3d547dSXin LI #define R_AL  register_a.I8_reg.l_reg
43*aa3d547dSXin LI #define R_BH  register_b.I8_reg.h_reg
44*aa3d547dSXin LI #define R_BL  register_b.I8_reg.l_reg
45*aa3d547dSXin LI #define R_CH  register_c.I8_reg.h_reg
46*aa3d547dSXin LI #define R_CL  register_c.I8_reg.l_reg
47*aa3d547dSXin LI #define R_DH  register_d.I8_reg.h_reg
48*aa3d547dSXin LI #define R_DL  register_d.I8_reg.l_reg
49*aa3d547dSXin LI 
50*aa3d547dSXin LI /* 16 bit registers */
51*aa3d547dSXin LI #define R_AX  register_a.I16_reg.x_reg
52*aa3d547dSXin LI #define R_BX  register_b.I16_reg.x_reg
53*aa3d547dSXin LI #define R_CX  register_c.I16_reg.x_reg
54*aa3d547dSXin LI #define R_DX  register_d.I16_reg.x_reg
55*aa3d547dSXin LI 
56*aa3d547dSXin LI /* 32 bit extended registers */
57*aa3d547dSXin LI #define R_EAX  register_a.I32_reg.e_reg
58*aa3d547dSXin LI #define R_EBX  register_b.I32_reg.e_reg
59*aa3d547dSXin LI #define R_ECX  register_c.I32_reg.e_reg
60*aa3d547dSXin LI #define R_EDX  register_d.I32_reg.e_reg
61*aa3d547dSXin LI 
62*aa3d547dSXin LI /* special registers */
63*aa3d547dSXin LI #define R_SP  register_sp.I16_reg.x_reg
64*aa3d547dSXin LI #define R_BP  register_bp.I16_reg.x_reg
65*aa3d547dSXin LI #define R_SI  register_si.I16_reg.x_reg
66*aa3d547dSXin LI #define R_DI  register_di.I16_reg.x_reg
67*aa3d547dSXin LI #define R_IP  register_ip.I16_reg.x_reg
68*aa3d547dSXin LI #define R_FLG register_flags
69*aa3d547dSXin LI 
70*aa3d547dSXin LI /* special registers */
71*aa3d547dSXin LI #define R_ESP  register_sp.I32_reg.e_reg
72*aa3d547dSXin LI #define R_EBP  register_bp.I32_reg.e_reg
73*aa3d547dSXin LI #define R_ESI  register_si.I32_reg.e_reg
74*aa3d547dSXin LI #define R_EDI  register_di.I32_reg.e_reg
75*aa3d547dSXin LI #define R_EIP  register_ip.I32_reg.e_reg
76*aa3d547dSXin LI #define R_EFLG register_flags
77*aa3d547dSXin LI 
78*aa3d547dSXin LI /* segment registers */
79*aa3d547dSXin LI #define R_CS  register_cs
80*aa3d547dSXin LI #define R_DS  register_ds
81*aa3d547dSXin LI #define R_SS  register_ss
82*aa3d547dSXin LI #define R_ES  register_es
83*aa3d547dSXin LI #define R_FS  register_fs
84*aa3d547dSXin LI #define R_GS  register_gs
85*aa3d547dSXin LI 
86*aa3d547dSXin LI /* flag conditions   */
87*aa3d547dSXin LI #define FB_CF 0x0001            /* CARRY flag  */
88*aa3d547dSXin LI #define FB_PF 0x0004            /* PARITY flag */
89*aa3d547dSXin LI #define FB_AF 0x0010            /* AUX  flag   */
90*aa3d547dSXin LI #define FB_ZF 0x0040            /* ZERO flag   */
91*aa3d547dSXin LI #define FB_SF 0x0080            /* SIGN flag   */
92*aa3d547dSXin LI #define FB_TF 0x0100            /* TRAP flag   */
93*aa3d547dSXin LI #define FB_IF 0x0200            /* INTERRUPT ENABLE flag */
94*aa3d547dSXin LI #define FB_DF 0x0400            /* DIR flag    */
95*aa3d547dSXin LI #define FB_OF 0x0800            /* OVERFLOW flag */
96*aa3d547dSXin LI 
97*aa3d547dSXin LI /* 80286 and above always have bit#1 set */
98*aa3d547dSXin LI #define F_ALWAYS_ON  (0x0002)   /* flag bits always on */
99*aa3d547dSXin LI 
100*aa3d547dSXin LI /*
101*aa3d547dSXin LI  * Define a mask for only those flag bits we will ever pass back
102*aa3d547dSXin LI  * (via PUSHF)
103*aa3d547dSXin LI  */
104*aa3d547dSXin LI #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
105*aa3d547dSXin LI 
106*aa3d547dSXin LI /* following bits masked in to a 16bit quantity */
107*aa3d547dSXin LI 
108*aa3d547dSXin LI #define F_CF 0x0001             /* CARRY flag  */
109*aa3d547dSXin LI #define F_PF 0x0004             /* PARITY flag */
110*aa3d547dSXin LI #define F_AF 0x0010             /* AUX  flag   */
111*aa3d547dSXin LI #define F_ZF 0x0040             /* ZERO flag   */
112*aa3d547dSXin LI #define F_SF 0x0080             /* SIGN flag   */
113*aa3d547dSXin LI #define F_TF 0x0100             /* TRAP flag   */
114*aa3d547dSXin LI #define F_IF 0x0200             /* INTERRUPT ENABLE flag */
115*aa3d547dSXin LI #define F_DF 0x0400             /* DIR flag    */
116*aa3d547dSXin LI #define F_OF 0x0800             /* OVERFLOW flag */
117*aa3d547dSXin LI 
118*aa3d547dSXin LI #define SET_FLAG(flag)        	(emu->x86.R_FLG |= (flag))
119*aa3d547dSXin LI #define CLEAR_FLAG(flag)      	(emu->x86.R_FLG &= ~(flag))
120*aa3d547dSXin LI #define ACCESS_FLAG(flag)     	(emu->x86.R_FLG & (flag))
121*aa3d547dSXin LI #define CLEARALL_FLAG(m)    	(emu->x86.R_FLG = 0)
122*aa3d547dSXin LI 
123*aa3d547dSXin LI #define CONDITIONAL_SET_FLAG(COND,FLAG) \
124*aa3d547dSXin LI   if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
125*aa3d547dSXin LI 
126*aa3d547dSXin LI #define F_PF_CALC 0x010000      /* PARITY flag has been calced    */
127*aa3d547dSXin LI #define F_ZF_CALC 0x020000      /* ZERO flag has been calced      */
128*aa3d547dSXin LI #define F_SF_CALC 0x040000      /* SIGN flag has been calced      */
129*aa3d547dSXin LI 
130*aa3d547dSXin LI #define F_ALL_CALC      0xff0000        /* All have been calced   */
131*aa3d547dSXin LI 
132*aa3d547dSXin LI /*
133*aa3d547dSXin LI  * Emulator machine state.
134*aa3d547dSXin LI  * Segment usage control.
135*aa3d547dSXin LI  */
136*aa3d547dSXin LI #define SYSMODE_SEG_DS_SS       0x00000001
137*aa3d547dSXin LI #define SYSMODE_SEGOVR_CS       0x00000002
138*aa3d547dSXin LI #define SYSMODE_SEGOVR_DS       0x00000004
139*aa3d547dSXin LI #define SYSMODE_SEGOVR_ES       0x00000008
140*aa3d547dSXin LI #define SYSMODE_SEGOVR_FS       0x00000010
141*aa3d547dSXin LI #define SYSMODE_SEGOVR_GS       0x00000020
142*aa3d547dSXin LI #define SYSMODE_SEGOVR_SS       0x00000040
143*aa3d547dSXin LI #define SYSMODE_PREFIX_REPE     0x00000080
144*aa3d547dSXin LI #define SYSMODE_PREFIX_REPNE    0x00000100
145*aa3d547dSXin LI #define SYSMODE_PREFIX_DATA     0x00000200
146*aa3d547dSXin LI #define SYSMODE_PREFIX_ADDR     0x00000400
147*aa3d547dSXin LI #define SYSMODE_INTR_PENDING    0x10000000
148*aa3d547dSXin LI #define SYSMODE_EXTRN_INTR      0x20000000
149*aa3d547dSXin LI #define SYSMODE_HALTED          0x40000000
150*aa3d547dSXin LI 
151*aa3d547dSXin LI #define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS      | \
152*aa3d547dSXin LI 						 SYSMODE_SEGOVR_CS      | \
153*aa3d547dSXin LI 						 SYSMODE_SEGOVR_DS      | \
154*aa3d547dSXin LI 						 SYSMODE_SEGOVR_ES      | \
155*aa3d547dSXin LI 						 SYSMODE_SEGOVR_FS      | \
156*aa3d547dSXin LI 						 SYSMODE_SEGOVR_GS      | \
157*aa3d547dSXin LI 						 SYSMODE_SEGOVR_SS)
158*aa3d547dSXin LI #define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS      | \
159*aa3d547dSXin LI 						 SYSMODE_SEGOVR_CS      | \
160*aa3d547dSXin LI 						 SYSMODE_SEGOVR_DS      | \
161*aa3d547dSXin LI 						 SYSMODE_SEGOVR_ES      | \
162*aa3d547dSXin LI 						 SYSMODE_SEGOVR_FS      | \
163*aa3d547dSXin LI 						 SYSMODE_SEGOVR_GS      | \
164*aa3d547dSXin LI 						 SYSMODE_SEGOVR_SS      | \
165*aa3d547dSXin LI 						 SYSMODE_PREFIX_DATA    | \
166*aa3d547dSXin LI 						 SYSMODE_PREFIX_ADDR)
167*aa3d547dSXin LI 
168*aa3d547dSXin LI #define  INTR_SYNCH           0x1
169*aa3d547dSXin LI 
170*aa3d547dSXin LI #endif /* __X86EMU_REGS_H */
171