1 // SPDX-License-Identifier: CDDL-1.0 2 /* 3 * CDDL HEADER START 4 * 5 * The contents of this file are subject to the terms of the 6 * Common Development and Distribution License (the "License"). 7 * You may not use this file except in compliance with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or https://opensource.org/licenses/CDDL-1.0. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright (c) 2018 Intel Corporation. 24 * Copyright (c) 2020 by Lawrence Livermore National Security, LLC. 25 * Copyright (c) 2025, Klara, Inc. 26 */ 27 28 #include <sys/zfs_context.h> 29 #include <sys/spa.h> 30 #include <sys/spa_impl.h> 31 #include <sys/vdev_impl.h> 32 #include <sys/vdev_draid.h> 33 #include <sys/vdev_raidz.h> 34 #include <sys/vdev_rebuild.h> 35 #include <sys/abd.h> 36 #include <sys/zio.h> 37 #include <sys/nvpair.h> 38 #include <sys/zio_checksum.h> 39 #include <sys/fs/zfs.h> 40 #include <sys/fm/fs/zfs.h> 41 #include <zfs_fletcher.h> 42 43 #ifdef ZFS_DEBUG 44 #include <sys/vdev.h> /* For vdev_xlate() in vdev_draid_io_verify() */ 45 #endif 46 47 /* 48 * dRAID is a distributed spare implementation for ZFS. A dRAID vdev is 49 * comprised of multiple raidz redundancy groups which are spread over the 50 * dRAID children. To ensure an even distribution, and avoid hot spots, a 51 * permutation mapping is applied to the order of the dRAID children. 52 * This mixing effectively distributes the parity columns evenly over all 53 * of the disks in the dRAID. 54 * 55 * This is beneficial because it means when resilvering all of the disks 56 * can participate thereby increasing the available IOPs and bandwidth. 57 * Furthermore, by reserving a small fraction of each child's total capacity 58 * virtual distributed spare disks can be created. These spares similarly 59 * benefit from the performance gains of spanning all of the children. The 60 * consequence of which is that resilvering to a distributed spare can 61 * substantially reduce the time required to restore full parity to pool 62 * with a failed disks. 63 * 64 * === dRAID group layout === 65 * 66 * First, let's define a "row" in the configuration to be a 16M chunk from 67 * each physical drive at the same offset. This is the minimum allowable 68 * size since it must be possible to store a full 16M block when there is 69 * only a single data column. Next, we define a "group" to be a set of 70 * sequential disks containing both the parity and data columns. We allow 71 * groups to span multiple rows in order to align any group size to any 72 * number of physical drives. Finally, a "slice" is comprised of the rows 73 * which contain the target number of groups. The permutation mappings 74 * are applied in a round robin fashion to each slice. 75 * 76 * Given D+P drives in a group (including parity drives) and C-S physical 77 * drives (not including the spare drives), we can distribute the groups 78 * across R rows without remainder by selecting the least common multiple 79 * of D+P and C-S as the number of groups; i.e. ngroups = LCM(D+P, C-S). 80 * 81 * In the example below, there are C=14 physical drives in the configuration 82 * with S=2 drives worth of spare capacity. Each group has a width of 9 83 * which includes D=8 data and P=1 parity drive. There are 4 groups and 84 * 3 rows per slice. Each group has a size of 144M (16M * 9) and a slice 85 * size is 576M (144M * 4). When allocating from a dRAID each group is 86 * filled before moving on to the next as show in slice0 below. 87 * 88 * data disks (8 data + 1 parity) spares (2) 89 * +===+===+===+===+===+===+===+===+===+===+===+===+===+===+ 90 * ^ | 2 | 6 | 1 | 11| 4 | 0 | 7 | 10| 8 | 9 | 13| 5 | 12| 3 | device map 0 91 * | +===+===+===+===+===+===+===+===+===+===+===+===+===+===+ 92 * | | group 0 | group 1..| | 93 * | +-----------------------------------+-----------+-------| 94 * | | 0 1 2 3 4 5 6 7 8 | 36 37 38| | r 95 * | | 9 10 11 12 13 14 15 16 17| 45 46 47| | o 96 * | | 18 19 20 21 22 23 24 25 26| 54 55 56| | w 97 * | 27 28 29 30 31 32 33 34 35| 63 64 65| | 0 98 * s +-----------------------+-----------------------+-------+ 99 * l | ..group 1 | group 2.. | | 100 * i +-----------------------+-----------------------+-------+ 101 * c | 39 40 41 42 43 44| 72 73 74 75 76 77| | r 102 * e | 48 49 50 51 52 53| 81 82 83 84 85 86| | o 103 * 0 | 57 58 59 60 61 62| 90 91 92 93 94 95| | w 104 * | 66 67 68 69 70 71| 99 100 101 102 103 104| | 1 105 * | +-----------+-----------+-----------------------+-------+ 106 * | |..group 2 | group 3 | | 107 * | +-----------+-----------+-----------------------+-------+ 108 * | | 78 79 80|108 109 110 111 112 113 114 115 116| | r 109 * | | 87 88 89|117 118 119 120 121 122 123 124 125| | o 110 * | | 96 97 98|126 127 128 129 130 131 132 133 134| | w 111 * v |105 106 107|135 136 137 138 139 140 141 142 143| | 2 112 * +===+===+===+===+===+===+===+===+===+===+===+===+===+===+ 113 * | 9 | 11| 12| 2 | 4 | 1 | 3 | 0 | 10| 13| 8 | 5 | 6 | 7 | device map 1 114 * s +===+===+===+===+===+===+===+===+===+===+===+===+===+===+ 115 * l | group 4 | group 5..| | row 3 116 * i +-----------------------+-----------+-----------+-------| 117 * c | ..group 5 | group 6.. | | row 4 118 * e +-----------+-----------+-----------------------+-------+ 119 * 1 |..group 6 | group 7 | | row 5 120 * +===+===+===+===+===+===+===+===+===+===+===+===+===+===+ 121 * | 3 | 5 | 10| 8 | 6 | 11| 12| 0 | 2 | 4 | 7 | 1 | 9 | 13| device map 2 122 * s +===+===+===+===+===+===+===+===+===+===+===+===+===+===+ 123 * l | group 8 | group 9..| | row 6 124 * i +-----------------------------------------------+-------| 125 * c | ..group 9 | group 10.. | | row 7 126 * e +-----------------------+-----------------------+-------+ 127 * 2 |..group 10 | group 11 | | row 8 128 * +-----------+-----------------------------------+-------+ 129 * 130 * This layout has several advantages over requiring that each row contain 131 * a whole number of groups. 132 * 133 * 1. The group count is not a relevant parameter when defining a dRAID 134 * layout. Only the group width is needed, and *all* groups will have 135 * the desired size. 136 * 137 * 2. All possible group widths (<= physical disk count) can be supported. 138 * 139 * 3. The logic within vdev_draid.c is simplified when the group width is 140 * the same for all groups (although some of the logic around computing 141 * permutation numbers and drive offsets is more complicated). 142 * 143 * N.B. The following array describes all valid dRAID permutation maps. 144 * Each row is used to generate a permutation map for a different number 145 * of children from a unique seed. The seeds were generated and carefully 146 * evaluated by the 'draid' utility in order to provide balanced mappings. 147 * In addition to the seed a checksum of the in-memory mapping is stored 148 * for verification. 149 * 150 * The imbalance ratio of a given failure (e.g. 5 disks wide, child 3 failed, 151 * with a given permutation map) is the ratio of the amounts of I/O that will 152 * be sent to the least and most busy disks when resilvering. The average 153 * imbalance ratio (of a given number of disks and permutation map) is the 154 * average of the ratios of all possible single and double disk failures. 155 * 156 * In order to achieve a low imbalance ratio the number of permutations in 157 * the mapping must be significantly larger than the number of children. 158 * For dRAID the number of permutations has been limited to 512 to minimize 159 * the map size. This does result in a gradually increasing imbalance ratio 160 * as seen in the table below. Increasing the number of permutations for 161 * larger child counts would reduce the imbalance ratio. However, in practice 162 * when there are a large number of children each child is responsible for 163 * fewer total IOs so it's less of a concern. 164 * 165 * Note these values are hard coded and must never be changed. Existing 166 * pools depend on the same mapping always being generated in order to 167 * read and write from the correct locations. Any change would make 168 * existing pools completely inaccessible. 169 */ 170 static const draid_map_t draid_maps[VDEV_DRAID_MAX_MAPS] = { 171 { 2, 256, 0x89ef3dabbcc7de37, 0x00000000433d433d }, /* 1.000 */ 172 { 3, 256, 0x89a57f3de98121b4, 0x00000000bcd8b7b5 }, /* 1.000 */ 173 { 4, 256, 0xc9ea9ec82340c885, 0x00000001819d7c69 }, /* 1.000 */ 174 { 5, 256, 0xf46733b7f4d47dfd, 0x00000002a1648d74 }, /* 1.010 */ 175 { 6, 256, 0x88c3c62d8585b362, 0x00000003d3b0c2c4 }, /* 1.031 */ 176 { 7, 256, 0x3a65d809b4d1b9d5, 0x000000055c4183ee }, /* 1.043 */ 177 { 8, 256, 0xe98930e3c5d2e90a, 0x00000006edfb0329 }, /* 1.059 */ 178 { 9, 256, 0x5a5430036b982ccb, 0x00000008ceaf6934 }, /* 1.056 */ 179 { 10, 256, 0x92bf389e9eadac74, 0x0000000b26668c09 }, /* 1.072 */ 180 { 11, 256, 0x74ccebf1dcf3ae80, 0x0000000dd691358c }, /* 1.083 */ 181 { 12, 256, 0x8847e41a1a9f5671, 0x00000010a0c63c8e }, /* 1.097 */ 182 { 13, 256, 0x7481b56debf0e637, 0x0000001424121fe4 }, /* 1.100 */ 183 { 14, 256, 0x559b8c44065f8967, 0x00000016ab2ff079 }, /* 1.121 */ 184 { 15, 256, 0x34c49545a2ee7f01, 0x0000001a6028efd6 }, /* 1.103 */ 185 { 16, 256, 0xb85f4fa81a7698f7, 0x0000001e95ff5e66 }, /* 1.111 */ 186 { 17, 256, 0x6353e47b7e47aba0, 0x00000021a81fa0fe }, /* 1.133 */ 187 { 18, 256, 0xaa549746b1cbb81c, 0x00000026f02494c9 }, /* 1.131 */ 188 { 19, 256, 0x892e343f2f31d690, 0x00000029eb392835 }, /* 1.130 */ 189 { 20, 256, 0x76914824db98cc3f, 0x0000003004f31a7c }, /* 1.141 */ 190 { 21, 256, 0x4b3cbabf9cfb1d0f, 0x00000036363a2408 }, /* 1.139 */ 191 { 22, 256, 0xf45c77abb4f035d4, 0x00000038dd0f3e84 }, /* 1.150 */ 192 { 23, 256, 0x5e18bd7f3fd4baf4, 0x0000003f0660391f }, /* 1.174 */ 193 { 24, 256, 0xa7b3a4d285d6503b, 0x000000443dfc9ff6 }, /* 1.168 */ 194 { 25, 256, 0x56ac7dd967521f5a, 0x0000004b03a87eb7 }, /* 1.180 */ 195 { 26, 256, 0x3a42dfda4eb880f7, 0x000000522c719bba }, /* 1.226 */ 196 { 27, 256, 0xd200d2fc6b54bf60, 0x0000005760b4fdf5 }, /* 1.228 */ 197 { 28, 256, 0xc52605bbd486c546, 0x0000005e00d8f74c }, /* 1.217 */ 198 { 29, 256, 0xc761779e63cd762f, 0x00000067be3cd85c }, /* 1.239 */ 199 { 30, 256, 0xca577b1e07f85ca5, 0x0000006f5517f3e4 }, /* 1.238 */ 200 { 31, 256, 0xfd50a593c518b3d4, 0x0000007370e7778f }, /* 1.273 */ 201 { 32, 512, 0xc6c87ba5b042650b, 0x000000f7eb08a156 }, /* 1.191 */ 202 { 33, 512, 0xc3880d0c9d458304, 0x0000010734b5d160 }, /* 1.199 */ 203 { 34, 512, 0xe920927e4d8b2c97, 0x00000118c1edbce0 }, /* 1.195 */ 204 { 35, 512, 0x8da7fcda87bde316, 0x0000012a3e9f9110 }, /* 1.201 */ 205 { 36, 512, 0xcf09937491514a29, 0x0000013bd6a24bef }, /* 1.194 */ 206 { 37, 512, 0x9b5abbf345cbd7cc, 0x0000014b9d90fac3 }, /* 1.237 */ 207 { 38, 512, 0x506312a44668d6a9, 0x0000015e1b5f6148 }, /* 1.242 */ 208 { 39, 512, 0x71659ede62b4755f, 0x00000173ef029bcd }, /* 1.231 */ 209 { 40, 512, 0xa7fde73fb74cf2d7, 0x000001866fb72748 }, /* 1.233 */ 210 { 41, 512, 0x19e8b461a1dea1d3, 0x000001a046f76b23 }, /* 1.271 */ 211 { 42, 512, 0x031c9b868cc3e976, 0x000001afa64c49d3 }, /* 1.263 */ 212 { 43, 512, 0xbaa5125faa781854, 0x000001c76789e278 }, /* 1.270 */ 213 { 44, 512, 0x4ed55052550d721b, 0x000001d800ccd8eb }, /* 1.281 */ 214 { 45, 512, 0x0fd63ddbdff90677, 0x000001f08ad59ed2 }, /* 1.282 */ 215 { 46, 512, 0x36d66546de7fdd6f, 0x000002016f09574b }, /* 1.286 */ 216 { 47, 512, 0x99f997e7eafb69d7, 0x0000021e42e47cb6 }, /* 1.329 */ 217 { 48, 512, 0xbecd9c2571312c5d, 0x000002320fe2872b }, /* 1.286 */ 218 { 49, 512, 0xd97371329e488a32, 0x0000024cd73f2ca7 }, /* 1.322 */ 219 { 50, 512, 0x30e9b136670749ee, 0x000002681c83b0e0 }, /* 1.335 */ 220 { 51, 512, 0x11ad6bc8f47aaeb4, 0x0000027e9261b5d5 }, /* 1.305 */ 221 { 52, 512, 0x68e445300af432c1, 0x0000029aa0eb7dbf }, /* 1.330 */ 222 { 53, 512, 0x910fb561657ea98c, 0x000002b3dca04853 }, /* 1.365 */ 223 { 54, 512, 0xd619693d8ce5e7a5, 0x000002cc280e9c97 }, /* 1.334 */ 224 { 55, 512, 0x24e281f564dbb60a, 0x000002e9fa842713 }, /* 1.364 */ 225 { 56, 512, 0x947a7d3bdaab44c5, 0x000003046680f72e }, /* 1.374 */ 226 { 57, 512, 0x2d44fec9c093e0de, 0x00000324198ba810 }, /* 1.363 */ 227 { 58, 512, 0x87743c272d29bb4c, 0x0000033ec48c9ac9 }, /* 1.401 */ 228 { 59, 512, 0x96aa3b6f67f5d923, 0x0000034faead902c }, /* 1.392 */ 229 { 60, 512, 0x94a4f1faf520b0d3, 0x0000037d713ab005 }, /* 1.360 */ 230 { 61, 512, 0xb13ed3a272f711a2, 0x00000397368f3cbd }, /* 1.396 */ 231 { 62, 512, 0x3b1b11805fa4a64a, 0x000003b8a5e2840c }, /* 1.453 */ 232 { 63, 512, 0x4c74caad9172ba71, 0x000003d4be280290 }, /* 1.437 */ 233 { 64, 512, 0x035ff643923dd29e, 0x000003fad6c355e1 }, /* 1.402 */ 234 { 65, 512, 0x768e9171b11abd3c, 0x0000040eb07fed20 }, /* 1.459 */ 235 { 66, 512, 0x75880e6f78a13ddd, 0x000004433d6acf14 }, /* 1.423 */ 236 { 67, 512, 0x910b9714f698a877, 0x00000451ea65d5db }, /* 1.447 */ 237 { 68, 512, 0x87f5db6f9fdcf5c7, 0x000004732169e3f7 }, /* 1.450 */ 238 { 69, 512, 0x836d4968fbaa3706, 0x000004954068a380 }, /* 1.455 */ 239 { 70, 512, 0xc567d73a036421ab, 0x000004bd7cb7bd3d }, /* 1.463 */ 240 { 71, 512, 0x619df40f240b8fed, 0x000004e376c2e972 }, /* 1.463 */ 241 { 72, 512, 0x42763a680d5bed8e, 0x000005084275c680 }, /* 1.452 */ 242 { 73, 512, 0x5866f064b3230431, 0x0000052906f2c9ab }, /* 1.498 */ 243 { 74, 512, 0x9fa08548b1621a44, 0x0000054708019247 }, /* 1.526 */ 244 { 75, 512, 0xb6053078ce0fc303, 0x00000572cc5c72b0 }, /* 1.491 */ 245 { 76, 512, 0x4a7aad7bf3890923, 0x0000058e987bc8e9 }, /* 1.470 */ 246 { 77, 512, 0xe165613fd75b5a53, 0x000005c20473a211 }, /* 1.527 */ 247 { 78, 512, 0x3ff154ac878163a6, 0x000005d659194bf3 }, /* 1.509 */ 248 { 79, 512, 0x24b93ade0aa8a532, 0x0000060a201c4f8e }, /* 1.569 */ 249 { 80, 512, 0xc18e2d14cd9bb554, 0x0000062c55cfe48c }, /* 1.555 */ 250 { 81, 512, 0x98cc78302feb58b6, 0x0000066656a07194 }, /* 1.509 */ 251 { 82, 512, 0xc6c5fd5a2abc0543, 0x0000067cff94fbf8 }, /* 1.596 */ 252 { 83, 512, 0xa7962f514acbba21, 0x000006ab7b5afa2e }, /* 1.568 */ 253 { 84, 512, 0xba02545069ddc6dc, 0x000006d19861364f }, /* 1.541 */ 254 { 85, 512, 0x447c73192c35073e, 0x000006fce315ce35 }, /* 1.623 */ 255 { 86, 512, 0x48beef9e2d42b0c2, 0x00000720a8e38b6b }, /* 1.620 */ 256 { 87, 512, 0x4874cf98541a35e0, 0x00000758382a2273 }, /* 1.597 */ 257 { 88, 512, 0xad4cf8333a31127a, 0x00000781e1651b1b }, /* 1.575 */ 258 { 89, 512, 0x47ae4859d57888c1, 0x000007b27edbe5bc }, /* 1.627 */ 259 { 90, 512, 0x06f7723cfe5d1891, 0x000007dc2a96d8eb }, /* 1.596 */ 260 { 91, 512, 0xd4e44218d660576d, 0x0000080ac46f02d5 }, /* 1.622 */ 261 { 92, 512, 0x7066702b0d5be1f2, 0x00000832c96d154e }, /* 1.695 */ 262 { 93, 512, 0x011209b4f9e11fb9, 0x0000085eefda104c }, /* 1.605 */ 263 { 94, 512, 0x47ffba30a0b35708, 0x00000899badc32dc }, /* 1.625 */ 264 { 95, 512, 0x1a95a6ac4538aaa8, 0x000008b6b69a42b2 }, /* 1.687 */ 265 { 96, 512, 0xbda2b239bb2008eb, 0x000008f22d2de38a }, /* 1.621 */ 266 { 97, 512, 0x7ffa0bea90355c6c, 0x0000092e5b23b816 }, /* 1.699 */ 267 { 98, 512, 0x1d56ba34be426795, 0x0000094f482e5d1b }, /* 1.688 */ 268 { 99, 512, 0x0aa89d45c502e93d, 0x00000977d94a98ce }, /* 1.642 */ 269 { 100, 512, 0x54369449f6857774, 0x000009c06c9b34cc }, /* 1.683 */ 270 { 101, 512, 0xf7d4dd8445b46765, 0x000009e5dc542259 }, /* 1.755 */ 271 { 102, 512, 0xfa8866312f169469, 0x00000a16b54eae93 }, /* 1.692 */ 272 { 103, 512, 0xd8a5aea08aef3ff9, 0x00000a381d2cbfe7 }, /* 1.747 */ 273 { 104, 512, 0x66bcd2c3d5f9ef0e, 0x00000a8191817be7 }, /* 1.751 */ 274 { 105, 512, 0x3fb13a47a012ec81, 0x00000ab562b9a254 }, /* 1.751 */ 275 { 106, 512, 0x43100f01c9e5e3ca, 0x00000aeee84c185f }, /* 1.726 */ 276 { 107, 512, 0xca09c50ccee2d054, 0x00000b1c359c047d }, /* 1.788 */ 277 { 108, 512, 0xd7176732ac503f9b, 0x00000b578bc52a73 }, /* 1.740 */ 278 { 109, 512, 0xed206e51f8d9422d, 0x00000b8083e0d960 }, /* 1.780 */ 279 { 110, 512, 0x17ead5dc6ba0dcd6, 0x00000bcfb1a32ca8 }, /* 1.836 */ 280 { 111, 512, 0x5f1dc21e38a969eb, 0x00000c0171becdd6 }, /* 1.778 */ 281 { 112, 512, 0xddaa973de33ec528, 0x00000c3edaba4b95 }, /* 1.831 */ 282 { 113, 512, 0x2a5eccd7735a3630, 0x00000c630664e7df }, /* 1.825 */ 283 { 114, 512, 0xafcccee5c0b71446, 0x00000cb65392f6e4 }, /* 1.826 */ 284 { 115, 512, 0x8fa30c5e7b147e27, 0x00000cd4db391e55 }, /* 1.843 */ 285 { 116, 512, 0x5afe0711fdfafd82, 0x00000d08cb4ec35d }, /* 1.826 */ 286 { 117, 512, 0x533a6090238afd4c, 0x00000d336f115d1b }, /* 1.803 */ 287 { 118, 512, 0x90cf11b595e39a84, 0x00000d8e041c2048 }, /* 1.857 */ 288 { 119, 512, 0x0d61a3b809444009, 0x00000dcb798afe35 }, /* 1.877 */ 289 { 120, 512, 0x7f34da0f54b0d114, 0x00000df3922664e1 }, /* 1.849 */ 290 { 121, 512, 0xa52258d5b72f6551, 0x00000e4d37a9872d }, /* 1.867 */ 291 { 122, 512, 0xc1de54d7672878db, 0x00000e6583a94cf6 }, /* 1.978 */ 292 { 123, 512, 0x1d03354316a414ab, 0x00000ebffc50308d }, /* 1.947 */ 293 { 124, 512, 0xcebdcc377665412c, 0x00000edee1997cea }, /* 1.865 */ 294 { 125, 512, 0x4ddd4c04b1a12344, 0x00000f21d64b373f }, /* 1.881 */ 295 { 126, 512, 0x64fc8f94e3973658, 0x00000f8f87a8896b }, /* 1.882 */ 296 { 127, 512, 0x68765f78034a334e, 0x00000fb8fe62197e }, /* 1.867 */ 297 { 128, 512, 0xaf36b871a303e816, 0x00000fec6f3afb1e }, /* 1.972 */ 298 { 129, 512, 0x2a4cbf73866c3a28, 0x00001027febfe4e5 }, /* 1.896 */ 299 { 130, 512, 0x9cb128aacdcd3b2f, 0x0000106aa8ac569d }, /* 1.965 */ 300 { 131, 512, 0x5511d41c55869124, 0x000010bbd755ddf1 }, /* 1.963 */ 301 { 132, 512, 0x42f92461937f284a, 0x000010fb8bceb3b5 }, /* 1.925 */ 302 { 133, 512, 0xe2d89a1cf6f1f287, 0x0000114cf5331e34 }, /* 1.862 */ 303 { 134, 512, 0xdc631a038956200e, 0x0000116428d2adc5 }, /* 2.042 */ 304 { 135, 512, 0xb2e5ac222cd236be, 0x000011ca88e4d4d2 }, /* 1.935 */ 305 { 136, 512, 0xbc7d8236655d88e7, 0x000011e39cb94e66 }, /* 2.005 */ 306 { 137, 512, 0x073e02d88d2d8e75, 0x0000123136c7933c }, /* 2.041 */ 307 { 138, 512, 0x3ddb9c3873166be0, 0x00001280e4ec6d52 }, /* 1.997 */ 308 { 139, 512, 0x7d3b1a845420e1b5, 0x000012c2e7cd6a44 }, /* 1.996 */ 309 { 140, 512, 0x60102308aa7b2a6c, 0x000012fc490e6c7d }, /* 2.053 */ 310 { 141, 512, 0xdb22bb2f9eb894aa, 0x00001343f5a85a1a }, /* 1.971 */ 311 { 142, 512, 0xd853f879a13b1606, 0x000013bb7d5f9048 }, /* 2.018 */ 312 { 143, 512, 0x001620a03f804b1d, 0x000013e74cc794fd }, /* 1.961 */ 313 { 144, 512, 0xfdb52dda76fbf667, 0x00001442d2f22480 }, /* 2.046 */ 314 { 145, 512, 0xa9160110f66e24ff, 0x0000144b899f9dbb }, /* 1.968 */ 315 { 146, 512, 0x77306a30379ae03b, 0x000014cb98eb1f81 }, /* 2.143 */ 316 { 147, 512, 0x14f5985d2752319d, 0x000014feab821fc9 }, /* 2.064 */ 317 { 148, 512, 0xa4b8ff11de7863f8, 0x0000154a0e60b9c9 }, /* 2.023 */ 318 { 149, 512, 0x44b345426455c1b3, 0x000015999c3c569c }, /* 2.136 */ 319 { 150, 512, 0x272677826049b46c, 0x000015c9697f4b92 }, /* 2.063 */ 320 { 151, 512, 0x2f9216e2cd74fe40, 0x0000162b1f7bbd39 }, /* 1.974 */ 321 { 152, 512, 0x706ae3e763ad8771, 0x00001661371c55e1 }, /* 2.210 */ 322 { 153, 512, 0xf7fd345307c2480e, 0x000016e251f28b6a }, /* 2.006 */ 323 { 154, 512, 0x6e94e3d26b3139eb, 0x000016f2429bb8c6 }, /* 2.193 */ 324 { 155, 512, 0x5458bbfbb781fcba, 0x0000173efdeca1b9 }, /* 2.163 */ 325 { 156, 512, 0xa80e2afeccd93b33, 0x000017bfdcb78adc }, /* 2.046 */ 326 { 157, 512, 0x1e4ccbb22796cf9d, 0x00001826fdcc39c9 }, /* 2.084 */ 327 { 158, 512, 0x8fba4b676aaa3663, 0x00001841a1379480 }, /* 2.264 */ 328 { 159, 512, 0xf82b843814b315fa, 0x000018886e19b8a3 }, /* 2.074 */ 329 { 160, 512, 0x7f21e920ecf753a3, 0x0000191812ca0ea7 }, /* 2.282 */ 330 { 161, 512, 0x48bb8ea2c4caa620, 0x0000192f310faccf }, /* 2.148 */ 331 { 162, 512, 0x5cdb652b4952c91b, 0x0000199e1d7437c7 }, /* 2.355 */ 332 { 163, 512, 0x6ac1ba6f78c06cd4, 0x000019cd11f82c70 }, /* 2.164 */ 333 { 164, 512, 0x9faf5f9ca2669a56, 0x00001a18d5431f6a }, /* 2.393 */ 334 { 165, 512, 0xaa57e9383eb01194, 0x00001a9e7d253d85 }, /* 2.178 */ 335 { 166, 512, 0x896967bf495c34d2, 0x00001afb8319b9fc }, /* 2.334 */ 336 { 167, 512, 0xdfad5f05de225f1b, 0x00001b3a59c3093b }, /* 2.266 */ 337 { 168, 512, 0xfd299a99f9f2abdd, 0x00001bb6f1a10799 }, /* 2.304 */ 338 { 169, 512, 0xdda239e798fe9fd4, 0x00001bfae0c9692d }, /* 2.218 */ 339 { 170, 512, 0x5fca670414a32c3e, 0x00001c22129dbcff }, /* 2.377 */ 340 { 171, 512, 0x1bb8934314b087de, 0x00001c955db36cd0 }, /* 2.155 */ 341 { 172, 512, 0xd96394b4b082200d, 0x00001cfc8619b7e6 }, /* 2.404 */ 342 { 173, 512, 0xb612a7735b1c8cbc, 0x00001d303acdd585 }, /* 2.205 */ 343 { 174, 512, 0x28e7430fe5875fe1, 0x00001d7ed5b3697d }, /* 2.359 */ 344 { 175, 512, 0x5038e89efdd981b9, 0x00001dc40ec35c59 }, /* 2.158 */ 345 { 176, 512, 0x075fd78f1d14db7c, 0x00001e31c83b4a2b }, /* 2.614 */ 346 { 177, 512, 0xc50fafdb5021be15, 0x00001e7cdac82fbc }, /* 2.239 */ 347 { 178, 512, 0xe6dc7572ce7b91c7, 0x00001edd8bb454fc }, /* 2.493 */ 348 { 179, 512, 0x21f7843e7beda537, 0x00001f3a8e019d6c }, /* 2.327 */ 349 { 180, 512, 0xc83385e20b43ec82, 0x00001f70735ec137 }, /* 2.231 */ 350 { 181, 512, 0xca818217dddb21fd, 0x0000201ca44c5a3c }, /* 2.237 */ 351 { 182, 512, 0xe6035defea48f933, 0x00002038e3346658 }, /* 2.691 */ 352 { 183, 512, 0x47262a4f953dac5a, 0x000020c2e554314e }, /* 2.170 */ 353 { 184, 512, 0xe24c7246260873ea, 0x000021197e618d64 }, /* 2.600 */ 354 { 185, 512, 0xeef6b57c9b58e9e1, 0x0000217ea48ecddc }, /* 2.391 */ 355 { 186, 512, 0x2becd3346e386142, 0x000021c496d4a5f9 }, /* 2.677 */ 356 { 187, 512, 0x63c6207bdf3b40a3, 0x0000220e0f2eec0c }, /* 2.410 */ 357 { 188, 512, 0x3056ce8989767d4b, 0x0000228eb76cd137 }, /* 2.776 */ 358 { 189, 512, 0x91af61c307cee780, 0x000022e17e2ea501 }, /* 2.266 */ 359 { 190, 512, 0xda359da225f6d54f, 0x00002358a2debc19 }, /* 2.717 */ 360 { 191, 512, 0x0a5f7a2a55607ba0, 0x0000238a79dac18c }, /* 2.474 */ 361 { 192, 512, 0x27bb75bf5224638a, 0x00002403a58e2351 }, /* 2.673 */ 362 { 193, 512, 0x1ebfdb94630f5d0f, 0x00002492a10cb339 }, /* 2.420 */ 363 { 194, 512, 0x6eae5e51d9c5f6fb, 0x000024ce4bf98715 }, /* 2.898 */ 364 { 195, 512, 0x08d903b4daedc2e0, 0x0000250d1e15886c }, /* 2.363 */ 365 { 196, 512, 0xc722a2f7fa7cd686, 0x0000258a99ed0c9e }, /* 2.747 */ 366 { 197, 512, 0x8f71faf0e54e361d, 0x000025dee11976f5 }, /* 2.531 */ 367 { 198, 512, 0x87f64695c91a54e7, 0x0000264e00a43da0 }, /* 2.707 */ 368 { 199, 512, 0xc719cbac2c336b92, 0x000026d327277ac1 }, /* 2.315 */ 369 { 200, 512, 0xe7e647afaf771ade, 0x000027523a5c44bf }, /* 3.012 */ 370 { 201, 512, 0x12d4b5c38ce8c946, 0x0000273898432545 }, /* 2.378 */ 371 { 202, 512, 0xf2e0cd4067bdc94a, 0x000027e47bb2c935 }, /* 2.969 */ 372 { 203, 512, 0x21b79f14d6d947d3, 0x0000281e64977f0d }, /* 2.594 */ 373 { 204, 512, 0x515093f952f18cd6, 0x0000289691a473fd }, /* 2.763 */ 374 { 205, 512, 0xd47b160a1b1022c8, 0x00002903e8b52411 }, /* 2.457 */ 375 { 206, 512, 0xc02fc96684715a16, 0x0000297515608601 }, /* 3.057 */ 376 { 207, 512, 0xef51e68efba72ed0, 0x000029ef73604804 }, /* 2.590 */ 377 { 208, 512, 0x9e3be6e5448b4f33, 0x00002a2846ed074b }, /* 3.047 */ 378 { 209, 512, 0x81d446c6d5fec063, 0x00002a92ca693455 }, /* 2.676 */ 379 { 210, 512, 0xff215de8224e57d5, 0x00002b2271fe3729 }, /* 2.993 */ 380 { 211, 512, 0xe2524d9ba8f69796, 0x00002b64b99c3ba2 }, /* 2.457 */ 381 { 212, 512, 0xf6b28e26097b7e4b, 0x00002bd768b6e068 }, /* 3.182 */ 382 { 213, 512, 0x893a487f30ce1644, 0x00002c67f722b4b2 }, /* 2.563 */ 383 { 214, 512, 0x386566c3fc9871df, 0x00002cc1cf8b4037 }, /* 3.025 */ 384 { 215, 512, 0x1e0ed78edf1f558a, 0x00002d3948d36c7f }, /* 2.730 */ 385 { 216, 512, 0xe3bc20c31e61f113, 0x00002d6d6b12e025 }, /* 3.036 */ 386 { 217, 512, 0xd6c3ad2e23021882, 0x00002deff7572241 }, /* 2.722 */ 387 { 218, 512, 0xb4a9f95cf0f69c5a, 0x00002e67d537aa36 }, /* 3.356 */ 388 { 219, 512, 0x6e98ed6f6c38e82f, 0x00002e9720626789 }, /* 2.697 */ 389 { 220, 512, 0x2e01edba33fddac7, 0x00002f407c6b0198 }, /* 2.979 */ 390 { 221, 512, 0x559d02e1f5f57ccc, 0x00002fb6a5ab4f24 }, /* 2.858 */ 391 { 222, 512, 0xac18f5a916adcd8e, 0x0000304ae1c5c57e }, /* 3.258 */ 392 { 223, 512, 0x15789fbaddb86f4b, 0x0000306f6e019c78 }, /* 2.693 */ 393 { 224, 512, 0xf4a9c36d5bc4c408, 0x000030da40434213 }, /* 3.259 */ 394 { 225, 512, 0xf640f90fd2727f44, 0x00003189ed37b90c }, /* 2.733 */ 395 { 226, 512, 0xb5313d390d61884a, 0x000031e152616b37 }, /* 3.235 */ 396 { 227, 512, 0x4bae6b3ce9160939, 0x0000321f40aeac42 }, /* 2.983 */ 397 { 228, 512, 0x838c34480f1a66a1, 0x000032f389c0f78e }, /* 3.308 */ 398 { 229, 512, 0xb1c4a52c8e3d6060, 0x0000330062a40284 }, /* 2.715 */ 399 { 230, 512, 0xe0f1110c6d0ed822, 0x0000338be435644f }, /* 3.540 */ 400 { 231, 512, 0x9f1a8ccdcea68d4b, 0x000034045a4e97e1 }, /* 2.779 */ 401 { 232, 512, 0x3261ed62223f3099, 0x000034702cfc401c }, /* 3.084 */ 402 { 233, 512, 0xf2191e2311022d65, 0x00003509dd19c9fc }, /* 2.987 */ 403 { 234, 512, 0xf102a395c2033abc, 0x000035654dc96fae }, /* 3.341 */ 404 { 235, 512, 0x11fe378f027906b6, 0x000035b5193b0264 }, /* 2.793 */ 405 { 236, 512, 0xf777f2c026b337aa, 0x000036704f5d9297 }, /* 3.518 */ 406 { 237, 512, 0x1b04e9c2ee143f32, 0x000036dfbb7af218 }, /* 2.962 */ 407 { 238, 512, 0x2fcec95266f9352c, 0x00003785c8df24a9 }, /* 3.196 */ 408 { 239, 512, 0xfe2b0e47e427dd85, 0x000037cbdf5da729 }, /* 2.914 */ 409 { 240, 512, 0x72b49bf2225f6c6d, 0x0000382227c15855 }, /* 3.408 */ 410 { 241, 512, 0x50486b43df7df9c7, 0x0000389b88be6453 }, /* 2.903 */ 411 { 242, 512, 0x5192a3e53181c8ab, 0x000038ddf3d67263 }, /* 3.778 */ 412 { 243, 512, 0xe9f5d8365296fd5e, 0x0000399f1c6c9e9c }, /* 3.026 */ 413 { 244, 512, 0xc740263f0301efa8, 0x00003a147146512d }, /* 3.347 */ 414 { 245, 512, 0x23cd0f2b5671e67d, 0x00003ab10bcc0d9d }, /* 3.212 */ 415 { 246, 512, 0x002ccc7e5cd41390, 0x00003ad6cd14a6c0 }, /* 3.482 */ 416 { 247, 512, 0x9aafb3c02544b31b, 0x00003b8cb8779fb0 }, /* 3.146 */ 417 { 248, 512, 0x72ba07a78b121999, 0x00003c24142a5a3f }, /* 3.626 */ 418 { 249, 512, 0x3d784aa58edfc7b4, 0x00003cd084817d99 }, /* 2.952 */ 419 { 250, 512, 0xaab750424d8004af, 0x00003d506a8e098e }, /* 3.463 */ 420 { 251, 512, 0x84403fcf8e6b5ca2, 0x00003d4c54c2aec4 }, /* 3.131 */ 421 { 252, 512, 0x71eb7455ec98e207, 0x00003e655715cf2c }, /* 3.538 */ 422 { 253, 512, 0xd752b4f19301595b, 0x00003ecd7b2ca5ac }, /* 2.974 */ 423 { 254, 512, 0xc4674129750499de, 0x00003e99e86d3e95 }, /* 3.843 */ 424 { 255, 512, 0x9772baff5cd12ef5, 0x00003f895c019841 }, /* 3.088 */ 425 }; 426 427 /* 428 * Verify the map is valid. Each device index must appear exactly 429 * once in every row, and the permutation array checksum must match. 430 */ 431 static int 432 verify_perms(uint8_t *perms, uint64_t children, uint64_t nperms, 433 uint64_t checksum) 434 { 435 int countssz = sizeof (uint16_t) * children; 436 uint16_t *counts = kmem_zalloc(countssz, KM_SLEEP); 437 438 for (int i = 0; i < nperms; i++) { 439 for (int j = 0; j < children; j++) { 440 uint8_t val = perms[(i * children) + j]; 441 442 if (val >= children || counts[val] != i) { 443 kmem_free(counts, countssz); 444 return (EINVAL); 445 } 446 447 counts[val]++; 448 } 449 } 450 451 if (checksum != 0) { 452 int permssz = sizeof (uint8_t) * children * nperms; 453 zio_cksum_t cksum; 454 455 fletcher_4_native_varsize(perms, permssz, &cksum); 456 457 if (checksum != cksum.zc_word[0]) { 458 kmem_free(counts, countssz); 459 return (ECKSUM); 460 } 461 } 462 463 kmem_free(counts, countssz); 464 465 return (0); 466 } 467 468 /* 469 * Generate the permutation array for the draid_map_t. These maps control 470 * the placement of all data in a dRAID. Therefore it's critical that the 471 * seed always generates the same mapping. We provide our own pseudo-random 472 * number generator for this purpose. 473 */ 474 int 475 vdev_draid_generate_perms(const draid_map_t *map, uint8_t **permsp) 476 { 477 VERIFY3U(map->dm_children, >=, VDEV_DRAID_MIN_CHILDREN); 478 VERIFY3U(map->dm_children, <=, VDEV_DRAID_MAX_CHILDREN); 479 VERIFY3U(map->dm_seed, !=, 0); 480 VERIFY3U(map->dm_nperms, !=, 0); 481 VERIFY0P(map->dm_perms); 482 483 #ifdef _KERNEL 484 /* 485 * The kernel code always provides both a map_seed and checksum. 486 * Only the tests/zfs-tests/cmd/draid/draid.c utility will provide 487 * a zero checksum when generating new candidate maps. 488 */ 489 VERIFY3U(map->dm_checksum, !=, 0); 490 #endif 491 uint64_t children = map->dm_children; 492 uint64_t nperms = map->dm_nperms; 493 int rowsz = sizeof (uint8_t) * children; 494 int permssz = rowsz * nperms; 495 uint8_t *perms; 496 497 /* Allocate the permutation array */ 498 perms = vmem_alloc(permssz, KM_SLEEP); 499 500 /* Setup an initial row with a known pattern */ 501 uint8_t *initial_row = kmem_alloc(rowsz, KM_SLEEP); 502 for (int i = 0; i < children; i++) 503 initial_row[i] = i; 504 505 uint64_t draid_seed[2] = { VDEV_DRAID_SEED, map->dm_seed }; 506 uint8_t *current_row, *previous_row = initial_row; 507 508 /* 509 * Perform a Fisher-Yates shuffle of each row using the previous 510 * row as the starting point. An initial_row with known pattern 511 * is used as the input for the first row. 512 */ 513 for (int i = 0; i < nperms; i++) { 514 current_row = &perms[i * children]; 515 memcpy(current_row, previous_row, rowsz); 516 517 for (int j = children - 1; j > 0; j--) { 518 uint64_t k = vdev_draid_rand(draid_seed) % (j + 1); 519 uint8_t val = current_row[j]; 520 current_row[j] = current_row[k]; 521 current_row[k] = val; 522 } 523 524 previous_row = current_row; 525 } 526 527 kmem_free(initial_row, rowsz); 528 529 int error = verify_perms(perms, children, nperms, map->dm_checksum); 530 if (error) { 531 vmem_free(perms, permssz); 532 return (error); 533 } 534 535 *permsp = perms; 536 537 return (0); 538 } 539 540 /* 541 * Lookup the fixed draid_map_t for the requested number of children. 542 */ 543 int 544 vdev_draid_lookup_map(uint64_t children, const draid_map_t **mapp) 545 { 546 for (int i = 0; i < VDEV_DRAID_MAX_MAPS; i++) { 547 if (draid_maps[i].dm_children == children) { 548 *mapp = &draid_maps[i]; 549 return (0); 550 } 551 } 552 553 return (ENOENT); 554 } 555 556 /* 557 * Lookup the permutation array and iteration id for the provided offset. 558 */ 559 static void 560 vdev_draid_get_perm(vdev_draid_config_t *vdc, uint64_t pindex, 561 uint8_t **base, uint64_t *iter) 562 { 563 uint64_t ncols = vdc->vdc_children; 564 uint64_t poff = pindex % (vdc->vdc_nperms * ncols); 565 566 *base = vdc->vdc_perms + (poff / ncols) * ncols; 567 *iter = poff % ncols; 568 } 569 570 static inline uint64_t 571 vdev_draid_permute_id(vdev_draid_config_t *vdc, 572 uint8_t *base, uint64_t iter, uint64_t index) 573 { 574 return ((base[index] + iter) % vdc->vdc_children); 575 } 576 577 /* 578 * Return the asize which is the psize rounded up to a full group width. 579 * i.e. vdev_draid_psize_to_asize(). 580 */ 581 static uint64_t 582 vdev_draid_psize_to_asize(vdev_t *vd, uint64_t psize, uint64_t txg) 583 { 584 (void) txg; 585 vdev_draid_config_t *vdc = vd->vdev_tsd; 586 uint64_t ashift = vd->vdev_ashift; 587 588 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 589 590 uint64_t rows = ((psize - 1) / (vdc->vdc_ndata << ashift)) + 1; 591 uint64_t asize = (rows * vdc->vdc_groupwidth) << ashift; 592 593 ASSERT3U(asize, !=, 0); 594 ASSERT0(asize % (vdc->vdc_groupwidth)); 595 596 return (asize); 597 } 598 599 /* 600 * Deflate the asize to the psize, this includes stripping parity. 601 */ 602 uint64_t 603 vdev_draid_asize_to_psize(vdev_t *vd, uint64_t asize, uint64_t txg) 604 { 605 (void) txg; 606 vdev_draid_config_t *vdc = vd->vdev_tsd; 607 608 ASSERT0(asize % vdc->vdc_groupwidth); 609 610 return ((asize / vdc->vdc_groupwidth) * vdc->vdc_ndata); 611 } 612 613 /* 614 * Convert a logical offset to the corresponding group number. 615 */ 616 static uint64_t 617 vdev_draid_offset_to_group(vdev_t *vd, uint64_t offset) 618 { 619 vdev_draid_config_t *vdc = vd->vdev_tsd; 620 621 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 622 623 return (offset / vdc->vdc_groupsz); 624 } 625 626 /* 627 * Convert a group number to the logical starting offset for that group. 628 */ 629 static uint64_t 630 vdev_draid_group_to_offset(vdev_t *vd, uint64_t group) 631 { 632 vdev_draid_config_t *vdc = vd->vdev_tsd; 633 634 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 635 636 return (group * vdc->vdc_groupsz); 637 } 638 639 /* 640 * Full stripe writes. When writing, all columns (D+P) are required. Parity 641 * is calculated over all the columns, including empty zero filled sectors, 642 * and each is written to disk. While only the data columns are needed for 643 * a normal read, all of the columns are required for reconstruction when 644 * performing a sequential resilver. 645 * 646 * For "big columns" it's sufficient to map the correct range of the zio ABD. 647 * Partial columns require allocating a gang ABD in order to zero fill the 648 * empty sectors. When the column is empty a zero filled sector must be 649 * mapped. In all cases the data ABDs must be the same size as the parity 650 * ABDs (e.g. rc->rc_size == parity_size). 651 */ 652 static void 653 vdev_draid_map_alloc_write(zio_t *zio, uint64_t abd_offset, raidz_row_t *rr) 654 { 655 uint64_t skip_size = 1ULL << zio->io_vd->vdev_top->vdev_ashift; 656 uint64_t parity_size = rr->rr_col[0].rc_size; 657 uint64_t abd_off = abd_offset; 658 659 ASSERT3U(zio->io_type, ==, ZIO_TYPE_WRITE); 660 ASSERT3U(parity_size, ==, abd_get_size(rr->rr_col[0].rc_abd)); 661 662 for (uint64_t c = rr->rr_firstdatacol; c < rr->rr_cols; c++) { 663 raidz_col_t *rc = &rr->rr_col[c]; 664 665 if (rc->rc_size == 0) { 666 /* empty data column (small write), add a skip sector */ 667 ASSERT3U(skip_size, ==, parity_size); 668 rc->rc_abd = abd_get_zeros(skip_size); 669 } else if (rc->rc_size == parity_size) { 670 /* this is a "big column" */ 671 rc->rc_abd = abd_get_offset_struct(&rc->rc_abdstruct, 672 zio->io_abd, abd_off, rc->rc_size); 673 } else { 674 /* short data column, add a skip sector */ 675 ASSERT3U(rc->rc_size + skip_size, ==, parity_size); 676 rc->rc_abd = abd_alloc_gang(); 677 abd_gang_add(rc->rc_abd, abd_get_offset_size( 678 zio->io_abd, abd_off, rc->rc_size), B_TRUE); 679 abd_gang_add(rc->rc_abd, abd_get_zeros(skip_size), 680 B_TRUE); 681 } 682 683 ASSERT3U(abd_get_size(rc->rc_abd), ==, parity_size); 684 685 abd_off += rc->rc_size; 686 rc->rc_size = parity_size; 687 } 688 689 IMPLY(abd_offset != 0, abd_off == zio->io_size); 690 } 691 692 /* 693 * Scrub/resilver reads. In order to store the contents of the skip sectors 694 * an additional ABD is allocated. The columns are handled in the same way 695 * as a full stripe write except instead of using the zero ABD the newly 696 * allocated skip ABD is used to back the skip sectors. In all cases the 697 * data ABD must be the same size as the parity ABDs. 698 */ 699 static void 700 vdev_draid_map_alloc_scrub(zio_t *zio, uint64_t abd_offset, raidz_row_t *rr) 701 { 702 uint64_t skip_size = 1ULL << zio->io_vd->vdev_top->vdev_ashift; 703 uint64_t parity_size = rr->rr_col[0].rc_size; 704 uint64_t abd_off = abd_offset; 705 uint64_t skip_off = 0; 706 707 ASSERT3U(zio->io_type, ==, ZIO_TYPE_READ); 708 ASSERT0P(rr->rr_abd_empty); 709 710 if (rr->rr_nempty > 0) { 711 rr->rr_abd_empty = abd_alloc_linear(rr->rr_nempty * skip_size, 712 B_FALSE); 713 } 714 715 for (uint64_t c = rr->rr_firstdatacol; c < rr->rr_cols; c++) { 716 raidz_col_t *rc = &rr->rr_col[c]; 717 718 if (rc->rc_size == 0) { 719 /* empty data column (small read), add a skip sector */ 720 ASSERT3U(skip_size, ==, parity_size); 721 ASSERT3U(rr->rr_nempty, !=, 0); 722 rc->rc_abd = abd_get_offset_size(rr->rr_abd_empty, 723 skip_off, skip_size); 724 skip_off += skip_size; 725 } else if (rc->rc_size == parity_size) { 726 /* this is a "big column" */ 727 rc->rc_abd = abd_get_offset_struct(&rc->rc_abdstruct, 728 zio->io_abd, abd_off, rc->rc_size); 729 } else { 730 /* short data column, add a skip sector */ 731 ASSERT3U(rc->rc_size + skip_size, ==, parity_size); 732 ASSERT3U(rr->rr_nempty, !=, 0); 733 rc->rc_abd = abd_alloc_gang(); 734 abd_gang_add(rc->rc_abd, abd_get_offset_size( 735 zio->io_abd, abd_off, rc->rc_size), B_TRUE); 736 abd_gang_add(rc->rc_abd, abd_get_offset_size( 737 rr->rr_abd_empty, skip_off, skip_size), B_TRUE); 738 skip_off += skip_size; 739 } 740 741 uint64_t abd_size = abd_get_size(rc->rc_abd); 742 ASSERT3U(abd_size, ==, abd_get_size(rr->rr_col[0].rc_abd)); 743 744 /* 745 * Increase rc_size so the skip ABD is included in subsequent 746 * parity calculations. 747 */ 748 abd_off += rc->rc_size; 749 rc->rc_size = abd_size; 750 } 751 752 IMPLY(abd_offset != 0, abd_off == zio->io_size); 753 ASSERT3U(skip_off, ==, rr->rr_nempty * skip_size); 754 } 755 756 /* 757 * Normal reads. In this common case only the columns containing data 758 * are read in to the zio ABDs. Neither the parity columns or empty skip 759 * sectors are read unless the checksum fails verification. In which case 760 * vdev_raidz_read_all() will call vdev_draid_map_alloc_empty() to expand 761 * the raid map in order to allow reconstruction using the parity data and 762 * skip sectors. 763 */ 764 static void 765 vdev_draid_map_alloc_read(zio_t *zio, uint64_t abd_offset, raidz_row_t *rr) 766 { 767 uint64_t abd_off = abd_offset; 768 769 ASSERT3U(zio->io_type, ==, ZIO_TYPE_READ); 770 771 for (uint64_t c = rr->rr_firstdatacol; c < rr->rr_cols; c++) { 772 raidz_col_t *rc = &rr->rr_col[c]; 773 774 if (rc->rc_size > 0) { 775 rc->rc_abd = abd_get_offset_struct(&rc->rc_abdstruct, 776 zio->io_abd, abd_off, rc->rc_size); 777 abd_off += rc->rc_size; 778 } 779 } 780 781 IMPLY(abd_offset != 0, abd_off == zio->io_size); 782 } 783 784 /* 785 * Converts a normal "read" raidz_row_t to a "scrub" raidz_row_t. The key 786 * difference is that an ABD is allocated to back skip sectors so they may 787 * be read in to memory, verified, and repaired if needed. 788 */ 789 void 790 vdev_draid_map_alloc_empty(zio_t *zio, raidz_row_t *rr) 791 { 792 uint64_t skip_size = 1ULL << zio->io_vd->vdev_top->vdev_ashift; 793 uint64_t parity_size = rr->rr_col[0].rc_size; 794 uint64_t skip_off = 0; 795 796 ASSERT3U(zio->io_type, ==, ZIO_TYPE_READ); 797 ASSERT0P(rr->rr_abd_empty); 798 799 if (rr->rr_nempty > 0) { 800 rr->rr_abd_empty = abd_alloc_linear(rr->rr_nempty * skip_size, 801 B_FALSE); 802 } 803 804 for (uint64_t c = rr->rr_firstdatacol; c < rr->rr_cols; c++) { 805 raidz_col_t *rc = &rr->rr_col[c]; 806 807 if (rc->rc_size == 0) { 808 /* empty data column (small read), add a skip sector */ 809 ASSERT3U(skip_size, ==, parity_size); 810 ASSERT3U(rr->rr_nempty, !=, 0); 811 ASSERT0P(rc->rc_abd); 812 rc->rc_abd = abd_get_offset_size(rr->rr_abd_empty, 813 skip_off, skip_size); 814 skip_off += skip_size; 815 } else if (rc->rc_size == parity_size) { 816 /* this is a "big column", nothing to add */ 817 ASSERT3P(rc->rc_abd, !=, NULL); 818 } else { 819 /* 820 * short data column, add a skip sector and clear 821 * rc_tried to force the entire column to be re-read 822 * thereby including the missing skip sector data 823 * which is needed for reconstruction. 824 */ 825 ASSERT3U(rc->rc_size + skip_size, ==, parity_size); 826 ASSERT3U(rr->rr_nempty, !=, 0); 827 ASSERT3P(rc->rc_abd, !=, NULL); 828 ASSERT(!abd_is_gang(rc->rc_abd)); 829 abd_t *read_abd = rc->rc_abd; 830 rc->rc_abd = abd_alloc_gang(); 831 abd_gang_add(rc->rc_abd, read_abd, B_TRUE); 832 abd_gang_add(rc->rc_abd, abd_get_offset_size( 833 rr->rr_abd_empty, skip_off, skip_size), B_TRUE); 834 skip_off += skip_size; 835 rc->rc_tried = 0; 836 } 837 838 /* 839 * Increase rc_size so the empty ABD is included in subsequent 840 * parity calculations. 841 */ 842 rc->rc_size = parity_size; 843 } 844 845 ASSERT3U(skip_off, ==, rr->rr_nempty * skip_size); 846 } 847 848 /* 849 * Verify that all empty sectors are zero filled before using them to 850 * calculate parity. Otherwise, silent corruption in an empty sector will 851 * result in bad parity being generated. That bad parity will then be 852 * considered authoritative and overwrite the good parity on disk. This 853 * is possible because the checksum is only calculated over the data, 854 * thus it cannot be used to detect damage in empty sectors. 855 */ 856 int 857 vdev_draid_map_verify_empty(zio_t *zio, raidz_row_t *rr) 858 { 859 uint64_t skip_size = 1ULL << zio->io_vd->vdev_top->vdev_ashift; 860 uint64_t parity_size = rr->rr_col[0].rc_size; 861 uint64_t skip_off = parity_size - skip_size; 862 uint64_t empty_off = 0; 863 int ret = 0; 864 865 ASSERT3U(zio->io_type, ==, ZIO_TYPE_READ); 866 ASSERT3P(rr->rr_abd_empty, !=, NULL); 867 ASSERT3U(rr->rr_bigcols, >, 0); 868 869 void *zero_buf = kmem_zalloc(skip_size, KM_SLEEP); 870 871 for (int c = rr->rr_bigcols; c < rr->rr_cols; c++) { 872 raidz_col_t *rc = &rr->rr_col[c]; 873 874 ASSERT3P(rc->rc_abd, !=, NULL); 875 ASSERT3U(rc->rc_size, ==, parity_size); 876 877 if (abd_cmp_buf_off(rc->rc_abd, zero_buf, skip_off, 878 skip_size) != 0) { 879 vdev_raidz_checksum_error(zio, rc, rc->rc_abd); 880 abd_zero_off(rc->rc_abd, skip_off, skip_size); 881 rc->rc_error = SET_ERROR(ECKSUM); 882 ret++; 883 } 884 885 empty_off += skip_size; 886 } 887 888 ASSERT3U(empty_off, ==, abd_get_size(rr->rr_abd_empty)); 889 890 kmem_free(zero_buf, skip_size); 891 892 return (ret); 893 } 894 895 /* 896 * Given a logical address within a dRAID configuration, return the physical 897 * address on the first drive in the group that this address maps to 898 * (at position 'start' in permutation number 'perm'). 899 */ 900 static uint64_t 901 vdev_draid_logical_to_physical(vdev_t *vd, uint64_t logical_offset, 902 uint64_t *perm, uint64_t *start) 903 { 904 vdev_draid_config_t *vdc = vd->vdev_tsd; 905 906 /* b is the dRAID (parent) sector offset. */ 907 uint64_t ashift = vd->vdev_top->vdev_ashift; 908 uint64_t b_offset = logical_offset >> ashift; 909 910 /* 911 * The height of a row in units of the vdev's minimum sector size. 912 * This is the amount of data written to each disk of each group 913 * in a given permutation. 914 */ 915 uint64_t rowheight_sectors = VDEV_DRAID_ROWHEIGHT >> ashift; 916 917 /* 918 * We cycle through a disk permutation every groupsz * ngroups chunk 919 * of address space. Note that ngroups * groupsz must be a multiple 920 * of the number of data drives (ndisks) in order to guarantee 921 * alignment. So, for example, if our row height is 16MB, our group 922 * size is 10, and there are 13 data drives in the draid, then ngroups 923 * will be 13, we will change permutation every 2.08GB and each 924 * disk will have 160MB of data per chunk. 925 */ 926 uint64_t groupwidth = vdc->vdc_groupwidth; 927 uint64_t ngroups = vdc->vdc_ngroups; 928 uint64_t ndisks = vdc->vdc_ndisks; 929 930 /* 931 * groupstart is where the group this IO will land in "starts" in 932 * the permutation array. 933 */ 934 uint64_t group = logical_offset / vdc->vdc_groupsz; 935 uint64_t groupstart = (group * groupwidth) % ndisks; 936 ASSERT3U(groupstart + groupwidth, <=, ndisks + groupstart); 937 *start = groupstart; 938 939 /* b_offset is the sector offset within a group chunk */ 940 b_offset = b_offset % (rowheight_sectors * groupwidth); 941 ASSERT0(b_offset % groupwidth); 942 943 /* 944 * Find the starting byte offset on each child vdev: 945 * - within a permutation there are ngroups groups spread over the 946 * rows, where each row covers a slice portion of the disk 947 * - each permutation has (groupwidth * ngroups) / ndisks rows 948 * - so each permutation covers rows * slice portion of the disk 949 * - so we need to find the row where this IO group target begins 950 */ 951 *perm = group / ngroups; 952 uint64_t row = (*perm * ((groupwidth * ngroups) / ndisks)) + 953 (((group % ngroups) * groupwidth) / ndisks); 954 955 return (((rowheight_sectors * row) + 956 (b_offset / groupwidth)) << ashift); 957 } 958 959 static uint64_t 960 vdev_draid_map_alloc_row(zio_t *zio, raidz_row_t **rrp, uint64_t io_offset, 961 uint64_t abd_offset, uint64_t abd_size) 962 { 963 vdev_t *vd = zio->io_vd; 964 vdev_draid_config_t *vdc = vd->vdev_tsd; 965 uint64_t ashift = vd->vdev_top->vdev_ashift; 966 uint64_t io_size = abd_size; 967 uint64_t io_asize = vdev_draid_psize_to_asize(vd, io_size, 0); 968 uint64_t group = vdev_draid_offset_to_group(vd, io_offset); 969 uint64_t start_offset = vdev_draid_group_to_offset(vd, group + 1); 970 971 /* 972 * Limit the io_size to the space remaining in the group. A second 973 * row in the raidz_map_t is created for the remainder. 974 */ 975 if (io_offset + io_asize > start_offset) { 976 io_size = vdev_draid_asize_to_psize(vd, 977 start_offset - io_offset, 0); 978 } 979 980 /* 981 * At most a block may span the logical end of one group and the start 982 * of the next group. Therefore, at the end of a group the io_size must 983 * span the group width evenly and the remainder must be aligned to the 984 * start of the next group. 985 */ 986 IMPLY(abd_offset == 0 && io_size < zio->io_size, 987 (io_asize >> ashift) % vdc->vdc_groupwidth == 0); 988 IMPLY(abd_offset != 0, 989 vdev_draid_group_to_offset(vd, group) == io_offset); 990 991 /* Lookup starting byte offset on each child vdev */ 992 uint64_t groupstart, perm; 993 uint64_t physical_offset = vdev_draid_logical_to_physical(vd, 994 io_offset, &perm, &groupstart); 995 996 /* 997 * If there is less than groupwidth drives available after the group 998 * start, the group is going to wrap onto the next row. 'wrap' is the 999 * group disk number that starts on the next row. 1000 */ 1001 uint64_t ndisks = vdc->vdc_ndisks; 1002 uint64_t groupwidth = vdc->vdc_groupwidth; 1003 uint64_t wrap = groupwidth; 1004 1005 if (groupstart + groupwidth > ndisks) 1006 wrap = ndisks - groupstart; 1007 1008 /* The io size in units of the vdev's minimum sector size. */ 1009 const uint64_t psize = io_size >> ashift; 1010 1011 /* 1012 * "Quotient": The number of data sectors for this stripe on all but 1013 * the "big column" child vdevs that also contain "remainder" data. 1014 */ 1015 uint64_t q = psize / vdc->vdc_ndata; 1016 1017 /* 1018 * "Remainder": The number of partial stripe data sectors in this I/O. 1019 * This will add a sector to some, but not all, child vdevs. 1020 */ 1021 uint64_t r = psize - q * vdc->vdc_ndata; 1022 1023 /* The number of "big columns" - those which contain remainder data. */ 1024 uint64_t bc = (r == 0 ? 0 : r + vdc->vdc_nparity); 1025 ASSERT3U(bc, <, groupwidth); 1026 1027 /* The total number of data and parity sectors for this I/O. */ 1028 uint64_t tot = psize + (vdc->vdc_nparity * (q + (r == 0 ? 0 : 1))); 1029 1030 ASSERT3U(vdc->vdc_nparity, >, 0); 1031 1032 raidz_row_t *rr = vdev_raidz_row_alloc(groupwidth, zio); 1033 rr->rr_bigcols = bc; 1034 rr->rr_firstdatacol = vdc->vdc_nparity; 1035 #ifdef ZFS_DEBUG 1036 rr->rr_offset = io_offset; 1037 rr->rr_size = io_size; 1038 #endif 1039 *rrp = rr; 1040 1041 uint8_t *base; 1042 uint64_t iter, asize = 0; 1043 vdev_draid_get_perm(vdc, perm, &base, &iter); 1044 for (uint64_t i = 0; i < groupwidth; i++) { 1045 raidz_col_t *rc = &rr->rr_col[i]; 1046 uint64_t c = (groupstart + i) % ndisks; 1047 1048 /* increment the offset if we wrap to the next row */ 1049 if (i == wrap) 1050 physical_offset += VDEV_DRAID_ROWHEIGHT; 1051 1052 rc->rc_devidx = vdev_draid_permute_id(vdc, base, iter, c); 1053 rc->rc_offset = physical_offset; 1054 1055 if (q == 0 && i >= bc) 1056 rc->rc_size = 0; 1057 else if (i < bc) 1058 rc->rc_size = (q + 1) << ashift; 1059 else 1060 rc->rc_size = q << ashift; 1061 1062 asize += rc->rc_size; 1063 } 1064 1065 ASSERT3U(asize, ==, tot << ashift); 1066 rr->rr_nempty = roundup(tot, groupwidth) - tot; 1067 IMPLY(bc > 0, rr->rr_nempty == groupwidth - bc); 1068 1069 /* Allocate buffers for the parity columns */ 1070 for (uint64_t c = 0; c < rr->rr_firstdatacol; c++) { 1071 raidz_col_t *rc = &rr->rr_col[c]; 1072 rc->rc_abd = abd_alloc_linear(rc->rc_size, B_FALSE); 1073 } 1074 1075 /* 1076 * Map buffers for data columns and allocate/map buffers for skip 1077 * sectors. There are three distinct cases for dRAID which are 1078 * required to support sequential rebuild. 1079 */ 1080 if (zio->io_type == ZIO_TYPE_WRITE) { 1081 vdev_draid_map_alloc_write(zio, abd_offset, rr); 1082 } else if ((rr->rr_nempty > 0) && 1083 (zio->io_flags & (ZIO_FLAG_SCRUB | ZIO_FLAG_RESILVER))) { 1084 vdev_draid_map_alloc_scrub(zio, abd_offset, rr); 1085 } else { 1086 ASSERT3U(zio->io_type, ==, ZIO_TYPE_READ); 1087 vdev_draid_map_alloc_read(zio, abd_offset, rr); 1088 } 1089 1090 return (io_size); 1091 } 1092 1093 /* 1094 * Allocate the raidz mapping to be applied to the dRAID I/O. The parity 1095 * calculations for dRAID are identical to raidz however there are a few 1096 * differences in the layout. 1097 * 1098 * - dRAID always allocates a full stripe width. Any extra sectors due 1099 * this padding are zero filled and written to disk. They will be read 1100 * back during a scrub or repair operation since they are included in 1101 * the parity calculation. This property enables sequential resilvering. 1102 * 1103 * - When the block at the logical offset spans redundancy groups then two 1104 * rows are allocated in the raidz_map_t. One row resides at the end of 1105 * the first group and the other at the start of the following group. 1106 */ 1107 static raidz_map_t * 1108 vdev_draid_map_alloc(zio_t *zio) 1109 { 1110 raidz_row_t *rr[2]; 1111 uint64_t abd_offset = 0; 1112 uint64_t abd_size = zio->io_size; 1113 uint64_t io_offset = zio->io_offset; 1114 uint64_t size; 1115 int nrows = 1; 1116 1117 size = vdev_draid_map_alloc_row(zio, &rr[0], io_offset, 1118 abd_offset, abd_size); 1119 if (size < abd_size) { 1120 vdev_t *vd = zio->io_vd; 1121 1122 io_offset += vdev_draid_psize_to_asize(vd, size, 0); 1123 abd_offset += size; 1124 abd_size -= size; 1125 nrows++; 1126 1127 ASSERT3U(io_offset, ==, vdev_draid_group_to_offset( 1128 vd, vdev_draid_offset_to_group(vd, io_offset))); 1129 ASSERT3U(abd_offset, <, zio->io_size); 1130 ASSERT3U(abd_size, !=, 0); 1131 1132 size = vdev_draid_map_alloc_row(zio, &rr[1], 1133 io_offset, abd_offset, abd_size); 1134 VERIFY3U(size, ==, abd_size); 1135 } 1136 1137 raidz_map_t *rm; 1138 rm = kmem_zalloc(offsetof(raidz_map_t, rm_row[nrows]), KM_SLEEP); 1139 rm->rm_ops = vdev_raidz_math_get_ops(); 1140 rm->rm_nrows = nrows; 1141 rm->rm_row[0] = rr[0]; 1142 if (nrows == 2) 1143 rm->rm_row[1] = rr[1]; 1144 return (rm); 1145 } 1146 1147 /* 1148 * Given an offset into a dRAID return the next group width aligned offset 1149 * which can be used to start an allocation. 1150 */ 1151 static uint64_t 1152 vdev_draid_get_astart(vdev_t *vd, const uint64_t start) 1153 { 1154 vdev_draid_config_t *vdc = vd->vdev_tsd; 1155 1156 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 1157 1158 return (roundup(start, vdc->vdc_groupwidth << vd->vdev_ashift)); 1159 } 1160 1161 /* 1162 * Allocatable space for dRAID is (children - nspares) * sizeof(smallest child) 1163 * rounded down to the last full slice. So each child must provide at least 1164 * 1 / (children - nspares) of its asize. 1165 */ 1166 static uint64_t 1167 vdev_draid_min_asize(vdev_t *vd) 1168 { 1169 vdev_draid_config_t *vdc = vd->vdev_tsd; 1170 1171 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 1172 1173 return (VDEV_DRAID_REFLOW_RESERVE + 1174 (vd->vdev_min_asize + vdc->vdc_ndisks - 1) / (vdc->vdc_ndisks)); 1175 } 1176 1177 /* 1178 * When using dRAID the minimum allocation size is determined by the number 1179 * of data disks in the redundancy group. Full stripes are always used. 1180 */ 1181 static uint64_t 1182 vdev_draid_min_alloc(vdev_t *vd) 1183 { 1184 vdev_draid_config_t *vdc = vd->vdev_tsd; 1185 1186 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 1187 1188 return (vdc->vdc_ndata << vd->vdev_ashift); 1189 } 1190 1191 /* 1192 * Returns true if the txg range does not exist on any leaf vdev. 1193 * 1194 * A dRAID spare does not fit into the DTL model. While it has child vdevs 1195 * there is no redundancy among them, and the effective child vdev is 1196 * determined by offset. Essentially we do a vdev_dtl_reassess() on the 1197 * fly by replacing a dRAID spare with the child vdev under the offset. 1198 * Note that it is a recursive process because the child vdev can be 1199 * another dRAID spare and so on. 1200 */ 1201 boolean_t 1202 vdev_draid_missing(vdev_t *vd, uint64_t physical_offset, uint64_t txg, 1203 uint64_t size) 1204 { 1205 if (vd->vdev_ops == &vdev_spare_ops || 1206 vd->vdev_ops == &vdev_replacing_ops) { 1207 /* 1208 * Check all of the readable children, if any child 1209 * contains the txg range the data it is not missing. 1210 */ 1211 for (int c = 0; c < vd->vdev_children; c++) { 1212 vdev_t *cvd = vd->vdev_child[c]; 1213 1214 if (!vdev_readable(cvd)) 1215 continue; 1216 1217 if (!vdev_draid_missing(cvd, physical_offset, 1218 txg, size)) 1219 return (B_FALSE); 1220 } 1221 1222 return (B_TRUE); 1223 } 1224 1225 if (vd->vdev_ops == &vdev_draid_spare_ops) { 1226 /* 1227 * When sequentially resilvering we don't have a proper 1228 * txg range so instead we must presume all txgs are 1229 * missing on this vdev until the resilver completes. 1230 */ 1231 if (vd->vdev_rebuild_txg != 0) 1232 return (B_TRUE); 1233 1234 /* 1235 * DTL_MISSING is set for all prior txgs when a resilver 1236 * is started in spa_vdev_attach(). 1237 */ 1238 if (vdev_dtl_contains(vd, DTL_MISSING, txg, size)) 1239 return (B_TRUE); 1240 1241 /* 1242 * Consult the DTL on the relevant vdev. Either a vdev 1243 * leaf or spare/replace mirror child may be returned so 1244 * we must recursively call vdev_draid_missing_impl(). 1245 */ 1246 vd = vdev_draid_spare_get_child(vd, physical_offset); 1247 if (vd == NULL) 1248 return (B_TRUE); 1249 1250 return (vdev_draid_missing(vd, physical_offset, 1251 txg, size)); 1252 } 1253 1254 return (vdev_dtl_contains(vd, DTL_MISSING, txg, size)); 1255 } 1256 1257 /* 1258 * Returns true if the txg is only partially replicated on the leaf vdevs. 1259 */ 1260 static boolean_t 1261 vdev_draid_partial(vdev_t *vd, uint64_t physical_offset, uint64_t txg, 1262 uint64_t size) 1263 { 1264 if (vd->vdev_ops == &vdev_spare_ops || 1265 vd->vdev_ops == &vdev_replacing_ops) { 1266 /* 1267 * Check all of the readable children, if any child is 1268 * missing the txg range then it is partially replicated. 1269 */ 1270 for (int c = 0; c < vd->vdev_children; c++) { 1271 vdev_t *cvd = vd->vdev_child[c]; 1272 1273 if (!vdev_readable(cvd)) 1274 continue; 1275 1276 if (vdev_draid_partial(cvd, physical_offset, txg, size)) 1277 return (B_TRUE); 1278 } 1279 1280 return (B_FALSE); 1281 } 1282 1283 if (vd->vdev_ops == &vdev_draid_spare_ops) { 1284 /* 1285 * When sequentially resilvering we don't have a proper 1286 * txg range so instead we must presume all txgs are 1287 * missing on this vdev until the resilver completes. 1288 */ 1289 if (vd->vdev_rebuild_txg != 0) 1290 return (B_TRUE); 1291 1292 /* 1293 * DTL_MISSING is set for all prior txgs when a resilver 1294 * is started in spa_vdev_attach(). 1295 */ 1296 if (vdev_dtl_contains(vd, DTL_MISSING, txg, size)) 1297 return (B_TRUE); 1298 1299 /* 1300 * Consult the DTL on the relevant vdev. Either a vdev 1301 * leaf or spare/replace mirror child may be returned so 1302 * we must recursively call vdev_draid_missing_impl(). 1303 */ 1304 vd = vdev_draid_spare_get_child(vd, physical_offset); 1305 if (vd == NULL) 1306 return (B_TRUE); 1307 1308 return (vdev_draid_partial(vd, physical_offset, txg, size)); 1309 } 1310 1311 return (vdev_dtl_contains(vd, DTL_MISSING, txg, size)); 1312 } 1313 1314 /* 1315 * Determine if the vdev is readable at the given offset. 1316 */ 1317 boolean_t 1318 vdev_draid_readable(vdev_t *vd, uint64_t physical_offset) 1319 { 1320 if (vd->vdev_ops == &vdev_draid_spare_ops) { 1321 vd = vdev_draid_spare_get_child(vd, physical_offset); 1322 if (vd == NULL) 1323 return (B_FALSE); 1324 } 1325 1326 if (vd->vdev_ops == &vdev_spare_ops || 1327 vd->vdev_ops == &vdev_replacing_ops) { 1328 1329 for (int c = 0; c < vd->vdev_children; c++) { 1330 vdev_t *cvd = vd->vdev_child[c]; 1331 1332 if (!vdev_readable(cvd)) 1333 continue; 1334 1335 if (vdev_draid_readable(cvd, physical_offset)) 1336 return (B_TRUE); 1337 } 1338 1339 return (B_FALSE); 1340 } 1341 1342 return (vdev_readable(vd)); 1343 } 1344 1345 /* 1346 * Returns the first distributed spare found under the provided vdev tree. 1347 */ 1348 static vdev_t * 1349 vdev_draid_find_spare(vdev_t *vd) 1350 { 1351 if (vd->vdev_ops == &vdev_draid_spare_ops) 1352 return (vd); 1353 1354 for (int c = 0; c < vd->vdev_children; c++) { 1355 vdev_t *svd = vdev_draid_find_spare(vd->vdev_child[c]); 1356 if (svd != NULL) 1357 return (svd); 1358 } 1359 1360 return (NULL); 1361 } 1362 1363 /* 1364 * Returns B_TRUE if the passed in vdev is currently "faulted". 1365 * Faulted, in this context, means that the vdev represents a 1366 * replacing or sparing vdev tree. 1367 */ 1368 static boolean_t 1369 vdev_draid_faulted(vdev_t *vd, uint64_t physical_offset) 1370 { 1371 if (vd->vdev_ops == &vdev_draid_spare_ops) { 1372 vd = vdev_draid_spare_get_child(vd, physical_offset); 1373 if (vd == NULL) 1374 return (B_FALSE); 1375 1376 /* 1377 * After resolving the distributed spare to a leaf vdev 1378 * check the parent to determine if it's "faulted". 1379 */ 1380 vd = vd->vdev_parent; 1381 } 1382 1383 return (vd->vdev_ops == &vdev_replacing_ops || 1384 vd->vdev_ops == &vdev_spare_ops); 1385 } 1386 1387 /* 1388 * Determine if the dRAID block at the logical offset is degraded. 1389 * Used by sequential resilver. 1390 */ 1391 static boolean_t 1392 vdev_draid_group_degraded(vdev_t *vd, uint64_t offset) 1393 { 1394 vdev_draid_config_t *vdc = vd->vdev_tsd; 1395 1396 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 1397 ASSERT3U(vdev_draid_get_astart(vd, offset), ==, offset); 1398 1399 uint64_t groupstart, perm; 1400 uint64_t physical_offset = vdev_draid_logical_to_physical(vd, 1401 offset, &perm, &groupstart); 1402 1403 uint8_t *base; 1404 uint64_t iter; 1405 vdev_draid_get_perm(vdc, perm, &base, &iter); 1406 1407 for (uint64_t i = 0; i < vdc->vdc_groupwidth; i++) { 1408 uint64_t c = (groupstart + i) % vdc->vdc_ndisks; 1409 uint64_t cid = vdev_draid_permute_id(vdc, base, iter, c); 1410 vdev_t *cvd = vd->vdev_child[cid]; 1411 1412 /* Group contains a faulted vdev. */ 1413 if (vdev_draid_faulted(cvd, physical_offset)) 1414 return (B_TRUE); 1415 1416 /* 1417 * Always check groups with active distributed spares 1418 * because any vdev failure in the pool will affect them. 1419 */ 1420 if (vdev_draid_find_spare(cvd) != NULL) 1421 return (B_TRUE); 1422 } 1423 1424 return (B_FALSE); 1425 } 1426 1427 /* 1428 * Determine if the txg is missing. Used by healing resilver. 1429 */ 1430 static boolean_t 1431 vdev_draid_group_missing(vdev_t *vd, uint64_t offset, uint64_t txg, 1432 uint64_t size) 1433 { 1434 vdev_draid_config_t *vdc = vd->vdev_tsd; 1435 1436 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 1437 ASSERT3U(vdev_draid_get_astart(vd, offset), ==, offset); 1438 1439 uint64_t groupstart, perm; 1440 uint64_t physical_offset = vdev_draid_logical_to_physical(vd, 1441 offset, &perm, &groupstart); 1442 1443 uint8_t *base; 1444 uint64_t iter; 1445 vdev_draid_get_perm(vdc, perm, &base, &iter); 1446 1447 for (uint64_t i = 0; i < vdc->vdc_groupwidth; i++) { 1448 uint64_t c = (groupstart + i) % vdc->vdc_ndisks; 1449 uint64_t cid = vdev_draid_permute_id(vdc, base, iter, c); 1450 vdev_t *cvd = vd->vdev_child[cid]; 1451 1452 /* Transaction group is known to be partially replicated. */ 1453 if (vdev_draid_partial(cvd, physical_offset, txg, size)) 1454 return (B_TRUE); 1455 } 1456 1457 return (B_FALSE); 1458 } 1459 1460 /* 1461 * Find the smallest child asize and largest sector size to calculate the 1462 * available capacity. Distributed spares are ignored since their capacity 1463 * is also based of the minimum child size in the top-level dRAID. 1464 */ 1465 static void 1466 vdev_draid_calculate_asize(vdev_t *vd, uint64_t *asizep, uint64_t *max_asizep, 1467 uint64_t *logical_ashiftp, uint64_t *physical_ashiftp) 1468 { 1469 uint64_t logical_ashift = 0, physical_ashift = 0; 1470 uint64_t asize = 0, max_asize = 0; 1471 1472 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 1473 1474 for (int c = 0; c < vd->vdev_children; c++) { 1475 vdev_t *cvd = vd->vdev_child[c]; 1476 1477 if (cvd->vdev_ops == &vdev_draid_spare_ops) 1478 continue; 1479 1480 asize = MIN(asize - 1, cvd->vdev_asize - 1) + 1; 1481 max_asize = MIN(max_asize - 1, cvd->vdev_max_asize - 1) + 1; 1482 logical_ashift = MAX(logical_ashift, cvd->vdev_ashift); 1483 } 1484 for (int c = 0; c < vd->vdev_children; c++) { 1485 vdev_t *cvd = vd->vdev_child[c]; 1486 1487 if (cvd->vdev_ops == &vdev_draid_spare_ops) 1488 continue; 1489 physical_ashift = vdev_best_ashift(logical_ashift, 1490 physical_ashift, cvd->vdev_physical_ashift); 1491 } 1492 1493 *asizep = asize; 1494 *max_asizep = max_asize; 1495 *logical_ashiftp = logical_ashift; 1496 *physical_ashiftp = physical_ashift; 1497 } 1498 1499 /* 1500 * Open spare vdevs. 1501 */ 1502 static boolean_t 1503 vdev_draid_open_spares(vdev_t *vd) 1504 { 1505 return (vd->vdev_ops == &vdev_draid_spare_ops || 1506 vd->vdev_ops == &vdev_replacing_ops || 1507 vd->vdev_ops == &vdev_spare_ops); 1508 } 1509 1510 /* 1511 * Open all children, excluding spares. 1512 */ 1513 static boolean_t 1514 vdev_draid_open_children(vdev_t *vd) 1515 { 1516 return (!vdev_draid_open_spares(vd)); 1517 } 1518 1519 /* 1520 * Open a top-level dRAID vdev. 1521 */ 1522 static int 1523 vdev_draid_open(vdev_t *vd, uint64_t *asize, uint64_t *max_asize, 1524 uint64_t *logical_ashift, uint64_t *physical_ashift) 1525 { 1526 vdev_draid_config_t *vdc = vd->vdev_tsd; 1527 uint64_t nparity = vdc->vdc_nparity; 1528 int open_errors = 0; 1529 1530 if (nparity > VDEV_DRAID_MAXPARITY || 1531 vd->vdev_children < nparity + 1) { 1532 vd->vdev_stat.vs_aux = VDEV_AUX_BAD_LABEL; 1533 return (SET_ERROR(EINVAL)); 1534 } 1535 1536 /* 1537 * First open the normal children then the distributed spares. This 1538 * ordering is important to ensure the distributed spares calculate 1539 * the correct psize in the event that the dRAID vdevs were expanded. 1540 */ 1541 vdev_open_children_subset(vd, vdev_draid_open_children); 1542 vdev_open_children_subset(vd, vdev_draid_open_spares); 1543 1544 /* Verify enough of the children are available to continue. */ 1545 for (int c = 0; c < vd->vdev_children; c++) { 1546 if (vd->vdev_child[c]->vdev_open_error != 0) { 1547 if ((++open_errors) > nparity) { 1548 vd->vdev_stat.vs_aux = VDEV_AUX_NO_REPLICAS; 1549 return (SET_ERROR(ENXIO)); 1550 } 1551 } 1552 } 1553 1554 /* 1555 * Allocatable capacity is the sum of the space on all children less 1556 * the number of distributed spares rounded down to last full row 1557 * and then to the last full group. An additional 32MB of scratch 1558 * space is reserved at the end of each child for use by the dRAID 1559 * expansion feature. 1560 */ 1561 uint64_t child_asize, child_max_asize; 1562 vdev_draid_calculate_asize(vd, &child_asize, &child_max_asize, 1563 logical_ashift, physical_ashift); 1564 1565 /* 1566 * Should be unreachable since the minimum child size is 64MB, but 1567 * we want to make sure an underflow absolutely cannot occur here. 1568 */ 1569 if (child_asize < VDEV_DRAID_REFLOW_RESERVE || 1570 child_max_asize < VDEV_DRAID_REFLOW_RESERVE) { 1571 return (SET_ERROR(ENXIO)); 1572 } 1573 1574 child_asize = ((child_asize - VDEV_DRAID_REFLOW_RESERVE) / 1575 VDEV_DRAID_ROWHEIGHT) * VDEV_DRAID_ROWHEIGHT; 1576 child_max_asize = ((child_max_asize - VDEV_DRAID_REFLOW_RESERVE) / 1577 VDEV_DRAID_ROWHEIGHT) * VDEV_DRAID_ROWHEIGHT; 1578 1579 *asize = (((child_asize * vdc->vdc_ndisks) / vdc->vdc_groupsz) * 1580 vdc->vdc_groupsz); 1581 *max_asize = (((child_max_asize * vdc->vdc_ndisks) / vdc->vdc_groupsz) * 1582 vdc->vdc_groupsz); 1583 1584 return (0); 1585 } 1586 1587 /* 1588 * Close a top-level dRAID vdev. 1589 */ 1590 static void 1591 vdev_draid_close(vdev_t *vd) 1592 { 1593 for (int c = 0; c < vd->vdev_children; c++) { 1594 if (vd->vdev_child[c] != NULL) 1595 vdev_close(vd->vdev_child[c]); 1596 } 1597 } 1598 1599 /* 1600 * Return the maximum asize for a rebuild zio in the provided range 1601 * given the following constraints. A dRAID chunks may not: 1602 * 1603 * - Exceed the maximum allowed block size (SPA_MAXBLOCKSIZE), or 1604 * - Span dRAID redundancy groups. 1605 */ 1606 static uint64_t 1607 vdev_draid_rebuild_asize(vdev_t *vd, uint64_t start, uint64_t asize, 1608 uint64_t max_segment) 1609 { 1610 vdev_draid_config_t *vdc = vd->vdev_tsd; 1611 1612 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 1613 1614 uint64_t ashift = vd->vdev_ashift; 1615 uint64_t ndata = vdc->vdc_ndata; 1616 uint64_t psize = MIN(P2ROUNDUP(max_segment * ndata, 1 << ashift), 1617 SPA_MAXBLOCKSIZE); 1618 1619 ASSERT3U(vdev_draid_get_astart(vd, start), ==, start); 1620 ASSERT0(asize % (vdc->vdc_groupwidth << ashift)); 1621 1622 /* Chunks must evenly span all data columns in the group. */ 1623 psize = (((psize >> ashift) / ndata) * ndata) << ashift; 1624 uint64_t chunk_size = MIN(asize, vdev_psize_to_asize(vd, psize)); 1625 1626 /* Reduce the chunk size to the group space remaining. */ 1627 uint64_t group = vdev_draid_offset_to_group(vd, start); 1628 uint64_t left = vdev_draid_group_to_offset(vd, group + 1) - start; 1629 chunk_size = MIN(chunk_size, left); 1630 1631 ASSERT0(chunk_size % (vdc->vdc_groupwidth << ashift)); 1632 ASSERT3U(vdev_draid_offset_to_group(vd, start), ==, 1633 vdev_draid_offset_to_group(vd, start + chunk_size - 1)); 1634 1635 return (chunk_size); 1636 } 1637 1638 /* 1639 * Align the start of the metaslab to the group width and slightly reduce 1640 * its size to a multiple of the group width. Since full stripe writes are 1641 * required by dRAID this space is unallocable. Furthermore, aligning the 1642 * metaslab start is important for vdev initialize and TRIM which both operate 1643 * on metaslab boundaries which vdev_xlate() expects to be aligned. 1644 */ 1645 static void 1646 vdev_draid_metaslab_init(vdev_t *vd, uint64_t *ms_start, uint64_t *ms_size) 1647 { 1648 vdev_draid_config_t *vdc = vd->vdev_tsd; 1649 1650 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 1651 1652 uint64_t sz = vdc->vdc_groupwidth << vd->vdev_ashift; 1653 uint64_t astart = vdev_draid_get_astart(vd, *ms_start); 1654 uint64_t asize = ((*ms_size - (astart - *ms_start)) / sz) * sz; 1655 1656 *ms_start = astart; 1657 *ms_size = asize; 1658 1659 ASSERT0(*ms_start % sz); 1660 ASSERT0(*ms_size % sz); 1661 } 1662 1663 /* 1664 * Add virtual dRAID spares to the list of valid spares. In order to accomplish 1665 * this the existing array must be freed and reallocated with the additional 1666 * entries. 1667 */ 1668 int 1669 vdev_draid_spare_create(nvlist_t *nvroot, vdev_t *vd, uint64_t *ndraidp, 1670 uint64_t next_vdev_id) 1671 { 1672 uint64_t draid_nspares = 0; 1673 uint64_t ndraid = 0; 1674 int error; 1675 1676 for (uint64_t i = 0; i < vd->vdev_children; i++) { 1677 vdev_t *cvd = vd->vdev_child[i]; 1678 1679 if (cvd->vdev_ops == &vdev_draid_ops) { 1680 vdev_draid_config_t *vdc = cvd->vdev_tsd; 1681 draid_nspares += vdc->vdc_nspares; 1682 ndraid++; 1683 } 1684 } 1685 1686 if (draid_nspares == 0) { 1687 *ndraidp = ndraid; 1688 return (0); 1689 } 1690 1691 nvlist_t **old_spares, **new_spares; 1692 uint_t old_nspares; 1693 error = nvlist_lookup_nvlist_array(nvroot, ZPOOL_CONFIG_SPARES, 1694 &old_spares, &old_nspares); 1695 if (error) 1696 old_nspares = 0; 1697 1698 /* Allocate memory and copy of the existing spares. */ 1699 new_spares = kmem_alloc(sizeof (nvlist_t *) * 1700 (draid_nspares + old_nspares), KM_SLEEP); 1701 for (uint_t i = 0; i < old_nspares; i++) 1702 new_spares[i] = fnvlist_dup(old_spares[i]); 1703 1704 /* Add new distributed spares to ZPOOL_CONFIG_SPARES. */ 1705 uint64_t n = old_nspares; 1706 for (uint64_t vdev_id = 0; vdev_id < vd->vdev_children; vdev_id++) { 1707 vdev_t *cvd = vd->vdev_child[vdev_id]; 1708 char path[64]; 1709 1710 if (cvd->vdev_ops != &vdev_draid_ops) 1711 continue; 1712 1713 vdev_draid_config_t *vdc = cvd->vdev_tsd; 1714 uint64_t nspares = vdc->vdc_nspares; 1715 uint64_t nparity = vdc->vdc_nparity; 1716 1717 for (uint64_t spare_id = 0; spare_id < nspares; spare_id++) { 1718 memset(path, 0, sizeof (path)); 1719 (void) snprintf(path, sizeof (path) - 1, 1720 "%s%llu-%llu-%llu", VDEV_TYPE_DRAID, 1721 (u_longlong_t)nparity, 1722 (u_longlong_t)next_vdev_id + vdev_id, 1723 (u_longlong_t)spare_id); 1724 1725 nvlist_t *spare = fnvlist_alloc(); 1726 fnvlist_add_string(spare, ZPOOL_CONFIG_PATH, path); 1727 fnvlist_add_string(spare, ZPOOL_CONFIG_TYPE, 1728 VDEV_TYPE_DRAID_SPARE); 1729 fnvlist_add_uint64(spare, ZPOOL_CONFIG_TOP_GUID, 1730 cvd->vdev_guid); 1731 fnvlist_add_uint64(spare, ZPOOL_CONFIG_SPARE_ID, 1732 spare_id); 1733 fnvlist_add_uint64(spare, ZPOOL_CONFIG_IS_LOG, 0); 1734 fnvlist_add_uint64(spare, ZPOOL_CONFIG_IS_SPARE, 1); 1735 fnvlist_add_uint64(spare, ZPOOL_CONFIG_WHOLE_DISK, 1); 1736 fnvlist_add_uint64(spare, ZPOOL_CONFIG_ASHIFT, 1737 cvd->vdev_ashift); 1738 1739 new_spares[n] = spare; 1740 n++; 1741 } 1742 } 1743 1744 if (n > 0) { 1745 (void) nvlist_remove_all(nvroot, ZPOOL_CONFIG_SPARES); 1746 fnvlist_add_nvlist_array(nvroot, ZPOOL_CONFIG_SPARES, 1747 (const nvlist_t **)new_spares, n); 1748 } 1749 1750 for (int i = 0; i < n; i++) 1751 nvlist_free(new_spares[i]); 1752 1753 kmem_free(new_spares, sizeof (*new_spares) * n); 1754 *ndraidp = ndraid; 1755 1756 return (0); 1757 } 1758 1759 /* 1760 * Determine if any portion of the provided block resides on a child vdev 1761 * with a dirty DTL and therefore needs to be resilvered. 1762 */ 1763 static boolean_t 1764 vdev_draid_need_resilver(vdev_t *vd, const dva_t *dva, size_t psize, 1765 uint64_t phys_birth) 1766 { 1767 uint64_t offset = DVA_GET_OFFSET(dva); 1768 uint64_t asize = vdev_draid_psize_to_asize(vd, psize, 0); 1769 1770 if (phys_birth == TXG_UNKNOWN) { 1771 /* 1772 * Sequential resilver. There is no meaningful phys_birth 1773 * for this block, we can only determine if block resides 1774 * in a degraded group in which case it must be resilvered. 1775 */ 1776 ASSERT3U(vdev_draid_offset_to_group(vd, offset), ==, 1777 vdev_draid_offset_to_group(vd, offset + asize - 1)); 1778 1779 return (vdev_draid_group_degraded(vd, offset)); 1780 } else { 1781 /* 1782 * Healing resilver. TXGs not in DTL_PARTIAL are intact, 1783 * as are blocks in non-degraded groups. 1784 */ 1785 if (!vdev_dtl_contains(vd, DTL_PARTIAL, phys_birth, 1)) 1786 return (B_FALSE); 1787 1788 if (vdev_draid_group_missing(vd, offset, phys_birth, 1)) 1789 return (B_TRUE); 1790 1791 /* The block may span groups in which case check both. */ 1792 if (vdev_draid_offset_to_group(vd, offset) != 1793 vdev_draid_offset_to_group(vd, offset + asize - 1)) { 1794 if (vdev_draid_group_missing(vd, 1795 offset + asize, phys_birth, 1)) 1796 return (B_TRUE); 1797 } 1798 1799 return (B_FALSE); 1800 } 1801 } 1802 1803 static boolean_t 1804 vdev_draid_rebuilding(vdev_t *vd) 1805 { 1806 if (vd->vdev_ops->vdev_op_leaf && vd->vdev_rebuild_txg) 1807 return (B_TRUE); 1808 1809 for (int i = 0; i < vd->vdev_children; i++) { 1810 if (vdev_draid_rebuilding(vd->vdev_child[i])) { 1811 return (B_TRUE); 1812 } 1813 } 1814 1815 return (B_FALSE); 1816 } 1817 1818 static void 1819 vdev_draid_io_verify(vdev_t *vd, raidz_row_t *rr, int col) 1820 { 1821 #ifdef ZFS_DEBUG 1822 zfs_range_seg64_t logical_rs, physical_rs, remain_rs; 1823 logical_rs.rs_start = rr->rr_offset; 1824 logical_rs.rs_end = logical_rs.rs_start + 1825 vdev_draid_psize_to_asize(vd, rr->rr_size, 0); 1826 1827 raidz_col_t *rc = &rr->rr_col[col]; 1828 vdev_t *cvd = vd->vdev_child[rc->rc_devidx]; 1829 1830 vdev_xlate(cvd, &logical_rs, &physical_rs, &remain_rs); 1831 ASSERT(vdev_xlate_is_empty(&remain_rs)); 1832 ASSERT3U(rc->rc_offset, ==, physical_rs.rs_start); 1833 ASSERT3U(rc->rc_offset, <, physical_rs.rs_end); 1834 ASSERT3U(rc->rc_offset + rc->rc_size, ==, physical_rs.rs_end); 1835 #endif 1836 } 1837 1838 /* 1839 * For write operations: 1840 * 1. Generate the parity data 1841 * 2. Create child zio write operations to each column's vdev, for both 1842 * data and parity. A gang ABD is allocated by vdev_draid_map_alloc() 1843 * if a skip sector needs to be added to a column. 1844 */ 1845 static void 1846 vdev_draid_io_start_write(zio_t *zio, raidz_row_t *rr) 1847 { 1848 vdev_t *vd = zio->io_vd; 1849 raidz_map_t *rm = zio->io_vsd; 1850 1851 vdev_raidz_generate_parity_row(rm, rr); 1852 1853 for (int c = 0; c < rr->rr_cols; c++) { 1854 raidz_col_t *rc = &rr->rr_col[c]; 1855 1856 /* 1857 * Empty columns are zero filled and included in the parity 1858 * calculation and therefore must be written. 1859 */ 1860 ASSERT3U(rc->rc_size, !=, 0); 1861 1862 /* Verify physical to logical translation */ 1863 vdev_draid_io_verify(vd, rr, c); 1864 1865 zio_nowait(zio_vdev_child_io(zio, NULL, 1866 vd->vdev_child[rc->rc_devidx], rc->rc_offset, 1867 rc->rc_abd, rc->rc_size, zio->io_type, zio->io_priority, 1868 0, vdev_raidz_child_done, rc)); 1869 } 1870 } 1871 1872 /* 1873 * For read operations: 1874 * 1. The vdev_draid_map_alloc() function will create a minimal raidz 1875 * mapping for the read based on the zio->io_flags. There are two 1876 * possible mappings either 1) a normal read, or 2) a scrub/resilver. 1877 * 2. Create the zio read operations. This will include all parity 1878 * columns and skip sectors for a scrub/resilver. 1879 */ 1880 static void 1881 vdev_draid_io_start_read(zio_t *zio, raidz_row_t *rr) 1882 { 1883 vdev_t *vd = zio->io_vd; 1884 1885 /* Sequential rebuild must do IO at redundancy group boundary. */ 1886 IMPLY(zio->io_priority == ZIO_PRIORITY_REBUILD, rr->rr_nempty == 0); 1887 1888 /* 1889 * Iterate over the columns in reverse order so that we hit the parity 1890 * last. Any errors along the way will force us to read the parity. 1891 * For scrub/resilver IOs which verify skip sectors, a gang ABD will 1892 * have been allocated to store them and rc->rc_size is increased. 1893 */ 1894 for (int c = rr->rr_cols - 1; c >= 0; c--) { 1895 raidz_col_t *rc = &rr->rr_col[c]; 1896 vdev_t *cvd = vd->vdev_child[rc->rc_devidx]; 1897 1898 if (!vdev_draid_readable(cvd, rc->rc_offset)) { 1899 if (c >= rr->rr_firstdatacol) 1900 rr->rr_missingdata++; 1901 else 1902 rr->rr_missingparity++; 1903 rc->rc_error = SET_ERROR(ENXIO); 1904 rc->rc_tried = 1; 1905 rc->rc_skipped = 1; 1906 continue; 1907 } 1908 1909 if (vdev_draid_missing(cvd, rc->rc_offset, zio->io_txg, 1)) { 1910 if (c >= rr->rr_firstdatacol) 1911 rr->rr_missingdata++; 1912 else 1913 rr->rr_missingparity++; 1914 rc->rc_error = SET_ERROR(ESTALE); 1915 rc->rc_skipped = 1; 1916 continue; 1917 } 1918 1919 /* 1920 * Empty columns may be read during vdev_draid_io_done(). 1921 * Only skip them after the readable and missing checks 1922 * verify they are available. 1923 */ 1924 if (rc->rc_size == 0) { 1925 rc->rc_skipped = 1; 1926 continue; 1927 } 1928 1929 if (zio->io_flags & ZIO_FLAG_RESILVER) { 1930 vdev_t *svd; 1931 1932 /* 1933 * Sequential rebuilds need to always consider the data 1934 * on the child being rebuilt to be stale. This is 1935 * important when all columns are available to aid 1936 * known reconstruction in identifing which columns 1937 * contain incorrect data. 1938 * 1939 * Furthermore, all repairs need to be constrained to 1940 * the devices being rebuilt because without a checksum 1941 * we cannot verify the data is actually correct and 1942 * performing an incorrect repair could result in 1943 * locking in damage and making the data unrecoverable. 1944 */ 1945 if (zio->io_priority == ZIO_PRIORITY_REBUILD) { 1946 if (vdev_draid_rebuilding(cvd)) { 1947 if (c >= rr->rr_firstdatacol) 1948 rr->rr_missingdata++; 1949 else 1950 rr->rr_missingparity++; 1951 rc->rc_error = SET_ERROR(ESTALE); 1952 rc->rc_skipped = 1; 1953 rc->rc_allow_repair = 1; 1954 continue; 1955 } else { 1956 rc->rc_allow_repair = 0; 1957 } 1958 } else { 1959 rc->rc_allow_repair = 1; 1960 } 1961 1962 /* 1963 * If this child is a distributed spare then the 1964 * offset might reside on the vdev being replaced. 1965 * In which case this data must be written to the 1966 * new device. Failure to do so would result in 1967 * checksum errors when the old device is detached 1968 * and the pool is scrubbed. 1969 */ 1970 if ((svd = vdev_draid_find_spare(cvd)) != NULL) { 1971 svd = vdev_draid_spare_get_child(svd, 1972 rc->rc_offset); 1973 if (svd && (svd->vdev_ops == &vdev_spare_ops || 1974 svd->vdev_ops == &vdev_replacing_ops)) { 1975 rc->rc_force_repair = 1; 1976 1977 if (vdev_draid_rebuilding(svd)) 1978 rc->rc_allow_repair = 1; 1979 } 1980 } 1981 1982 /* 1983 * Always issue a repair IO to this child when its 1984 * a spare or replacing vdev with an active rebuild. 1985 */ 1986 if ((cvd->vdev_ops == &vdev_spare_ops || 1987 cvd->vdev_ops == &vdev_replacing_ops) && 1988 vdev_draid_rebuilding(cvd)) { 1989 rc->rc_force_repair = 1; 1990 rc->rc_allow_repair = 1; 1991 } 1992 } 1993 1994 if (vdev_sit_out_reads(cvd, zio->io_flags)) { 1995 rr->rr_outlier_cnt++; 1996 ASSERT0(rc->rc_latency_outlier); 1997 rc->rc_latency_outlier = 1; 1998 } 1999 } 2000 2001 /* 2002 * When the row contains a latency outlier and sufficient parity 2003 * exists to reconstruct the column data, then skip reading the 2004 * known slow child vdev as a performance optimization. 2005 */ 2006 if (rr->rr_outlier_cnt > 0 && 2007 (rr->rr_firstdatacol - rr->rr_missingparity) >= 2008 (rr->rr_missingdata + 1)) { 2009 2010 for (int c = rr->rr_cols - 1; c >= rr->rr_firstdatacol; c--) { 2011 raidz_col_t *rc = &rr->rr_col[c]; 2012 2013 if (rc->rc_error == 0 && rc->rc_latency_outlier) { 2014 rr->rr_missingdata++; 2015 rc->rc_error = SET_ERROR(EAGAIN); 2016 rc->rc_skipped = 1; 2017 break; 2018 } 2019 } 2020 } 2021 2022 /* 2023 * Either a parity or data column is missing this means a repair 2024 * may be attempted by vdev_draid_io_done(). Expand the raid map 2025 * to read in empty columns which are needed along with the parity 2026 * during reconstruction. 2027 */ 2028 if ((rr->rr_missingdata > 0 || rr->rr_missingparity > 0) && 2029 rr->rr_nempty > 0 && rr->rr_abd_empty == NULL) { 2030 vdev_draid_map_alloc_empty(zio, rr); 2031 } 2032 2033 for (int c = rr->rr_cols - 1; c >= 0; c--) { 2034 raidz_col_t *rc = &rr->rr_col[c]; 2035 vdev_t *cvd = vd->vdev_child[rc->rc_devidx]; 2036 2037 if (rc->rc_error || rc->rc_size == 0) 2038 continue; 2039 2040 if (c >= rr->rr_firstdatacol || rr->rr_missingdata > 0 || 2041 (zio->io_flags & (ZIO_FLAG_SCRUB | ZIO_FLAG_RESILVER))) { 2042 zio_nowait(zio_vdev_child_io(zio, NULL, cvd, 2043 rc->rc_offset, rc->rc_abd, rc->rc_size, 2044 zio->io_type, zio->io_priority, 0, 2045 vdev_raidz_child_done, rc)); 2046 } 2047 } 2048 } 2049 2050 /* 2051 * Start an IO operation to a dRAID vdev. 2052 */ 2053 static void 2054 vdev_draid_io_start(zio_t *zio) 2055 { 2056 vdev_t *vd __maybe_unused = zio->io_vd; 2057 2058 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 2059 ASSERT3U(zio->io_offset, ==, vdev_draid_get_astart(vd, zio->io_offset)); 2060 2061 raidz_map_t *rm = vdev_draid_map_alloc(zio); 2062 zio->io_vsd = rm; 2063 zio->io_vsd_ops = &vdev_raidz_vsd_ops; 2064 2065 if (zio->io_type == ZIO_TYPE_WRITE) { 2066 for (int i = 0; i < rm->rm_nrows; i++) { 2067 vdev_draid_io_start_write(zio, rm->rm_row[i]); 2068 } 2069 } else { 2070 ASSERT(zio->io_type == ZIO_TYPE_READ); 2071 2072 for (int i = 0; i < rm->rm_nrows; i++) { 2073 vdev_draid_io_start_read(zio, rm->rm_row[i]); 2074 } 2075 } 2076 2077 zio_execute(zio); 2078 } 2079 2080 /* 2081 * Complete an IO operation on a dRAID vdev. The raidz logic can be applied 2082 * to dRAID since the layout is fully described by the raidz_map_t. 2083 */ 2084 static void 2085 vdev_draid_io_done(zio_t *zio) 2086 { 2087 vdev_raidz_io_done(zio); 2088 } 2089 2090 static void 2091 vdev_draid_state_change(vdev_t *vd, int faulted, int degraded) 2092 { 2093 vdev_draid_config_t *vdc = vd->vdev_tsd; 2094 ASSERT(vd->vdev_ops == &vdev_draid_ops); 2095 2096 if (faulted > vdc->vdc_nparity) 2097 vdev_set_state(vd, B_FALSE, VDEV_STATE_CANT_OPEN, 2098 VDEV_AUX_NO_REPLICAS); 2099 else if (degraded + faulted != 0) 2100 vdev_set_state(vd, B_FALSE, VDEV_STATE_DEGRADED, VDEV_AUX_NONE); 2101 else 2102 vdev_set_state(vd, B_FALSE, VDEV_STATE_HEALTHY, VDEV_AUX_NONE); 2103 } 2104 2105 static void 2106 vdev_draid_xlate(vdev_t *cvd, const zfs_range_seg64_t *logical_rs, 2107 zfs_range_seg64_t *physical_rs, zfs_range_seg64_t *remain_rs) 2108 { 2109 vdev_t *raidvd = cvd->vdev_parent; 2110 ASSERT(raidvd->vdev_ops == &vdev_draid_ops); 2111 2112 vdev_draid_config_t *vdc = raidvd->vdev_tsd; 2113 uint64_t ashift = raidvd->vdev_top->vdev_ashift; 2114 2115 /* Make sure the offsets are block-aligned */ 2116 ASSERT0(logical_rs->rs_start % (1 << ashift)); 2117 ASSERT0(logical_rs->rs_end % (1 << ashift)); 2118 2119 uint64_t logical_start = logical_rs->rs_start; 2120 uint64_t logical_end = logical_rs->rs_end; 2121 2122 /* 2123 * Unaligned ranges must be skipped. All metaslabs are correctly 2124 * aligned so this should not happen, but this case is handled in 2125 * case it's needed by future callers. 2126 */ 2127 uint64_t astart = vdev_draid_get_astart(raidvd, logical_start); 2128 if (astart != logical_start) { 2129 physical_rs->rs_start = logical_start; 2130 physical_rs->rs_end = logical_start; 2131 remain_rs->rs_start = MIN(astart, logical_end); 2132 remain_rs->rs_end = logical_end; 2133 return; 2134 } 2135 2136 /* 2137 * Unlike with mirrors and raidz a dRAID logical range can map 2138 * to multiple non-contiguous physical ranges. This is handled by 2139 * limiting the size of the logical range to a single group and 2140 * setting the remain argument such that it describes the remaining 2141 * unmapped logical range. This is stricter than absolutely 2142 * necessary but helps simplify the logic below. 2143 */ 2144 uint64_t group = vdev_draid_offset_to_group(raidvd, logical_start); 2145 uint64_t nextstart = vdev_draid_group_to_offset(raidvd, group + 1); 2146 if (logical_end > nextstart) 2147 logical_end = nextstart; 2148 2149 /* Find the starting offset for each vdev in the group */ 2150 uint64_t perm, groupstart; 2151 uint64_t start = vdev_draid_logical_to_physical(raidvd, 2152 logical_start, &perm, &groupstart); 2153 uint64_t end = start; 2154 2155 uint8_t *base; 2156 uint64_t iter, id; 2157 vdev_draid_get_perm(vdc, perm, &base, &iter); 2158 2159 /* 2160 * Check if the passed child falls within the group. If it does 2161 * update the start and end to reflect the physical range. 2162 * Otherwise, leave them unmodified which will result in an empty 2163 * (zero-length) physical range being returned. 2164 */ 2165 for (uint64_t i = 0; i < vdc->vdc_groupwidth; i++) { 2166 uint64_t c = (groupstart + i) % vdc->vdc_ndisks; 2167 2168 if (c == 0 && i != 0) { 2169 /* the group wrapped, increment the start */ 2170 start += VDEV_DRAID_ROWHEIGHT; 2171 end = start; 2172 } 2173 2174 id = vdev_draid_permute_id(vdc, base, iter, c); 2175 if (id == cvd->vdev_id) { 2176 uint64_t b_size = (logical_end >> ashift) - 2177 (logical_start >> ashift); 2178 ASSERT3U(b_size, >, 0); 2179 end = start + ((((b_size - 1) / 2180 vdc->vdc_groupwidth) + 1) << ashift); 2181 break; 2182 } 2183 } 2184 physical_rs->rs_start = start; 2185 physical_rs->rs_end = end; 2186 2187 /* 2188 * Only top-level vdevs are allowed to set remain_rs because 2189 * when .vdev_op_xlate() is called for their children the full 2190 * logical range is not provided by vdev_xlate(). 2191 */ 2192 remain_rs->rs_start = logical_end; 2193 remain_rs->rs_end = logical_rs->rs_end; 2194 2195 ASSERT3U(physical_rs->rs_start, <=, logical_start); 2196 ASSERT3U(physical_rs->rs_end - physical_rs->rs_start, <=, 2197 logical_end - logical_start); 2198 } 2199 2200 /* 2201 * Add dRAID specific fields to the config nvlist. 2202 */ 2203 static void 2204 vdev_draid_config_generate(vdev_t *vd, nvlist_t *nv) 2205 { 2206 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_ops); 2207 vdev_draid_config_t *vdc = vd->vdev_tsd; 2208 2209 fnvlist_add_uint64(nv, ZPOOL_CONFIG_NPARITY, vdc->vdc_nparity); 2210 fnvlist_add_uint64(nv, ZPOOL_CONFIG_DRAID_NDATA, vdc->vdc_ndata); 2211 fnvlist_add_uint64(nv, ZPOOL_CONFIG_DRAID_NSPARES, vdc->vdc_nspares); 2212 fnvlist_add_uint64(nv, ZPOOL_CONFIG_DRAID_NGROUPS, vdc->vdc_ngroups); 2213 } 2214 2215 /* 2216 * Initialize private dRAID specific fields from the nvlist. 2217 */ 2218 static int 2219 vdev_draid_init(spa_t *spa, nvlist_t *nv, void **tsd) 2220 { 2221 (void) spa; 2222 uint64_t ndata, nparity, nspares, ngroups; 2223 int error; 2224 2225 if (nvlist_lookup_uint64(nv, ZPOOL_CONFIG_DRAID_NDATA, &ndata)) 2226 return (SET_ERROR(EINVAL)); 2227 2228 if (nvlist_lookup_uint64(nv, ZPOOL_CONFIG_NPARITY, &nparity) || 2229 nparity == 0 || nparity > VDEV_DRAID_MAXPARITY) { 2230 return (SET_ERROR(EINVAL)); 2231 } 2232 2233 uint_t children; 2234 nvlist_t **child; 2235 if (nvlist_lookup_nvlist_array(nv, ZPOOL_CONFIG_CHILDREN, 2236 &child, &children) != 0 || children == 0 || 2237 children > VDEV_DRAID_MAX_CHILDREN) { 2238 return (SET_ERROR(EINVAL)); 2239 } 2240 2241 if (nvlist_lookup_uint64(nv, ZPOOL_CONFIG_DRAID_NSPARES, &nspares) || 2242 nspares > 100 || nspares > (children - (ndata + nparity))) { 2243 return (SET_ERROR(EINVAL)); 2244 } 2245 2246 if (nvlist_lookup_uint64(nv, ZPOOL_CONFIG_DRAID_NGROUPS, &ngroups) || 2247 ngroups == 0 || ngroups > VDEV_DRAID_MAX_CHILDREN) { 2248 return (SET_ERROR(EINVAL)); 2249 } 2250 2251 /* 2252 * Validate the minimum number of children exist per group for the 2253 * specified parity level (draid1 >= 2, draid2 >= 3, draid3 >= 4). 2254 */ 2255 if (children < (ndata + nparity + nspares)) 2256 return (SET_ERROR(EINVAL)); 2257 2258 /* 2259 * Create the dRAID configuration using the pool nvlist configuration 2260 * and the fixed mapping for the correct number of children. 2261 */ 2262 vdev_draid_config_t *vdc; 2263 const draid_map_t *map; 2264 2265 error = vdev_draid_lookup_map(children, &map); 2266 if (error) 2267 return (SET_ERROR(EINVAL)); 2268 2269 vdc = kmem_zalloc(sizeof (*vdc), KM_SLEEP); 2270 vdc->vdc_ndata = ndata; 2271 vdc->vdc_nparity = nparity; 2272 vdc->vdc_nspares = nspares; 2273 vdc->vdc_children = children; 2274 vdc->vdc_ngroups = ngroups; 2275 vdc->vdc_nperms = map->dm_nperms; 2276 2277 error = vdev_draid_generate_perms(map, &vdc->vdc_perms); 2278 if (error) { 2279 kmem_free(vdc, sizeof (*vdc)); 2280 return (SET_ERROR(EINVAL)); 2281 } 2282 2283 /* 2284 * Derived constants. 2285 */ 2286 vdc->vdc_groupwidth = vdc->vdc_ndata + vdc->vdc_nparity; 2287 vdc->vdc_ndisks = vdc->vdc_children - vdc->vdc_nspares; 2288 vdc->vdc_groupsz = vdc->vdc_groupwidth * VDEV_DRAID_ROWHEIGHT; 2289 vdc->vdc_devslicesz = (vdc->vdc_groupsz * vdc->vdc_ngroups) / 2290 vdc->vdc_ndisks; 2291 2292 ASSERT3U(vdc->vdc_groupwidth, >=, 2); 2293 ASSERT3U(vdc->vdc_groupwidth, <=, vdc->vdc_ndisks); 2294 ASSERT3U(vdc->vdc_groupsz, >=, 2 * VDEV_DRAID_ROWHEIGHT); 2295 ASSERT3U(vdc->vdc_devslicesz, >=, VDEV_DRAID_ROWHEIGHT); 2296 ASSERT0(vdc->vdc_devslicesz % VDEV_DRAID_ROWHEIGHT); 2297 ASSERT3U((vdc->vdc_groupwidth * vdc->vdc_ngroups) % 2298 vdc->vdc_ndisks, ==, 0); 2299 2300 *tsd = vdc; 2301 2302 return (0); 2303 } 2304 2305 static void 2306 vdev_draid_fini(vdev_t *vd) 2307 { 2308 vdev_draid_config_t *vdc = vd->vdev_tsd; 2309 2310 vmem_free(vdc->vdc_perms, sizeof (uint8_t) * 2311 vdc->vdc_children * vdc->vdc_nperms); 2312 kmem_free(vdc, sizeof (*vdc)); 2313 } 2314 2315 static uint64_t 2316 vdev_draid_nparity(vdev_t *vd) 2317 { 2318 vdev_draid_config_t *vdc = vd->vdev_tsd; 2319 2320 return (vdc->vdc_nparity); 2321 } 2322 2323 static uint64_t 2324 vdev_draid_ndisks(vdev_t *vd) 2325 { 2326 vdev_draid_config_t *vdc = vd->vdev_tsd; 2327 2328 return (vdc->vdc_ndisks); 2329 } 2330 2331 vdev_ops_t vdev_draid_ops = { 2332 .vdev_op_init = vdev_draid_init, 2333 .vdev_op_fini = vdev_draid_fini, 2334 .vdev_op_open = vdev_draid_open, 2335 .vdev_op_close = vdev_draid_close, 2336 .vdev_op_psize_to_asize = vdev_draid_psize_to_asize, 2337 .vdev_op_asize_to_psize = vdev_draid_asize_to_psize, 2338 .vdev_op_min_asize = vdev_draid_min_asize, 2339 .vdev_op_min_alloc = vdev_draid_min_alloc, 2340 .vdev_op_io_start = vdev_draid_io_start, 2341 .vdev_op_io_done = vdev_draid_io_done, 2342 .vdev_op_state_change = vdev_draid_state_change, 2343 .vdev_op_need_resilver = vdev_draid_need_resilver, 2344 .vdev_op_hold = NULL, 2345 .vdev_op_rele = NULL, 2346 .vdev_op_remap = NULL, 2347 .vdev_op_xlate = vdev_draid_xlate, 2348 .vdev_op_rebuild_asize = vdev_draid_rebuild_asize, 2349 .vdev_op_metaslab_init = vdev_draid_metaslab_init, 2350 .vdev_op_config_generate = vdev_draid_config_generate, 2351 .vdev_op_nparity = vdev_draid_nparity, 2352 .vdev_op_ndisks = vdev_draid_ndisks, 2353 .vdev_op_type = VDEV_TYPE_DRAID, 2354 .vdev_op_leaf = B_FALSE, 2355 }; 2356 2357 2358 /* 2359 * A dRAID distributed spare is a virtual leaf vdev which is included in the 2360 * parent dRAID configuration. The last N columns of the dRAID permutation 2361 * table are used to determine on which dRAID children a specific offset 2362 * should be written. These spare leaf vdevs can only be used to replace 2363 * faulted children in the same dRAID configuration. 2364 */ 2365 2366 /* 2367 * Distributed spare state. All fields are set when the distributed spare is 2368 * first opened and are immutable. 2369 */ 2370 typedef struct { 2371 vdev_t *vds_draid_vdev; /* top-level parent dRAID vdev */ 2372 uint64_t vds_top_guid; /* top-level parent dRAID guid */ 2373 uint64_t vds_spare_id; /* spare id (0 - vdc->vdc_nspares-1) */ 2374 } vdev_draid_spare_t; 2375 2376 /* 2377 * Returns the parent dRAID vdev to which the distributed spare belongs. 2378 * This may be safely called even when the vdev is not open. 2379 */ 2380 vdev_t * 2381 vdev_draid_spare_get_parent(vdev_t *vd) 2382 { 2383 vdev_draid_spare_t *vds = vd->vdev_tsd; 2384 2385 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_spare_ops); 2386 2387 if (vds->vds_draid_vdev != NULL) 2388 return (vds->vds_draid_vdev); 2389 2390 return (vdev_lookup_by_guid(vd->vdev_spa->spa_root_vdev, 2391 vds->vds_top_guid)); 2392 } 2393 2394 /* 2395 * A dRAID space is active when it's the child of a vdev using the 2396 * vdev_spare_ops, vdev_replacing_ops or vdev_draid_ops. 2397 */ 2398 static boolean_t 2399 vdev_draid_spare_is_active(vdev_t *vd) 2400 { 2401 vdev_t *pvd = vd->vdev_parent; 2402 2403 if (pvd != NULL && (pvd->vdev_ops == &vdev_spare_ops || 2404 pvd->vdev_ops == &vdev_replacing_ops || 2405 pvd->vdev_ops == &vdev_draid_ops)) { 2406 return (B_TRUE); 2407 } else { 2408 return (B_FALSE); 2409 } 2410 } 2411 2412 /* 2413 * Given a dRAID distribute spare vdev, returns the physical child vdev 2414 * on which the provided offset resides. This may involve recursing through 2415 * multiple layers of distributed spares. Note that offset is relative to 2416 * this vdev. 2417 */ 2418 vdev_t * 2419 vdev_draid_spare_get_child(vdev_t *vd, uint64_t physical_offset) 2420 { 2421 vdev_draid_spare_t *vds = vd->vdev_tsd; 2422 2423 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_spare_ops); 2424 2425 /* The vdev is closed */ 2426 if (vds->vds_draid_vdev == NULL) 2427 return (NULL); 2428 2429 vdev_t *tvd = vds->vds_draid_vdev; 2430 vdev_draid_config_t *vdc = tvd->vdev_tsd; 2431 2432 ASSERT3P(tvd->vdev_ops, ==, &vdev_draid_ops); 2433 ASSERT3U(vds->vds_spare_id, <, vdc->vdc_nspares); 2434 2435 uint8_t *base; 2436 uint64_t iter; 2437 uint64_t perm = physical_offset / vdc->vdc_devslicesz; 2438 2439 vdev_draid_get_perm(vdc, perm, &base, &iter); 2440 2441 uint64_t cid = vdev_draid_permute_id(vdc, base, iter, 2442 (tvd->vdev_children - 1) - vds->vds_spare_id); 2443 vdev_t *cvd = tvd->vdev_child[cid]; 2444 2445 if (cvd->vdev_ops == &vdev_draid_spare_ops) 2446 return (vdev_draid_spare_get_child(cvd, physical_offset)); 2447 2448 return (cvd); 2449 } 2450 2451 static void 2452 vdev_draid_spare_close(vdev_t *vd) 2453 { 2454 vdev_draid_spare_t *vds = vd->vdev_tsd; 2455 vds->vds_draid_vdev = NULL; 2456 } 2457 2458 /* 2459 * Opening a dRAID spare device is done by looking up the associated dRAID 2460 * top-level vdev guid from the spare configuration. 2461 */ 2462 static int 2463 vdev_draid_spare_open(vdev_t *vd, uint64_t *psize, uint64_t *max_psize, 2464 uint64_t *logical_ashift, uint64_t *physical_ashift) 2465 { 2466 vdev_draid_spare_t *vds = vd->vdev_tsd; 2467 vdev_t *rvd = vd->vdev_spa->spa_root_vdev; 2468 uint64_t asize, max_asize; 2469 2470 vdev_t *tvd = vdev_lookup_by_guid(rvd, vds->vds_top_guid); 2471 if (tvd == NULL) { 2472 /* 2473 * When spa_vdev_add() is labeling new spares the 2474 * associated dRAID is not attached to the root vdev 2475 * nor does this spare have a parent. Simulate a valid 2476 * device in order to allow the label to be initialized 2477 * and the distributed spare added to the configuration. 2478 */ 2479 if (vd->vdev_parent == NULL) { 2480 *psize = *max_psize = SPA_MINDEVSIZE; 2481 *logical_ashift = *physical_ashift = ASHIFT_MIN; 2482 return (0); 2483 } 2484 2485 return (SET_ERROR(EINVAL)); 2486 } 2487 2488 vdev_draid_config_t *vdc = tvd->vdev_tsd; 2489 if (tvd->vdev_ops != &vdev_draid_ops || vdc == NULL) 2490 return (SET_ERROR(EINVAL)); 2491 2492 if (vds->vds_spare_id >= vdc->vdc_nspares) 2493 return (SET_ERROR(EINVAL)); 2494 2495 /* 2496 * Neither tvd->vdev_asize or tvd->vdev_max_asize can be used here 2497 * because the caller may be vdev_draid_open() in which case the 2498 * values are stale as they haven't yet been updated by vdev_open(). 2499 * To avoid this always recalculate the dRAID asize and max_asize. 2500 */ 2501 vdev_draid_calculate_asize(tvd, &asize, &max_asize, 2502 logical_ashift, physical_ashift); 2503 2504 *psize = asize + VDEV_LABEL_START_SIZE + VDEV_LABEL_END_SIZE; 2505 *max_psize = max_asize + VDEV_LABEL_START_SIZE + VDEV_LABEL_END_SIZE; 2506 2507 vds->vds_draid_vdev = tvd; 2508 vd->vdev_nonrot = tvd->vdev_nonrot; 2509 2510 return (0); 2511 } 2512 2513 /* 2514 * Completed distributed spare IO. Store the result in the parent zio 2515 * as if it had performed the operation itself. Only the first error is 2516 * preserved if there are multiple errors. 2517 */ 2518 static void 2519 vdev_draid_spare_child_done(zio_t *zio) 2520 { 2521 zio_t *pio = zio->io_private; 2522 2523 /* 2524 * IOs are issued to non-writable vdevs in order to keep their 2525 * DTLs accurate. However, we don't want to propagate the 2526 * error in to the distributed spare's DTL. When resilvering 2527 * vdev_draid_need_resilver() will consult the relevant DTL 2528 * to determine if the data is missing and must be repaired. 2529 */ 2530 if (!vdev_writeable(zio->io_vd)) 2531 return; 2532 2533 if (pio->io_error == 0) 2534 pio->io_error = zio->io_error; 2535 } 2536 2537 /* 2538 * Returns a valid label nvlist for the distributed spare vdev. This is 2539 * used to bypass the IO pipeline to avoid the complexity of constructing 2540 * a complete label with valid checksum to return when read. 2541 */ 2542 nvlist_t * 2543 vdev_draid_read_config_spare(vdev_t *vd) 2544 { 2545 spa_t *spa = vd->vdev_spa; 2546 spa_aux_vdev_t *sav = &spa->spa_spares; 2547 uint64_t guid = vd->vdev_guid; 2548 2549 nvlist_t *nv = fnvlist_alloc(); 2550 fnvlist_add_uint64(nv, ZPOOL_CONFIG_IS_SPARE, 1); 2551 fnvlist_add_uint64(nv, ZPOOL_CONFIG_CREATE_TXG, vd->vdev_crtxg); 2552 fnvlist_add_uint64(nv, ZPOOL_CONFIG_VERSION, spa_version(spa)); 2553 fnvlist_add_string(nv, ZPOOL_CONFIG_POOL_NAME, spa_name(spa)); 2554 fnvlist_add_uint64(nv, ZPOOL_CONFIG_POOL_GUID, spa_guid(spa)); 2555 fnvlist_add_uint64(nv, ZPOOL_CONFIG_POOL_TXG, spa->spa_config_txg); 2556 fnvlist_add_uint64(nv, ZPOOL_CONFIG_TOP_GUID, vd->vdev_top->vdev_guid); 2557 fnvlist_add_uint64(nv, ZPOOL_CONFIG_POOL_STATE, 2558 vdev_draid_spare_is_active(vd) ? 2559 POOL_STATE_ACTIVE : POOL_STATE_SPARE); 2560 2561 /* Set the vdev guid based on the vdev list in sav_count. */ 2562 for (int i = 0; i < sav->sav_count; i++) { 2563 if (sav->sav_vdevs[i]->vdev_ops == &vdev_draid_spare_ops && 2564 strcmp(sav->sav_vdevs[i]->vdev_path, vd->vdev_path) == 0) { 2565 guid = sav->sav_vdevs[i]->vdev_guid; 2566 break; 2567 } 2568 } 2569 2570 fnvlist_add_uint64(nv, ZPOOL_CONFIG_GUID, guid); 2571 2572 return (nv); 2573 } 2574 2575 /* 2576 * Handle any flush requested of the distributed spare. All children must be 2577 * flushed. 2578 */ 2579 static int 2580 vdev_draid_spare_flush(zio_t *zio) 2581 { 2582 vdev_t *vd = zio->io_vd; 2583 int error = 0; 2584 2585 for (int c = 0; c < vd->vdev_children; c++) { 2586 zio_nowait(zio_vdev_child_io(zio, NULL, 2587 vd->vdev_child[c], zio->io_offset, zio->io_abd, 2588 zio->io_size, zio->io_type, zio->io_priority, 0, 2589 vdev_draid_spare_child_done, zio)); 2590 } 2591 2592 return (error); 2593 } 2594 2595 /* 2596 * Initiate an IO to the distributed spare. For normal IOs this entails using 2597 * the zio->io_offset and permutation table to calculate which child dRAID vdev 2598 * is responsible for the data. Then passing along the zio to that child to 2599 * perform the actual IO. The label ranges are not stored on disk and require 2600 * some special handling which is described below. 2601 */ 2602 static void 2603 vdev_draid_spare_io_start(zio_t *zio) 2604 { 2605 vdev_t *cvd = NULL, *vd = zio->io_vd; 2606 vdev_draid_spare_t *vds = vd->vdev_tsd; 2607 uint64_t offset = zio->io_offset - VDEV_LABEL_START_SIZE; 2608 2609 /* 2610 * If the vdev is closed, it's likely in the REMOVED or FAULTED state. 2611 * Nothing to be done here but return failure. 2612 */ 2613 if (vds == NULL) { 2614 zio->io_error = ENXIO; 2615 zio_interrupt(zio); 2616 return; 2617 } 2618 2619 switch (zio->io_type) { 2620 case ZIO_TYPE_FLUSH: 2621 zio->io_error = vdev_draid_spare_flush(zio); 2622 break; 2623 2624 case ZIO_TYPE_WRITE: 2625 if (VDEV_OFFSET_IS_LABEL(vd, zio->io_offset)) { 2626 /* 2627 * Accept probe IOs and config writers to simulate the 2628 * existence of an on disk label. vdev_label_sync(), 2629 * vdev_uberblock_sync() and vdev_copy_uberblocks() 2630 * skip the distributed spares. This only leaves 2631 * vdev_label_init() which is allowed to succeed to 2632 * avoid adding special cases the function. 2633 */ 2634 if (zio->io_flags & ZIO_FLAG_PROBE || 2635 zio->io_flags & ZIO_FLAG_CONFIG_WRITER) { 2636 zio->io_error = 0; 2637 } else { 2638 zio->io_error = SET_ERROR(EIO); 2639 } 2640 } else { 2641 cvd = vdev_draid_spare_get_child(vd, offset); 2642 2643 if (cvd == NULL) { 2644 zio->io_error = SET_ERROR(ENXIO); 2645 } else { 2646 zio_nowait(zio_vdev_child_io(zio, NULL, cvd, 2647 offset, zio->io_abd, zio->io_size, 2648 zio->io_type, zio->io_priority, 0, 2649 vdev_draid_spare_child_done, zio)); 2650 } 2651 } 2652 break; 2653 2654 case ZIO_TYPE_READ: 2655 if (VDEV_OFFSET_IS_LABEL(vd, zio->io_offset)) { 2656 /* 2657 * Accept probe IOs to simulate the existence of a 2658 * label. vdev_label_read_config() bypasses the 2659 * pipeline to read the label configuration and 2660 * vdev_uberblock_load() skips distributed spares 2661 * when attempting to locate the best uberblock. 2662 */ 2663 if (zio->io_flags & ZIO_FLAG_PROBE) { 2664 zio->io_error = 0; 2665 } else { 2666 zio->io_error = SET_ERROR(EIO); 2667 } 2668 } else { 2669 cvd = vdev_draid_spare_get_child(vd, offset); 2670 2671 if (cvd == NULL || !vdev_readable(cvd)) { 2672 zio->io_error = SET_ERROR(ENXIO); 2673 } else { 2674 zio_nowait(zio_vdev_child_io(zio, NULL, cvd, 2675 offset, zio->io_abd, zio->io_size, 2676 zio->io_type, zio->io_priority, 0, 2677 vdev_draid_spare_child_done, zio)); 2678 } 2679 } 2680 break; 2681 2682 case ZIO_TYPE_TRIM: 2683 /* The vdev label ranges are never trimmed */ 2684 ASSERT0(VDEV_OFFSET_IS_LABEL(vd, zio->io_offset)); 2685 2686 cvd = vdev_draid_spare_get_child(vd, offset); 2687 2688 if (cvd == NULL || !cvd->vdev_has_trim) { 2689 zio->io_error = SET_ERROR(ENXIO); 2690 } else { 2691 zio_nowait(zio_vdev_child_io(zio, NULL, cvd, 2692 offset, zio->io_abd, zio->io_size, 2693 zio->io_type, zio->io_priority, 0, 2694 vdev_draid_spare_child_done, zio)); 2695 } 2696 break; 2697 2698 default: 2699 zio->io_error = SET_ERROR(ENOTSUP); 2700 break; 2701 } 2702 2703 zio_execute(zio); 2704 } 2705 2706 static void 2707 vdev_draid_spare_io_done(zio_t *zio) 2708 { 2709 (void) zio; 2710 } 2711 2712 /* 2713 * Lookup the full spare config in spa->spa_spares.sav_config and 2714 * return the top_guid and spare_id for the named spare. 2715 */ 2716 static int 2717 vdev_draid_spare_lookup(spa_t *spa, nvlist_t *nv, uint64_t *top_guidp, 2718 uint64_t *spare_idp) 2719 { 2720 nvlist_t **spares; 2721 uint_t nspares; 2722 int error; 2723 2724 if ((spa->spa_spares.sav_config == NULL) || 2725 (nvlist_lookup_nvlist_array(spa->spa_spares.sav_config, 2726 ZPOOL_CONFIG_SPARES, &spares, &nspares) != 0)) { 2727 return (SET_ERROR(ENOENT)); 2728 } 2729 2730 const char *spare_name; 2731 error = nvlist_lookup_string(nv, ZPOOL_CONFIG_PATH, &spare_name); 2732 if (error != 0) 2733 return (SET_ERROR(EINVAL)); 2734 2735 for (int i = 0; i < nspares; i++) { 2736 nvlist_t *spare = spares[i]; 2737 uint64_t top_guid, spare_id; 2738 const char *type, *path; 2739 2740 /* Skip non-distributed spares */ 2741 error = nvlist_lookup_string(spare, ZPOOL_CONFIG_TYPE, &type); 2742 if (error != 0 || strcmp(type, VDEV_TYPE_DRAID_SPARE) != 0) 2743 continue; 2744 2745 /* Skip spares with the wrong name */ 2746 error = nvlist_lookup_string(spare, ZPOOL_CONFIG_PATH, &path); 2747 if (error != 0 || strcmp(path, spare_name) != 0) 2748 continue; 2749 2750 /* Found the matching spare */ 2751 error = nvlist_lookup_uint64(spare, 2752 ZPOOL_CONFIG_TOP_GUID, &top_guid); 2753 if (error == 0) { 2754 error = nvlist_lookup_uint64(spare, 2755 ZPOOL_CONFIG_SPARE_ID, &spare_id); 2756 } 2757 2758 if (error != 0) { 2759 return (SET_ERROR(EINVAL)); 2760 } else { 2761 *top_guidp = top_guid; 2762 *spare_idp = spare_id; 2763 return (0); 2764 } 2765 } 2766 2767 return (SET_ERROR(ENOENT)); 2768 } 2769 2770 /* 2771 * Initialize private dRAID spare specific fields from the nvlist. 2772 */ 2773 static int 2774 vdev_draid_spare_init(spa_t *spa, nvlist_t *nv, void **tsd) 2775 { 2776 vdev_draid_spare_t *vds; 2777 uint64_t top_guid = 0; 2778 uint64_t spare_id; 2779 2780 /* 2781 * In the normal case check the list of spares stored in the spa 2782 * to lookup the top_guid and spare_id for provided spare config. 2783 * When creating a new pool or adding vdevs the spare list is not 2784 * yet populated and the values are provided in the passed config. 2785 */ 2786 if (vdev_draid_spare_lookup(spa, nv, &top_guid, &spare_id) != 0) { 2787 if (nvlist_lookup_uint64(nv, ZPOOL_CONFIG_TOP_GUID, 2788 &top_guid) != 0) 2789 return (SET_ERROR(EINVAL)); 2790 2791 if (nvlist_lookup_uint64(nv, ZPOOL_CONFIG_SPARE_ID, 2792 &spare_id) != 0) 2793 return (SET_ERROR(EINVAL)); 2794 } 2795 2796 vds = kmem_alloc(sizeof (vdev_draid_spare_t), KM_SLEEP); 2797 vds->vds_draid_vdev = NULL; 2798 vds->vds_top_guid = top_guid; 2799 vds->vds_spare_id = spare_id; 2800 2801 *tsd = vds; 2802 2803 return (0); 2804 } 2805 2806 static void 2807 vdev_draid_spare_fini(vdev_t *vd) 2808 { 2809 kmem_free(vd->vdev_tsd, sizeof (vdev_draid_spare_t)); 2810 } 2811 2812 static void 2813 vdev_draid_spare_config_generate(vdev_t *vd, nvlist_t *nv) 2814 { 2815 vdev_draid_spare_t *vds = vd->vdev_tsd; 2816 2817 ASSERT3P(vd->vdev_ops, ==, &vdev_draid_spare_ops); 2818 2819 fnvlist_add_uint64(nv, ZPOOL_CONFIG_TOP_GUID, vds->vds_top_guid); 2820 fnvlist_add_uint64(nv, ZPOOL_CONFIG_SPARE_ID, vds->vds_spare_id); 2821 } 2822 2823 vdev_ops_t vdev_draid_spare_ops = { 2824 .vdev_op_init = vdev_draid_spare_init, 2825 .vdev_op_fini = vdev_draid_spare_fini, 2826 .vdev_op_open = vdev_draid_spare_open, 2827 .vdev_op_close = vdev_draid_spare_close, 2828 .vdev_op_psize_to_asize = vdev_default_asize, 2829 .vdev_op_asize_to_psize = vdev_default_psize, 2830 .vdev_op_min_asize = vdev_default_min_asize, 2831 .vdev_op_min_alloc = NULL, 2832 .vdev_op_io_start = vdev_draid_spare_io_start, 2833 .vdev_op_io_done = vdev_draid_spare_io_done, 2834 .vdev_op_state_change = NULL, 2835 .vdev_op_need_resilver = NULL, 2836 .vdev_op_hold = NULL, 2837 .vdev_op_rele = NULL, 2838 .vdev_op_remap = NULL, 2839 .vdev_op_xlate = vdev_default_xlate, 2840 .vdev_op_rebuild_asize = NULL, 2841 .vdev_op_metaslab_init = NULL, 2842 .vdev_op_config_generate = vdev_draid_spare_config_generate, 2843 .vdev_op_nparity = NULL, 2844 .vdev_op_ndisks = NULL, 2845 .vdev_op_type = VDEV_TYPE_DRAID_SPARE, 2846 .vdev_op_leaf = B_TRUE, 2847 }; 2848