1 /* Copyright (c) 2008-2011 Freescale Semiconductor, Inc. 2 * All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright 9 * notice, this list of conditions and the following disclaimer in the 10 * documentation and/or other materials provided with the distribution. 11 * * Neither the name of Freescale Semiconductor nor the 12 * names of its contributors may be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * 16 * ALTERNATIVELY, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") as published by the Free Software 18 * Foundation, either version 2 of that License or (at your option) any 19 * later version. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /****************************************************************************** 34 @File dpaa_ext.h 35 36 @Description DPAA Application Programming Interface. 37 *//***************************************************************************/ 38 #ifndef __DPAA_EXT_H 39 #define __DPAA_EXT_H 40 41 #include "std_ext.h" 42 #include "error_ext.h" 43 44 45 /**************************************************************************//** 46 @Group DPAA_grp Data Path Acceleration Architecture API 47 48 @Description DPAA API functions, definitions and enums. 49 50 @{ 51 *//***************************************************************************/ 52 53 #if defined(__MWERKS__) && !defined(__GNUC__) 54 #pragma pack(push,1) 55 #endif /* defined(__MWERKS__) && ... */ 56 #define MEM_MAP_START 57 58 /**************************************************************************//** 59 @Description Frame descriptor 60 *//***************************************************************************/ 61 typedef _Packed struct t_DpaaFD { 62 volatile uint32_t id; /**< FD id */ 63 volatile uint32_t addrl; /**< Data Address */ 64 volatile uint32_t length; /**< Frame length */ 65 volatile uint32_t status; /**< FD status */ 66 } _PackedType t_DpaaFD; 67 68 /**************************************************************************//** 69 @Description enum for defining frame format 70 *//***************************************************************************/ 71 typedef enum e_DpaaFDFormatType { 72 e_DPAA_FD_FORMAT_TYPE_SHORT_SBSF = 0x0, /**< Simple frame Single buffer; Offset and 73 small length (9b OFFSET, 20b LENGTH) */ 74 e_DPAA_FD_FORMAT_TYPE_LONG_SBSF = 0x2, /**< Simple frame, single buffer; big length 75 (29b LENGTH ,No OFFSET) */ 76 e_DPAA_FD_FORMAT_TYPE_SHORT_MBSF = 0x4, /**< Simple frame, Scatter Gather table; Offset 77 and small length (9b OFFSET, 20b LENGTH) */ 78 e_DPAA_FD_FORMAT_TYPE_LONG_MBSF = 0x6, /**< Simple frame, Scatter Gather table; 79 big length (29b LENGTH ,No OFFSET) */ 80 e_DPAA_FD_FORMAT_TYPE_COMPOUND = 0x1, /**< Compound Frame (29b CONGESTION-WEIGHT 81 No LENGTH or OFFSET) */ 82 e_DPAA_FD_FORMAT_TYPE_DUMMY 83 } e_DpaaFDFormatType; 84 85 /**************************************************************************//** 86 @Collection Frame descriptor macros 87 *//***************************************************************************/ 88 #define DPAA_FD_DD_MASK 0xc0000000 /**< FD DD field mask */ 89 #define DPAA_FD_PID_MASK 0x3f000000 /**< FD PID field mask */ 90 #define DPAA_FD_ELIODN_MASK 0x0000f000 /**< FD ELIODN field mask */ 91 #define DPAA_FD_BPID_MASK 0x00ff0000 /**< FD BPID field mask */ 92 #define DPAA_FD_ADDRH_MASK 0x000000ff /**< FD ADDRH field mask */ 93 #define DPAA_FD_ADDRL_MASK 0xffffffff /**< FD ADDRL field mask */ 94 #define DPAA_FD_FORMAT_MASK 0xe0000000 /**< FD FORMAT field mask */ 95 #define DPAA_FD_OFFSET_MASK 0x1ff00000 /**< FD OFFSET field mask */ 96 #define DPAA_FD_LENGTH_MASK 0x000fffff /**< FD LENGTH field mask */ 97 98 #define DPAA_FD_GET_DD(fd) ((((t_DpaaFD *)fd)->id & DPAA_FD_DD_MASK) >> (31-1)) /**< Macro to get FD DD field */ 99 #define DPAA_FD_GET_PID(fd) (((((t_DpaaFD *)fd)->id & DPAA_FD_PID_MASK) >> (31-7)) | \ 100 ((((t_DpaaFD *)fd)->id & DPAA_FD_ELIODN_MASK) >> (31-19-6))) /**< Macro to get FD PID field */ 101 #define DPAA_FD_GET_BPID(fd) ((((t_DpaaFD *)fd)->id & DPAA_FD_BPID_MASK) >> (31-15)) /**< Macro to get FD BPID field */ 102 #define DPAA_FD_GET_ADDRH(fd) (((t_DpaaFD *)fd)->id & DPAA_FD_ADDRH_MASK) /**< Macro to get FD ADDRH field */ 103 #define DPAA_FD_GET_ADDRL(fd) ((t_DpaaFD *)fd)->addrl /**< Macro to get FD ADDRL field */ 104 #define DPAA_FD_GET_PHYS_ADDR(fd) ((physAddress_t)(((uint64_t)DPAA_FD_GET_ADDRH(fd) << 32) | (uint64_t)DPAA_FD_GET_ADDRL(fd))) /**< Macro to get FD ADDR field */ 105 #define DPAA_FD_GET_FORMAT(fd) ((((t_DpaaFD *)fd)->length & DPAA_FD_FORMAT_MASK) >> (31-2)) /**< Macro to get FD FORMAT field */ 106 #define DPAA_FD_GET_OFFSET(fd) ((((t_DpaaFD *)fd)->length & DPAA_FD_OFFSET_MASK) >> (31-11)) /**< Macro to get FD OFFSET field */ 107 #define DPAA_FD_GET_LENGTH(fd) (((t_DpaaFD *)fd)->length & DPAA_FD_LENGTH_MASK) /**< Macro to get FD LENGTH field */ 108 #define DPAA_FD_GET_STATUS(fd) ((t_DpaaFD *)fd)->status /**< Macro to get FD STATUS field */ 109 #define DPAA_FD_GET_ADDR(fd) XX_PhysToVirt(DPAA_FD_GET_PHYS_ADDR(fd)) 110 111 #define DPAA_FD_SET_DD(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~DPAA_FD_DD_MASK) | (((val) << (31-1)) & DPAA_FD_DD_MASK ))) /**< Macro to set FD DD field */ 112 /**< Macro to set FD PID field or LIODN offset*/ 113 #define DPAA_FD_SET_PID(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~(DPAA_FD_PID_MASK|DPAA_FD_ELIODN_MASK)) | ((((val) << (31-7)) & DPAA_FD_PID_MASK) | ((((val)>>6) << (31-19)) & DPAA_FD_ELIODN_MASK)))) 114 #define DPAA_FD_SET_BPID(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~DPAA_FD_BPID_MASK) | (((val) << (31-15)) & DPAA_FD_BPID_MASK))) /**< Macro to set FD BPID field */ 115 #define DPAA_FD_SET_ADDRH(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~DPAA_FD_ADDRH_MASK) | ((val) & DPAA_FD_ADDRH_MASK))) /**< Macro to set FD ADDRH field */ 116 #define DPAA_FD_SET_ADDRL(fd,val) ((t_DpaaFD *)fd)->addrl = (val) /**< Macro to set FD ADDRL field */ 117 #define DPAA_FD_SET_ADDR(fd,val) \ 118 do { \ 119 uint64_t physAddr = (uint64_t)(XX_VirtToPhys(val)); \ 120 DPAA_FD_SET_ADDRH(fd, ((uint32_t)(physAddr >> 32))); \ 121 DPAA_FD_SET_ADDRL(fd, (uint32_t)physAddr); \ 122 } while (0) /**< Macro to set FD ADDR field */ 123 #define DPAA_FD_SET_FORMAT(fd,val) (((t_DpaaFD *)fd)->length = ((((t_DpaaFD *)fd)->length & ~DPAA_FD_FORMAT_MASK) | (((val) << (31-2))& DPAA_FD_FORMAT_MASK))) /**< Macro to set FD FORMAT field */ 124 #define DPAA_FD_SET_OFFSET(fd,val) (((t_DpaaFD *)fd)->length = ((((t_DpaaFD *)fd)->length & ~DPAA_FD_OFFSET_MASK) | (((val) << (31-11))& DPAA_FD_OFFSET_MASK) )) /**< Macro to set FD OFFSET field */ 125 #define DPAA_FD_SET_LENGTH(fd,val) (((t_DpaaFD *)fd)->length = (((t_DpaaFD *)fd)->length & ~DPAA_FD_LENGTH_MASK) | ((val) & DPAA_FD_LENGTH_MASK)) /**< Macro to set FD LENGTH field */ 126 #define DPAA_FD_SET_STATUS(fd,val) ((t_DpaaFD *)fd)->status = (val) /**< Macro to set FD STATUS field */ 127 /* @} */ 128 129 /**************************************************************************//** 130 @Description Frame Scatter/Gather Table Entry 131 *//***************************************************************************/ 132 typedef _Packed struct t_DpaaSGTE { 133 volatile uint32_t addrh; /**< Buffer Address high */ 134 volatile uint32_t addrl; /**< Buffer Address low */ 135 volatile uint32_t length; /**< Buffer length */ 136 volatile uint32_t offset; /**< SGTE offset */ 137 } _PackedType t_DpaaSGTE; 138 139 #define DPAA_NUM_OF_SG_TABLE_ENTRY 16 140 141 /**************************************************************************//** 142 @Description Frame Scatter/Gather Table 143 *//***************************************************************************/ 144 typedef _Packed struct t_DpaaSGT { 145 t_DpaaSGTE tableEntry[DPAA_NUM_OF_SG_TABLE_ENTRY]; 146 /**< structure that hold the information about 147 a single S/G entry. */ 148 } _PackedType t_DpaaSGT; 149 150 /**************************************************************************//** 151 @Description Compound Frame Table 152 *//***************************************************************************/ 153 typedef _Packed struct t_DpaaCompTbl { 154 t_DpaaSGTE outputBuffInfo; /**< structure that holds the information about 155 the compound-frame output buffer; 156 NOTE: this may point to a S/G table */ 157 t_DpaaSGTE inputBuffInfo; /**< structure that holds the information about 158 the compound-frame input buffer; 159 NOTE: this may point to a S/G table */ 160 } _PackedType t_DpaaCompTbl; 161 162 /**************************************************************************//** 163 @Collection Frame Scatter/Gather Table Entry macros 164 *//***************************************************************************/ 165 #define DPAA_SGTE_ADDRH_MASK 0x000000ff /**< SGTE ADDRH field mask */ 166 #define DPAA_SGTE_ADDRL_MASK 0xffffffff /**< SGTE ADDRL field mask */ 167 #define DPAA_SGTE_E_MASK 0x80000000 /**< SGTE Extension field mask */ 168 #define DPAA_SGTE_F_MASK 0x40000000 /**< SGTE Final field mask */ 169 #define DPAA_SGTE_LENGTH_MASK 0x3fffffff /**< SGTE LENGTH field mask */ 170 #define DPAA_SGTE_BPID_MASK 0x00ff0000 /**< SGTE BPID field mask */ 171 #define DPAA_SGTE_OFFSET_MASK 0x00001fff /**< SGTE OFFSET field mask */ 172 173 #define DPAA_SGTE_GET_ADDRH(sgte) (((t_DpaaSGTE *)sgte)->addrh & DPAA_SGTE_ADDRH_MASK) /**< Macro to get SGTE ADDRH field */ 174 #define DPAA_SGTE_GET_ADDRL(sgte) ((t_DpaaSGTE *)sgte)->addrl /**< Macro to get SGTE ADDRL field */ 175 #define DPAA_SGTE_GET_PHYS_ADDR(sgte) ((physAddress_t)(((uint64_t)DPAA_SGTE_GET_ADDRH(sgte) << 32) | (uint64_t)DPAA_SGTE_GET_ADDRL(sgte))) /**< Macro to get FD ADDR field */ 176 #define DPAA_SGTE_GET_EXTENSION(sgte) ((((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_E_MASK) >> (31-0)) /**< Macro to get SGTE EXTENSION field */ 177 #define DPAA_SGTE_GET_FINAL(sgte) ((((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_F_MASK) >> (31-1)) /**< Macro to get SGTE FINAL field */ 178 #define DPAA_SGTE_GET_LENGTH(sgte) (((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_LENGTH_MASK) /**< Macro to get SGTE LENGTH field */ 179 #define DPAA_SGTE_GET_BPID(sgte) ((((t_DpaaSGTE *)sgte)->offset & DPAA_SGTE_BPID_MASK) >> (31-15)) /**< Macro to get SGTE BPID field */ 180 #define DPAA_SGTE_GET_OFFSET(sgte) (((t_DpaaSGTE *)sgte)->offset & DPAA_SGTE_OFFSET_MASK) /**< Macro to get SGTE OFFSET field */ 181 #define DPAA_SGTE_GET_ADDR(sgte) XX_PhysToVirt(DPAA_SGTE_GET_PHYS_ADDR(sgte)) 182 183 #define DPAA_SGTE_SET_ADDRH(sgte,val) (((t_DpaaSGTE *)sgte)->addrh = ((((t_DpaaSGTE *)sgte)->addrh & ~DPAA_SGTE_ADDRH_MASK) | ((val) & DPAA_SGTE_ADDRH_MASK))) /**< Macro to set SGTE ADDRH field */ 184 #define DPAA_SGTE_SET_ADDRL(sgte,val) ((t_DpaaSGTE *)sgte)->addrl = (val) /**< Macro to set SGTE ADDRL field */ 185 #define DPAA_SGTE_SET_ADDR(sgte,val) \ 186 do { \ 187 uint64_t physAddr = (uint64_t)(XX_VirtToPhys(val)); \ 188 DPAA_SGTE_SET_ADDRH(sgte, ((uint32_t)(physAddr >> 32))); \ 189 DPAA_SGTE_SET_ADDRL(sgte, (uint32_t)physAddr); \ 190 } while (0) /**< Macro to set SGTE ADDR field */ 191 #define DPAA_SGTE_SET_EXTENSION(sgte,val) (((t_DpaaSGTE *)sgte)->length = ((((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_E_MASK) | (((val) << (31-0))& DPAA_SGTE_E_MASK))) /**< Macro to set SGTE EXTENSION field */ 192 #define DPAA_SGTE_SET_FINAL(sgte,val) (((t_DpaaSGTE *)sgte)->length = ((((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_F_MASK) | (((val) << (31-1))& DPAA_SGTE_F_MASK))) /**< Macro to set SGTE FINAL field */ 193 #define DPAA_SGTE_SET_LENGTH(sgte,val) (((t_DpaaSGTE *)sgte)->length = (((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_LENGTH_MASK) | ((val) & DPAA_SGTE_LENGTH_MASK)) /**< Macro to set SGTE LENGTH field */ 194 #define DPAA_SGTE_SET_BPID(sgte,val) (((t_DpaaSGTE *)sgte)->offset = ((((t_DpaaSGTE *)sgte)->offset & ~DPAA_SGTE_BPID_MASK) | (((val) << (31-15))& DPAA_SGTE_BPID_MASK))) /**< Macro to set SGTE BPID field */ 195 #define DPAA_SGTE_SET_OFFSET(sgte,val) (((t_DpaaSGTE *)sgte)->offset = ((((t_DpaaSGTE *)sgte)->offset & ~DPAA_SGTE_OFFSET_MASK) | (((val) << (31-31))& DPAA_SGTE_OFFSET_MASK) )) /**< Macro to set SGTE OFFSET field */ 196 /* @} */ 197 198 #define MEM_MAP_END 199 #if defined(__MWERKS__) && !defined(__GNUC__) 200 #pragma pack(pop) 201 #endif /* defined(__MWERKS__) && ... */ 202 203 /** @} */ /* end of DPAA_grp group */ 204 205 206 #endif /* __DPAA_EXT_H */ 207