1*852ba100SJustin Hibbits /* 2*852ba100SJustin Hibbits * Copyright 2008-2012 Freescale Semiconductor Inc. 30aeed3e9SJustin Hibbits * 40aeed3e9SJustin Hibbits * Redistribution and use in source and binary forms, with or without 50aeed3e9SJustin Hibbits * modification, are permitted provided that the following conditions are met: 60aeed3e9SJustin Hibbits * * Redistributions of source code must retain the above copyright 70aeed3e9SJustin Hibbits * notice, this list of conditions and the following disclaimer. 80aeed3e9SJustin Hibbits * * Redistributions in binary form must reproduce the above copyright 90aeed3e9SJustin Hibbits * notice, this list of conditions and the following disclaimer in the 100aeed3e9SJustin Hibbits * documentation and/or other materials provided with the distribution. 110aeed3e9SJustin Hibbits * * Neither the name of Freescale Semiconductor nor the 120aeed3e9SJustin Hibbits * names of its contributors may be used to endorse or promote products 130aeed3e9SJustin Hibbits * derived from this software without specific prior written permission. 140aeed3e9SJustin Hibbits * 150aeed3e9SJustin Hibbits * 160aeed3e9SJustin Hibbits * ALTERNATIVELY, this software may be distributed under the terms of the 170aeed3e9SJustin Hibbits * GNU General Public License ("GPL") as published by the Free Software 180aeed3e9SJustin Hibbits * Foundation, either version 2 of that License or (at your option) any 190aeed3e9SJustin Hibbits * later version. 200aeed3e9SJustin Hibbits * 210aeed3e9SJustin Hibbits * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 220aeed3e9SJustin Hibbits * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 230aeed3e9SJustin Hibbits * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 240aeed3e9SJustin Hibbits * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 250aeed3e9SJustin Hibbits * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 260aeed3e9SJustin Hibbits * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 270aeed3e9SJustin Hibbits * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 280aeed3e9SJustin Hibbits * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 290aeed3e9SJustin Hibbits * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 300aeed3e9SJustin Hibbits * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 310aeed3e9SJustin Hibbits */ 320aeed3e9SJustin Hibbits 33*852ba100SJustin Hibbits 340aeed3e9SJustin Hibbits /****************************************************************************** 350aeed3e9SJustin Hibbits @File fm.h 360aeed3e9SJustin Hibbits 370aeed3e9SJustin Hibbits @Description FM internal structures and definitions. 380aeed3e9SJustin Hibbits *//***************************************************************************/ 390aeed3e9SJustin Hibbits #ifndef __FM_H 400aeed3e9SJustin Hibbits #define __FM_H 410aeed3e9SJustin Hibbits 420aeed3e9SJustin Hibbits #include "error_ext.h" 430aeed3e9SJustin Hibbits #include "std_ext.h" 440aeed3e9SJustin Hibbits #include "fm_ext.h" 450aeed3e9SJustin Hibbits #include "fm_ipc.h" 460aeed3e9SJustin Hibbits 47*852ba100SJustin Hibbits #include "fsl_fman.h" 480aeed3e9SJustin Hibbits 490aeed3e9SJustin Hibbits #define __ERR_MODULE__ MODULE_FM 500aeed3e9SJustin Hibbits 510aeed3e9SJustin Hibbits #define FM_MAX_NUM_OF_HW_PORT_IDS 64 520aeed3e9SJustin Hibbits #define FM_MAX_NUM_OF_GUESTS 100 530aeed3e9SJustin Hibbits 540aeed3e9SJustin Hibbits /**************************************************************************//** 550aeed3e9SJustin Hibbits @Description Exceptions 560aeed3e9SJustin Hibbits *//***************************************************************************/ 570aeed3e9SJustin Hibbits #define FM_EX_DMA_BUS_ERROR 0x80000000 /**< DMA bus error. */ 580aeed3e9SJustin Hibbits #define FM_EX_DMA_READ_ECC 0x40000000 590aeed3e9SJustin Hibbits #define FM_EX_DMA_SYSTEM_WRITE_ECC 0x20000000 600aeed3e9SJustin Hibbits #define FM_EX_DMA_FM_WRITE_ECC 0x10000000 610aeed3e9SJustin Hibbits #define FM_EX_FPM_STALL_ON_TASKS 0x08000000 /**< Stall of tasks on FPM */ 620aeed3e9SJustin Hibbits #define FM_EX_FPM_SINGLE_ECC 0x04000000 /**< Single ECC on FPM */ 630aeed3e9SJustin Hibbits #define FM_EX_FPM_DOUBLE_ECC 0x02000000 640aeed3e9SJustin Hibbits #define FM_EX_QMI_SINGLE_ECC 0x01000000 /**< Single ECC on FPM */ 650aeed3e9SJustin Hibbits #define FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID 0x00800000 /**< Dequeu from default queue id */ 660aeed3e9SJustin Hibbits #define FM_EX_QMI_DOUBLE_ECC 0x00400000 670aeed3e9SJustin Hibbits #define FM_EX_BMI_LIST_RAM_ECC 0x00200000 68*852ba100SJustin Hibbits #define FM_EX_BMI_STORAGE_PROFILE_ECC 0x00100000 690aeed3e9SJustin Hibbits #define FM_EX_BMI_STATISTICS_RAM_ECC 0x00080000 700aeed3e9SJustin Hibbits #define FM_EX_IRAM_ECC 0x00040000 71*852ba100SJustin Hibbits #define FM_EX_MURAM_ECC 0x00020000 720aeed3e9SJustin Hibbits #define FM_EX_BMI_DISPATCH_RAM_ECC 0x00010000 73*852ba100SJustin Hibbits #define FM_EX_DMA_SINGLE_PORT_ECC 0x00008000 740aeed3e9SJustin Hibbits 75*852ba100SJustin Hibbits #define DMA_EMSR_EMSTR_MASK 0x0000FFFF 76*852ba100SJustin Hibbits 77*852ba100SJustin Hibbits #define DMA_THRESH_COMMQ_MASK 0xFF000000 78*852ba100SJustin Hibbits #define DMA_THRESH_READ_INT_BUF_MASK 0x007F0000 79*852ba100SJustin Hibbits #define DMA_THRESH_WRITE_INT_BUF_MASK 0x0000007F 80*852ba100SJustin Hibbits 81*852ba100SJustin Hibbits #define GET_EXCEPTION_FLAG(bitMask, exception) \ 82*852ba100SJustin Hibbits switch (exception){ \ 830aeed3e9SJustin Hibbits case e_FM_EX_DMA_BUS_ERROR: \ 840aeed3e9SJustin Hibbits bitMask = FM_EX_DMA_BUS_ERROR; break; \ 85*852ba100SJustin Hibbits case e_FM_EX_DMA_SINGLE_PORT_ECC: \ 86*852ba100SJustin Hibbits bitMask = FM_EX_DMA_SINGLE_PORT_ECC; break; \ 870aeed3e9SJustin Hibbits case e_FM_EX_DMA_READ_ECC: \ 880aeed3e9SJustin Hibbits bitMask = FM_EX_DMA_READ_ECC; break; \ 890aeed3e9SJustin Hibbits case e_FM_EX_DMA_SYSTEM_WRITE_ECC: \ 900aeed3e9SJustin Hibbits bitMask = FM_EX_DMA_SYSTEM_WRITE_ECC; break; \ 910aeed3e9SJustin Hibbits case e_FM_EX_DMA_FM_WRITE_ECC: \ 920aeed3e9SJustin Hibbits bitMask = FM_EX_DMA_FM_WRITE_ECC; break; \ 930aeed3e9SJustin Hibbits case e_FM_EX_FPM_STALL_ON_TASKS: \ 940aeed3e9SJustin Hibbits bitMask = FM_EX_FPM_STALL_ON_TASKS; break; \ 950aeed3e9SJustin Hibbits case e_FM_EX_FPM_SINGLE_ECC: \ 960aeed3e9SJustin Hibbits bitMask = FM_EX_FPM_SINGLE_ECC; break; \ 970aeed3e9SJustin Hibbits case e_FM_EX_FPM_DOUBLE_ECC: \ 980aeed3e9SJustin Hibbits bitMask = FM_EX_FPM_DOUBLE_ECC; break; \ 990aeed3e9SJustin Hibbits case e_FM_EX_QMI_SINGLE_ECC: \ 1000aeed3e9SJustin Hibbits bitMask = FM_EX_QMI_SINGLE_ECC; break; \ 1010aeed3e9SJustin Hibbits case e_FM_EX_QMI_DOUBLE_ECC: \ 1020aeed3e9SJustin Hibbits bitMask = FM_EX_QMI_DOUBLE_ECC; break; \ 1030aeed3e9SJustin Hibbits case e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID: \ 1040aeed3e9SJustin Hibbits bitMask = FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID; break; \ 1050aeed3e9SJustin Hibbits case e_FM_EX_BMI_LIST_RAM_ECC: \ 1060aeed3e9SJustin Hibbits bitMask = FM_EX_BMI_LIST_RAM_ECC; break; \ 107*852ba100SJustin Hibbits case e_FM_EX_BMI_STORAGE_PROFILE_ECC: \ 108*852ba100SJustin Hibbits bitMask = FM_EX_BMI_STORAGE_PROFILE_ECC; break; \ 1090aeed3e9SJustin Hibbits case e_FM_EX_BMI_STATISTICS_RAM_ECC: \ 1100aeed3e9SJustin Hibbits bitMask = FM_EX_BMI_STATISTICS_RAM_ECC; break; \ 1110aeed3e9SJustin Hibbits case e_FM_EX_BMI_DISPATCH_RAM_ECC: \ 1120aeed3e9SJustin Hibbits bitMask = FM_EX_BMI_DISPATCH_RAM_ECC; break; \ 1130aeed3e9SJustin Hibbits case e_FM_EX_IRAM_ECC: \ 1140aeed3e9SJustin Hibbits bitMask = FM_EX_IRAM_ECC; break; \ 1150aeed3e9SJustin Hibbits case e_FM_EX_MURAM_ECC: \ 116*852ba100SJustin Hibbits bitMask = FM_EX_MURAM_ECC; break; \ 117*852ba100SJustin Hibbits default: bitMask = 0;break; \ 118*852ba100SJustin Hibbits } 119*852ba100SJustin Hibbits 120*852ba100SJustin Hibbits #define GET_FM_MODULE_EVENT(_mod, _id, _intrType, _event) \ 121*852ba100SJustin Hibbits switch (_mod) { \ 122*852ba100SJustin Hibbits case e_FM_MOD_PRS: \ 123*852ba100SJustin Hibbits if (_id) _event = e_FM_EV_DUMMY_LAST; \ 124*852ba100SJustin Hibbits else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_PRS : e_FM_EV_PRS; \ 125*852ba100SJustin Hibbits break; \ 126*852ba100SJustin Hibbits case e_FM_MOD_KG: \ 127*852ba100SJustin Hibbits if (_id) _event = e_FM_EV_DUMMY_LAST; \ 128*852ba100SJustin Hibbits else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_KG : e_FM_EV_DUMMY_LAST; \ 129*852ba100SJustin Hibbits break; \ 130*852ba100SJustin Hibbits case e_FM_MOD_PLCR: \ 131*852ba100SJustin Hibbits if (_id) _event = e_FM_EV_DUMMY_LAST; \ 132*852ba100SJustin Hibbits else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_PLCR : e_FM_EV_PLCR; \ 133*852ba100SJustin Hibbits break; \ 134*852ba100SJustin Hibbits case e_FM_MOD_TMR: \ 135*852ba100SJustin Hibbits if (_id) _event = e_FM_EV_DUMMY_LAST; \ 136*852ba100SJustin Hibbits else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_DUMMY_LAST : e_FM_EV_TMR; \ 137*852ba100SJustin Hibbits break; \ 138*852ba100SJustin Hibbits case e_FM_MOD_10G_MAC: \ 139*852ba100SJustin Hibbits if (_id >= FM_MAX_NUM_OF_10G_MACS) _event = e_FM_EV_DUMMY_LAST; \ 140*852ba100SJustin Hibbits else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? (e_FM_EV_ERR_10G_MAC0 + _id) : (e_FM_EV_10G_MAC0 + _id); \ 141*852ba100SJustin Hibbits break; \ 142*852ba100SJustin Hibbits case e_FM_MOD_1G_MAC: \ 143*852ba100SJustin Hibbits if (_id >= FM_MAX_NUM_OF_1G_MACS) _event = e_FM_EV_DUMMY_LAST; \ 144*852ba100SJustin Hibbits else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? (e_FM_EV_ERR_1G_MAC0 + _id) : (e_FM_EV_1G_MAC0 + _id); \ 145*852ba100SJustin Hibbits break; \ 146*852ba100SJustin Hibbits case e_FM_MOD_MACSEC: \ 147*852ba100SJustin Hibbits switch (_id){ \ 148*852ba100SJustin Hibbits case (0): _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_MACSEC_MAC0:e_FM_EV_MACSEC_MAC0; \ 149*852ba100SJustin Hibbits break; \ 150*852ba100SJustin Hibbits } \ 151*852ba100SJustin Hibbits break; \ 152*852ba100SJustin Hibbits case e_FM_MOD_FMAN_CTRL: \ 153*852ba100SJustin Hibbits if (_intrType == e_FM_INTR_TYPE_ERR) _event = e_FM_EV_DUMMY_LAST; \ 154*852ba100SJustin Hibbits else _event = (e_FM_EV_FMAN_CTRL_0 + _id); \ 155*852ba100SJustin Hibbits break; \ 156*852ba100SJustin Hibbits default: _event = e_FM_EV_DUMMY_LAST; \ 157*852ba100SJustin Hibbits break; \ 158*852ba100SJustin Hibbits } 159*852ba100SJustin Hibbits 160*852ba100SJustin Hibbits #define FMAN_CACHE_OVERRIDE_TRANS(fsl_cache_override, _cache_override) \ 161*852ba100SJustin Hibbits switch (_cache_override){ \ 162*852ba100SJustin Hibbits case e_FM_DMA_NO_CACHE_OR: \ 163*852ba100SJustin Hibbits fsl_cache_override = E_FMAN_DMA_NO_CACHE_OR; break; \ 164*852ba100SJustin Hibbits case e_FM_DMA_NO_STASH_DATA: \ 165*852ba100SJustin Hibbits fsl_cache_override = E_FMAN_DMA_NO_STASH_DATA; break; \ 166*852ba100SJustin Hibbits case e_FM_DMA_MAY_STASH_DATA: \ 167*852ba100SJustin Hibbits fsl_cache_override = E_FMAN_DMA_MAY_STASH_DATA; break; \ 168*852ba100SJustin Hibbits case e_FM_DMA_STASH_DATA: \ 169*852ba100SJustin Hibbits fsl_cache_override = E_FMAN_DMA_STASH_DATA; break; \ 170*852ba100SJustin Hibbits default: \ 171*852ba100SJustin Hibbits fsl_cache_override = E_FMAN_DMA_NO_CACHE_OR; break; \ 172*852ba100SJustin Hibbits } 173*852ba100SJustin Hibbits 174*852ba100SJustin Hibbits #define FMAN_AID_MODE_TRANS(fsl_aid_mode, _aid_mode) \ 175*852ba100SJustin Hibbits switch (_aid_mode){ \ 176*852ba100SJustin Hibbits case e_FM_DMA_AID_OUT_PORT_ID: \ 177*852ba100SJustin Hibbits fsl_aid_mode = E_FMAN_DMA_AID_OUT_PORT_ID; break; \ 178*852ba100SJustin Hibbits case e_FM_DMA_AID_OUT_TNUM: \ 179*852ba100SJustin Hibbits fsl_aid_mode = E_FMAN_DMA_AID_OUT_TNUM; break; \ 180*852ba100SJustin Hibbits default: \ 181*852ba100SJustin Hibbits fsl_aid_mode = E_FMAN_DMA_AID_OUT_PORT_ID; break; \ 182*852ba100SJustin Hibbits } 183*852ba100SJustin Hibbits 184*852ba100SJustin Hibbits #define FMAN_DMA_DBG_CNT_TRANS(fsl_dma_dbg_cnt, _dma_dbg_cnt) \ 185*852ba100SJustin Hibbits switch (_dma_dbg_cnt){ \ 186*852ba100SJustin Hibbits case e_FM_DMA_DBG_NO_CNT: \ 187*852ba100SJustin Hibbits fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_NO_CNT; break; \ 188*852ba100SJustin Hibbits case e_FM_DMA_DBG_CNT_DONE: \ 189*852ba100SJustin Hibbits fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_DONE; break; \ 190*852ba100SJustin Hibbits case e_FM_DMA_DBG_CNT_COMM_Q_EM: \ 191*852ba100SJustin Hibbits fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_COMM_Q_EM; break; \ 192*852ba100SJustin Hibbits case e_FM_DMA_DBG_CNT_INT_READ_EM: \ 193*852ba100SJustin Hibbits fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_INT_READ_EM; break; \ 194*852ba100SJustin Hibbits case e_FM_DMA_DBG_CNT_INT_WRITE_EM: \ 195*852ba100SJustin Hibbits fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_INT_WRITE_EM ; break; \ 196*852ba100SJustin Hibbits case e_FM_DMA_DBG_CNT_FPM_WAIT: \ 197*852ba100SJustin Hibbits fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_FPM_WAIT ; break; \ 198*852ba100SJustin Hibbits case e_FM_DMA_DBG_CNT_SIGLE_BIT_ECC: \ 199*852ba100SJustin Hibbits fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_SIGLE_BIT_ECC ; break; \ 200*852ba100SJustin Hibbits case e_FM_DMA_DBG_CNT_RAW_WAR_PROT: \ 201*852ba100SJustin Hibbits fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_RAW_WAR_PROT ; break; \ 202*852ba100SJustin Hibbits default: \ 203*852ba100SJustin Hibbits fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_NO_CNT; break; \ 204*852ba100SJustin Hibbits } 205*852ba100SJustin Hibbits 206*852ba100SJustin Hibbits #define FMAN_DMA_EMER_TRANS(fsl_dma_emer, _dma_emer) \ 207*852ba100SJustin Hibbits switch (_dma_emer){ \ 208*852ba100SJustin Hibbits case e_FM_DMA_EM_EBS: \ 209*852ba100SJustin Hibbits fsl_dma_emer = E_FMAN_DMA_EM_EBS; break; \ 210*852ba100SJustin Hibbits case e_FM_DMA_EM_SOS: \ 211*852ba100SJustin Hibbits fsl_dma_emer = E_FMAN_DMA_EM_SOS; break; \ 212*852ba100SJustin Hibbits default: \ 213*852ba100SJustin Hibbits fsl_dma_emer = E_FMAN_DMA_EM_EBS; break; \ 214*852ba100SJustin Hibbits } 215*852ba100SJustin Hibbits 216*852ba100SJustin Hibbits #define FMAN_DMA_ERR_TRANS(fsl_dma_err, _dma_err) \ 217*852ba100SJustin Hibbits switch (_dma_err){ \ 218*852ba100SJustin Hibbits case e_FM_DMA_ERR_CATASTROPHIC: \ 219*852ba100SJustin Hibbits fsl_dma_err = E_FMAN_DMA_ERR_CATASTROPHIC; break; \ 220*852ba100SJustin Hibbits case e_FM_DMA_ERR_REPORT: \ 221*852ba100SJustin Hibbits fsl_dma_err = E_FMAN_DMA_ERR_REPORT; break; \ 222*852ba100SJustin Hibbits default: \ 223*852ba100SJustin Hibbits fsl_dma_err = E_FMAN_DMA_ERR_CATASTROPHIC; break; \ 224*852ba100SJustin Hibbits } 225*852ba100SJustin Hibbits 226*852ba100SJustin Hibbits #define FMAN_CATASTROPHIC_ERR_TRANS(fsl_catastrophic_err, _catastrophic_err) \ 227*852ba100SJustin Hibbits switch (_catastrophic_err){ \ 228*852ba100SJustin Hibbits case e_FM_CATASTROPHIC_ERR_STALL_PORT: \ 229*852ba100SJustin Hibbits fsl_catastrophic_err = E_FMAN_CATAST_ERR_STALL_PORT; break; \ 230*852ba100SJustin Hibbits case e_FM_CATASTROPHIC_ERR_STALL_TASK: \ 231*852ba100SJustin Hibbits fsl_catastrophic_err = E_FMAN_CATAST_ERR_STALL_TASK; break; \ 232*852ba100SJustin Hibbits default: \ 233*852ba100SJustin Hibbits fsl_catastrophic_err = E_FMAN_CATAST_ERR_STALL_PORT; break; \ 234*852ba100SJustin Hibbits } 235*852ba100SJustin Hibbits 236*852ba100SJustin Hibbits #define FMAN_COUNTERS_TRANS(fsl_counters, _counters) \ 237*852ba100SJustin Hibbits switch (_counters){ \ 238*852ba100SJustin Hibbits case e_FM_COUNTERS_ENQ_TOTAL_FRAME: \ 239*852ba100SJustin Hibbits fsl_counters = E_FMAN_COUNTERS_ENQ_TOTAL_FRAME; break; \ 240*852ba100SJustin Hibbits case e_FM_COUNTERS_DEQ_TOTAL_FRAME: \ 241*852ba100SJustin Hibbits fsl_counters = E_FMAN_COUNTERS_DEQ_TOTAL_FRAME; break; \ 242*852ba100SJustin Hibbits case e_FM_COUNTERS_DEQ_0: \ 243*852ba100SJustin Hibbits fsl_counters = E_FMAN_COUNTERS_DEQ_0; break; \ 244*852ba100SJustin Hibbits case e_FM_COUNTERS_DEQ_1: \ 245*852ba100SJustin Hibbits fsl_counters = E_FMAN_COUNTERS_DEQ_1; break; \ 246*852ba100SJustin Hibbits case e_FM_COUNTERS_DEQ_2: \ 247*852ba100SJustin Hibbits fsl_counters = E_FMAN_COUNTERS_DEQ_2; break; \ 248*852ba100SJustin Hibbits case e_FM_COUNTERS_DEQ_3: \ 249*852ba100SJustin Hibbits fsl_counters = E_FMAN_COUNTERS_DEQ_3; break; \ 250*852ba100SJustin Hibbits case e_FM_COUNTERS_DEQ_FROM_DEFAULT: \ 251*852ba100SJustin Hibbits fsl_counters = E_FMAN_COUNTERS_DEQ_FROM_DEFAULT; break; \ 252*852ba100SJustin Hibbits case e_FM_COUNTERS_DEQ_FROM_CONTEXT: \ 253*852ba100SJustin Hibbits fsl_counters = E_FMAN_COUNTERS_DEQ_FROM_CONTEXT; break; \ 254*852ba100SJustin Hibbits case e_FM_COUNTERS_DEQ_FROM_FD: \ 255*852ba100SJustin Hibbits fsl_counters = E_FMAN_COUNTERS_DEQ_FROM_FD; break; \ 256*852ba100SJustin Hibbits case e_FM_COUNTERS_DEQ_CONFIRM: \ 257*852ba100SJustin Hibbits fsl_counters = E_FMAN_COUNTERS_DEQ_CONFIRM; break; \ 258*852ba100SJustin Hibbits default: \ 259*852ba100SJustin Hibbits fsl_counters = E_FMAN_COUNTERS_ENQ_TOTAL_FRAME; break; \ 260*852ba100SJustin Hibbits } 2610aeed3e9SJustin Hibbits 2620aeed3e9SJustin Hibbits /**************************************************************************//** 2630aeed3e9SJustin Hibbits @Description defaults 2640aeed3e9SJustin Hibbits *//***************************************************************************/ 2650aeed3e9SJustin Hibbits #define DEFAULT_exceptions (FM_EX_DMA_BUS_ERROR |\ 2660aeed3e9SJustin Hibbits FM_EX_DMA_READ_ECC |\ 2670aeed3e9SJustin Hibbits FM_EX_DMA_SYSTEM_WRITE_ECC |\ 2680aeed3e9SJustin Hibbits FM_EX_DMA_FM_WRITE_ECC |\ 2690aeed3e9SJustin Hibbits FM_EX_FPM_STALL_ON_TASKS |\ 2700aeed3e9SJustin Hibbits FM_EX_FPM_SINGLE_ECC |\ 2710aeed3e9SJustin Hibbits FM_EX_FPM_DOUBLE_ECC |\ 2720aeed3e9SJustin Hibbits FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID|\ 2730aeed3e9SJustin Hibbits FM_EX_BMI_LIST_RAM_ECC |\ 274*852ba100SJustin Hibbits FM_EX_BMI_STORAGE_PROFILE_ECC |\ 2750aeed3e9SJustin Hibbits FM_EX_BMI_STATISTICS_RAM_ECC |\ 2760aeed3e9SJustin Hibbits FM_EX_IRAM_ECC |\ 277*852ba100SJustin Hibbits FM_EX_MURAM_ECC |\ 278*852ba100SJustin Hibbits FM_EX_BMI_DISPATCH_RAM_ECC |\ 279*852ba100SJustin Hibbits FM_EX_QMI_DOUBLE_ECC |\ 280*852ba100SJustin Hibbits FM_EX_QMI_SINGLE_ECC) 281*852ba100SJustin Hibbits 2820aeed3e9SJustin Hibbits #define DEFAULT_eccEnable FALSE 2830aeed3e9SJustin Hibbits #ifdef FM_PEDANTIC_DMA 2840aeed3e9SJustin Hibbits #define DEFAULT_aidOverride TRUE 2850aeed3e9SJustin Hibbits #else 2860aeed3e9SJustin Hibbits #define DEFAULT_aidOverride FALSE 2870aeed3e9SJustin Hibbits #endif /* FM_PEDANTIC_DMA */ 2880aeed3e9SJustin Hibbits #define DEFAULT_aidMode e_FM_DMA_AID_OUT_TNUM 2890aeed3e9SJustin Hibbits #define DEFAULT_dmaStopOnBusError FALSE 2900aeed3e9SJustin Hibbits #define DEFAULT_stopAtBusError FALSE 2910aeed3e9SJustin Hibbits #define DEFAULT_axiDbgNumOfBeats 1 2920aeed3e9SJustin Hibbits #define DEFAULT_dmaReadIntBufLow ((DMA_THRESH_MAX_BUF+1)/2) 2930aeed3e9SJustin Hibbits #define DEFAULT_dmaReadIntBufHigh ((DMA_THRESH_MAX_BUF+1)*3/4) 2940aeed3e9SJustin Hibbits #define DEFAULT_dmaWriteIntBufLow ((DMA_THRESH_MAX_BUF+1)/2) 2950aeed3e9SJustin Hibbits #define DEFAULT_dmaWriteIntBufHigh ((DMA_THRESH_MAX_BUF+1)*3/4) 2960aeed3e9SJustin Hibbits #define DEFAULT_catastrophicErr e_FM_CATASTROPHIC_ERR_STALL_PORT 2970aeed3e9SJustin Hibbits #define DEFAULT_dmaErr e_FM_DMA_ERR_CATASTROPHIC 2980aeed3e9SJustin Hibbits #define DEFAULT_resetOnInit FALSE 299*852ba100SJustin Hibbits #define DEFAULT_resetOnInitOverrideCallback NULL 3000aeed3e9SJustin Hibbits #define DEFAULT_haltOnExternalActivation FALSE /* do not change! if changed, must be disabled for rev1 ! */ 3010aeed3e9SJustin Hibbits #define DEFAULT_haltOnUnrecoverableEccError FALSE /* do not change! if changed, must be disabled for rev1 ! */ 3020aeed3e9SJustin Hibbits #define DEFAULT_externalEccRamsEnable FALSE 3030aeed3e9SJustin Hibbits #define DEFAULT_VerifyUcode FALSE 304*852ba100SJustin Hibbits 305*852ba100SJustin Hibbits #if (DPAA_VERSION < 11) 306*852ba100SJustin Hibbits #define DEFAULT_totalFifoSize(major, minor) \ 307*852ba100SJustin Hibbits (((major == 2) || (major == 5)) ? \ 308*852ba100SJustin Hibbits (100*KILOBYTE) : ((major == 4) ? \ 309*852ba100SJustin Hibbits (49*KILOBYTE) : (122*KILOBYTE))) 310*852ba100SJustin Hibbits #define DEFAULT_totalNumOfTasks(major, minor) \ 311*852ba100SJustin Hibbits BMI_MAX_NUM_OF_TASKS 312*852ba100SJustin Hibbits 313*852ba100SJustin Hibbits #define DEFAULT_dmaCommQLow ((DMA_THRESH_MAX_COMMQ+1)/2) 314*852ba100SJustin Hibbits #define DEFAULT_dmaCommQHigh ((DMA_THRESH_MAX_COMMQ+1)*3/4) 315*852ba100SJustin Hibbits #define DEFAULT_cacheOverride e_FM_DMA_NO_CACHE_OR 316*852ba100SJustin Hibbits #define DEFAULT_dmaCamNumOfEntries 32 317*852ba100SJustin Hibbits #define DEFAULT_dmaDbgCntMode e_FM_DMA_DBG_NO_CNT 318*852ba100SJustin Hibbits #define DEFAULT_dmaEnEmergency FALSE 319*852ba100SJustin Hibbits #define DEFAULT_dmaSosEmergency 0 3200aeed3e9SJustin Hibbits #define DEFAULT_dmaWatchdog 0 /* disabled */ 321*852ba100SJustin Hibbits #define DEFAULT_dmaEnEmergencySmoother FALSE 322*852ba100SJustin Hibbits #define DEFAULT_dmaEmergencySwitchCounter 0 323*852ba100SJustin Hibbits 324*852ba100SJustin Hibbits #define DEFAULT_dispLimit 0 325*852ba100SJustin Hibbits #define DEFAULT_prsDispTh 16 326*852ba100SJustin Hibbits #define DEFAULT_plcrDispTh 16 327*852ba100SJustin Hibbits #define DEFAULT_kgDispTh 16 328*852ba100SJustin Hibbits #define DEFAULT_bmiDispTh 16 329*852ba100SJustin Hibbits #define DEFAULT_qmiEnqDispTh 16 330*852ba100SJustin Hibbits #define DEFAULT_qmiDeqDispTh 16 331*852ba100SJustin Hibbits #define DEFAULT_fmCtl1DispTh 16 332*852ba100SJustin Hibbits #define DEFAULT_fmCtl2DispTh 16 333*852ba100SJustin Hibbits 334*852ba100SJustin Hibbits #else /* (DPAA_VERSION < 11) */ 335*852ba100SJustin Hibbits /* Defaults are registers' reset values */ 336*852ba100SJustin Hibbits #define DEFAULT_totalFifoSize(major, minor) \ 337*852ba100SJustin Hibbits (((major == 6) && ((minor == 1) || (minor == 4))) ? \ 338*852ba100SJustin Hibbits (156*KILOBYTE) : (295*KILOBYTE)) 339*852ba100SJustin Hibbits 340*852ba100SJustin Hibbits /* According to the default value of FMBM_CFG2[TNTSKS] */ 341*852ba100SJustin Hibbits #define DEFAULT_totalNumOfTasks(major, minor) \ 342*852ba100SJustin Hibbits (((major == 6) && ((minor == 1) || (minor == 4))) ? 59 : 124) 343*852ba100SJustin Hibbits 344*852ba100SJustin Hibbits #define DEFAULT_dmaCommQLow 0x2A 345*852ba100SJustin Hibbits #define DEFAULT_dmaCommQHigh 0x3F 346*852ba100SJustin Hibbits #define DEFAULT_cacheOverride e_FM_DMA_NO_CACHE_OR 347*852ba100SJustin Hibbits #define DEFAULT_dmaCamNumOfEntries 64 348*852ba100SJustin Hibbits #define DEFAULT_dmaDbgCntMode e_FM_DMA_DBG_NO_CNT 349*852ba100SJustin Hibbits #define DEFAULT_dmaEnEmergency FALSE 350*852ba100SJustin Hibbits #define DEFAULT_dmaSosEmergency 0 351*852ba100SJustin Hibbits #define DEFAULT_dmaWatchdog 0 /* disabled */ 352*852ba100SJustin Hibbits #define DEFAULT_dmaEnEmergencySmoother FALSE 353*852ba100SJustin Hibbits #define DEFAULT_dmaEmergencySwitchCounter 0 354*852ba100SJustin Hibbits 355*852ba100SJustin Hibbits #define DEFAULT_dispLimit 0 356*852ba100SJustin Hibbits #define DEFAULT_prsDispTh 16 357*852ba100SJustin Hibbits #define DEFAULT_plcrDispTh 16 358*852ba100SJustin Hibbits #define DEFAULT_kgDispTh 16 359*852ba100SJustin Hibbits #define DEFAULT_bmiDispTh 16 360*852ba100SJustin Hibbits #define DEFAULT_qmiEnqDispTh 16 361*852ba100SJustin Hibbits #define DEFAULT_qmiDeqDispTh 16 362*852ba100SJustin Hibbits #define DEFAULT_fmCtl1DispTh 16 363*852ba100SJustin Hibbits #define DEFAULT_fmCtl2DispTh 16 364*852ba100SJustin Hibbits #endif /* (DPAA_VERSION < 11) */ 365*852ba100SJustin Hibbits 366*852ba100SJustin Hibbits #define FM_TIMESTAMP_1_USEC_BIT 8 3670aeed3e9SJustin Hibbits 3680aeed3e9SJustin Hibbits /**************************************************************************//** 369*852ba100SJustin Hibbits @Collection Defines used for enabling/disabling FM interrupts 370*852ba100SJustin Hibbits @{ 3710aeed3e9SJustin Hibbits *//***************************************************************************/ 372*852ba100SJustin Hibbits #define ERR_INTR_EN_DMA 0x00010000 373*852ba100SJustin Hibbits #define ERR_INTR_EN_FPM 0x80000000 374*852ba100SJustin Hibbits #define ERR_INTR_EN_BMI 0x00800000 375*852ba100SJustin Hibbits #define ERR_INTR_EN_QMI 0x00400000 376*852ba100SJustin Hibbits #define ERR_INTR_EN_PRS 0x00200000 377*852ba100SJustin Hibbits #define ERR_INTR_EN_KG 0x00100000 378*852ba100SJustin Hibbits #define ERR_INTR_EN_PLCR 0x00080000 379*852ba100SJustin Hibbits #define ERR_INTR_EN_MURAM 0x00040000 380*852ba100SJustin Hibbits #define ERR_INTR_EN_IRAM 0x00020000 381*852ba100SJustin Hibbits #define ERR_INTR_EN_10G_MAC0 0x00008000 382*852ba100SJustin Hibbits #define ERR_INTR_EN_10G_MAC1 0x00000040 383*852ba100SJustin Hibbits #define ERR_INTR_EN_1G_MAC0 0x00004000 384*852ba100SJustin Hibbits #define ERR_INTR_EN_1G_MAC1 0x00002000 385*852ba100SJustin Hibbits #define ERR_INTR_EN_1G_MAC2 0x00001000 386*852ba100SJustin Hibbits #define ERR_INTR_EN_1G_MAC3 0x00000800 387*852ba100SJustin Hibbits #define ERR_INTR_EN_1G_MAC4 0x00000400 388*852ba100SJustin Hibbits #define ERR_INTR_EN_1G_MAC5 0x00000200 389*852ba100SJustin Hibbits #define ERR_INTR_EN_1G_MAC6 0x00000100 390*852ba100SJustin Hibbits #define ERR_INTR_EN_1G_MAC7 0x00000080 391*852ba100SJustin Hibbits #define ERR_INTR_EN_MACSEC_MAC0 0x00000001 3920aeed3e9SJustin Hibbits 393*852ba100SJustin Hibbits #define INTR_EN_QMI 0x40000000 394*852ba100SJustin Hibbits #define INTR_EN_PRS 0x20000000 395*852ba100SJustin Hibbits #define INTR_EN_WAKEUP 0x10000000 396*852ba100SJustin Hibbits #define INTR_EN_PLCR 0x08000000 397*852ba100SJustin Hibbits #define INTR_EN_1G_MAC0 0x00080000 398*852ba100SJustin Hibbits #define INTR_EN_1G_MAC1 0x00040000 399*852ba100SJustin Hibbits #define INTR_EN_1G_MAC2 0x00020000 400*852ba100SJustin Hibbits #define INTR_EN_1G_MAC3 0x00010000 401*852ba100SJustin Hibbits #define INTR_EN_1G_MAC4 0x00000040 402*852ba100SJustin Hibbits #define INTR_EN_1G_MAC5 0x00000020 403*852ba100SJustin Hibbits #define INTR_EN_1G_MAC6 0x00000008 404*852ba100SJustin Hibbits #define INTR_EN_1G_MAC7 0x00000002 405*852ba100SJustin Hibbits #define INTR_EN_10G_MAC0 0x00200000 406*852ba100SJustin Hibbits #define INTR_EN_10G_MAC1 0x00100000 407*852ba100SJustin Hibbits #define INTR_EN_REV0 0x00008000 408*852ba100SJustin Hibbits #define INTR_EN_REV1 0x00004000 409*852ba100SJustin Hibbits #define INTR_EN_REV2 0x00002000 410*852ba100SJustin Hibbits #define INTR_EN_REV3 0x00001000 411*852ba100SJustin Hibbits #define INTR_EN_BRK 0x00000080 412*852ba100SJustin Hibbits #define INTR_EN_TMR 0x01000000 413*852ba100SJustin Hibbits #define INTR_EN_MACSEC_MAC0 0x00000001 414*852ba100SJustin Hibbits /* @} */ 4150aeed3e9SJustin Hibbits 4160aeed3e9SJustin Hibbits /**************************************************************************//** 4170aeed3e9SJustin Hibbits @Description Memory Mapped Registers 4180aeed3e9SJustin Hibbits *//***************************************************************************/ 4190aeed3e9SJustin Hibbits 4200aeed3e9SJustin Hibbits #if defined(__MWERKS__) && !defined(__GNUC__) 4210aeed3e9SJustin Hibbits #pragma pack(push,1) 4220aeed3e9SJustin Hibbits #endif /* defined(__MWERKS__) && ... */ 4230aeed3e9SJustin Hibbits 424*852ba100SJustin Hibbits typedef struct 4250aeed3e9SJustin Hibbits { 4260aeed3e9SJustin Hibbits volatile uint32_t iadd; /**< FM IRAM instruction address register */ 4270aeed3e9SJustin Hibbits volatile uint32_t idata; /**< FM IRAM instruction data register */ 4280aeed3e9SJustin Hibbits volatile uint32_t itcfg; /**< FM IRAM timing config register */ 4290aeed3e9SJustin Hibbits volatile uint32_t iready; /**< FM IRAM ready register */ 430*852ba100SJustin Hibbits volatile uint32_t res[0x1FFFC]; 431*852ba100SJustin Hibbits } t_FMIramRegs; 4320aeed3e9SJustin Hibbits 433*852ba100SJustin Hibbits /* Trace buffer registers - 434*852ba100SJustin Hibbits each FM Controller has its own trace buffer residing at FM_MM_TRB(fmCtrlIndex) offset */ 435*852ba100SJustin Hibbits typedef struct t_FmTrbRegs 436*852ba100SJustin Hibbits { 437*852ba100SJustin Hibbits volatile uint32_t tcrh; 438*852ba100SJustin Hibbits volatile uint32_t tcrl; 439*852ba100SJustin Hibbits volatile uint32_t tesr; 440*852ba100SJustin Hibbits volatile uint32_t tecr0h; 441*852ba100SJustin Hibbits volatile uint32_t tecr0l; 442*852ba100SJustin Hibbits volatile uint32_t terf0h; 443*852ba100SJustin Hibbits volatile uint32_t terf0l; 444*852ba100SJustin Hibbits volatile uint32_t tecr1h; 445*852ba100SJustin Hibbits volatile uint32_t tecr1l; 446*852ba100SJustin Hibbits volatile uint32_t terf1h; 447*852ba100SJustin Hibbits volatile uint32_t terf1l; 448*852ba100SJustin Hibbits volatile uint32_t tpcch; 449*852ba100SJustin Hibbits volatile uint32_t tpccl; 450*852ba100SJustin Hibbits volatile uint32_t tpc1h; 451*852ba100SJustin Hibbits volatile uint32_t tpc1l; 452*852ba100SJustin Hibbits volatile uint32_t tpc2h; 453*852ba100SJustin Hibbits volatile uint32_t tpc2l; 454*852ba100SJustin Hibbits volatile uint32_t twdimr; 455*852ba100SJustin Hibbits volatile uint32_t twicvr; 456*852ba100SJustin Hibbits volatile uint32_t tar; 457*852ba100SJustin Hibbits volatile uint32_t tdr; 458*852ba100SJustin Hibbits volatile uint32_t tsnum1; 459*852ba100SJustin Hibbits volatile uint32_t tsnum2; 460*852ba100SJustin Hibbits volatile uint32_t tsnum3; 461*852ba100SJustin Hibbits volatile uint32_t tsnum4; 462*852ba100SJustin Hibbits } t_FmTrbRegs; 463*852ba100SJustin Hibbits 4640aeed3e9SJustin Hibbits #if defined(__MWERKS__) && !defined(__GNUC__) 4650aeed3e9SJustin Hibbits #pragma pack(pop) 4660aeed3e9SJustin Hibbits #endif /* defined(__MWERKS__) && ... */ 4670aeed3e9SJustin Hibbits 4680aeed3e9SJustin Hibbits /**************************************************************************//** 4690aeed3e9SJustin Hibbits @Description General defines 4700aeed3e9SJustin Hibbits *//***************************************************************************/ 4710aeed3e9SJustin Hibbits #define FM_DEBUG_STATUS_REGISTER_OFFSET 0x000d1084UL 472*852ba100SJustin Hibbits #define FM_FW_DEBUG_INSTRUCTION 0x6ffff805UL 4730aeed3e9SJustin Hibbits 4740aeed3e9SJustin Hibbits /**************************************************************************//** 4750aeed3e9SJustin Hibbits @Description FPM defines 4760aeed3e9SJustin Hibbits *//***************************************************************************/ 4770aeed3e9SJustin Hibbits /* masks */ 478*852ba100SJustin Hibbits #define FPM_BRKC_RDBG 0x00000200 479*852ba100SJustin Hibbits #define FPM_BRKC_SLP 0x00000800 4800aeed3e9SJustin Hibbits /**************************************************************************//** 4810aeed3e9SJustin Hibbits @Description BMI defines 4820aeed3e9SJustin Hibbits *//***************************************************************************/ 4830aeed3e9SJustin Hibbits /* masks */ 4840aeed3e9SJustin Hibbits #define BMI_INIT_START 0x80000000 485*852ba100SJustin Hibbits #define BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC 0x80000000 4860aeed3e9SJustin Hibbits #define BMI_ERR_INTR_EN_LIST_RAM_ECC 0x40000000 4870aeed3e9SJustin Hibbits #define BMI_ERR_INTR_EN_STATISTICS_RAM_ECC 0x20000000 4880aeed3e9SJustin Hibbits #define BMI_ERR_INTR_EN_DISPATCH_RAM_ECC 0x10000000 4890aeed3e9SJustin Hibbits /**************************************************************************//** 4900aeed3e9SJustin Hibbits @Description QMI defines 4910aeed3e9SJustin Hibbits *//***************************************************************************/ 4920aeed3e9SJustin Hibbits /* masks */ 4930aeed3e9SJustin Hibbits #define QMI_ERR_INTR_EN_DOUBLE_ECC 0x80000000 4940aeed3e9SJustin Hibbits #define QMI_ERR_INTR_EN_DEQ_FROM_DEF 0x40000000 4950aeed3e9SJustin Hibbits #define QMI_INTR_EN_SINGLE_ECC 0x80000000 4960aeed3e9SJustin Hibbits 4970aeed3e9SJustin Hibbits /**************************************************************************//** 4980aeed3e9SJustin Hibbits @Description IRAM defines 4990aeed3e9SJustin Hibbits *//***************************************************************************/ 5000aeed3e9SJustin Hibbits /* masks */ 5010aeed3e9SJustin Hibbits #define IRAM_IADD_AIE 0x80000000 5020aeed3e9SJustin Hibbits #define IRAM_READY 0x80000000 5030aeed3e9SJustin Hibbits 504*852ba100SJustin Hibbits /**************************************************************************//** 505*852ba100SJustin Hibbits @Description TRB defines 506*852ba100SJustin Hibbits *//***************************************************************************/ 507*852ba100SJustin Hibbits /* masks */ 508*852ba100SJustin Hibbits #define TRB_TCRH_RESET 0x04000000 509*852ba100SJustin Hibbits #define TRB_TCRH_ENABLE_COUNTERS 0x84008000 510*852ba100SJustin Hibbits #define TRB_TCRH_DISABLE_COUNTERS 0x8400C000 511*852ba100SJustin Hibbits #define TRB_TCRL_RESET 0x20000000 512*852ba100SJustin Hibbits #define TRB_TCRL_UTIL 0x00000460 5130aeed3e9SJustin Hibbits typedef struct { 5140aeed3e9SJustin Hibbits void (*f_Isr) (t_Handle h_Arg, uint32_t event); 5150aeed3e9SJustin Hibbits t_Handle h_SrcHandle; 5160aeed3e9SJustin Hibbits } t_FmanCtrlIntrSrc; 5170aeed3e9SJustin Hibbits 5180aeed3e9SJustin Hibbits 5190aeed3e9SJustin Hibbits typedef void (t_FmanCtrlIsr)( t_Handle h_Fm, uint32_t event); 5200aeed3e9SJustin Hibbits 5210aeed3e9SJustin Hibbits typedef struct 5220aeed3e9SJustin Hibbits { 5230aeed3e9SJustin Hibbits /***************************/ 5240aeed3e9SJustin Hibbits /* Master/Guest parameters */ 5250aeed3e9SJustin Hibbits /***************************/ 5260aeed3e9SJustin Hibbits uint8_t fmId; 5270aeed3e9SJustin Hibbits e_FmPortType portsTypes[FM_MAX_NUM_OF_HW_PORT_IDS]; 5280aeed3e9SJustin Hibbits uint16_t fmClkFreq; 529*852ba100SJustin Hibbits uint16_t fmMacClkFreq; 530*852ba100SJustin Hibbits t_FmRevisionInfo revInfo; 5310aeed3e9SJustin Hibbits /**************************/ 5320aeed3e9SJustin Hibbits /* Master Only parameters */ 5330aeed3e9SJustin Hibbits /**************************/ 5340aeed3e9SJustin Hibbits bool enabledTimeStamp; 5350aeed3e9SJustin Hibbits uint8_t count1MicroBit; 5360aeed3e9SJustin Hibbits uint8_t totalNumOfTasks; 5370aeed3e9SJustin Hibbits uint32_t totalFifoSize; 5380aeed3e9SJustin Hibbits uint8_t maxNumOfOpenDmas; 5390aeed3e9SJustin Hibbits uint8_t accumulatedNumOfTasks; 5400aeed3e9SJustin Hibbits uint32_t accumulatedFifoSize; 5410aeed3e9SJustin Hibbits uint8_t accumulatedNumOfOpenDmas; 5420aeed3e9SJustin Hibbits uint8_t accumulatedNumOfDeqTnums; 5430aeed3e9SJustin Hibbits #ifdef FM_LOW_END_RESTRICTION 5440aeed3e9SJustin Hibbits bool lowEndRestriction; 5450aeed3e9SJustin Hibbits #endif /* FM_LOW_END_RESTRICTION */ 5460aeed3e9SJustin Hibbits uint32_t exceptions; 547*852ba100SJustin Hibbits uintptr_t irq; 548*852ba100SJustin Hibbits uintptr_t errIrq; 5490aeed3e9SJustin Hibbits bool ramsEccEnable; 5500aeed3e9SJustin Hibbits bool explicitEnable; 5510aeed3e9SJustin Hibbits bool internalCall; 5520aeed3e9SJustin Hibbits uint8_t ramsEccOwners; 5530aeed3e9SJustin Hibbits uint32_t extraFifoPoolSize; 5540aeed3e9SJustin Hibbits uint8_t extraTasksPoolSize; 5550aeed3e9SJustin Hibbits uint8_t extraOpenDmasPoolSize; 5560aeed3e9SJustin Hibbits #if defined(FM_MAX_NUM_OF_10G_MACS) && (FM_MAX_NUM_OF_10G_MACS) 557*852ba100SJustin Hibbits uint16_t portMaxFrameLengths10G[FM_MAX_NUM_OF_10G_MACS]; 5580aeed3e9SJustin Hibbits uint16_t macMaxFrameLengths10G[FM_MAX_NUM_OF_10G_MACS]; 559*852ba100SJustin Hibbits #endif /* defined(FM_MAX_NUM_OF_10G_MACS) && ... */ 560*852ba100SJustin Hibbits uint16_t portMaxFrameLengths1G[FM_MAX_NUM_OF_1G_MACS]; 5610aeed3e9SJustin Hibbits uint16_t macMaxFrameLengths1G[FM_MAX_NUM_OF_1G_MACS]; 5620aeed3e9SJustin Hibbits } t_FmStateStruct; 5630aeed3e9SJustin Hibbits 564*852ba100SJustin Hibbits #if (DPAA_VERSION >= 11) 565*852ba100SJustin Hibbits typedef struct t_FmMapParam { 566*852ba100SJustin Hibbits uint16_t profilesBase; 567*852ba100SJustin Hibbits uint16_t numOfProfiles; 568*852ba100SJustin Hibbits t_Handle h_FmPort; 569*852ba100SJustin Hibbits } t_FmMapParam; 570*852ba100SJustin Hibbits 571*852ba100SJustin Hibbits typedef struct t_FmAllocMng { 572*852ba100SJustin Hibbits bool allocated; 573*852ba100SJustin Hibbits uint8_t ownerId; /* guestId for KG in multi-partition only, 574*852ba100SJustin Hibbits portId for PLCR in any environment */ 575*852ba100SJustin Hibbits } t_FmAllocMng; 576*852ba100SJustin Hibbits 577*852ba100SJustin Hibbits typedef struct t_FmPcdSpEntry { 578*852ba100SJustin Hibbits bool valid; 579*852ba100SJustin Hibbits t_FmAllocMng profilesMng; 580*852ba100SJustin Hibbits } t_FmPcdSpEntry; 581*852ba100SJustin Hibbits 582*852ba100SJustin Hibbits typedef struct t_FmSp { 583*852ba100SJustin Hibbits void *p_FmPcdStoragePrflRegs; 584*852ba100SJustin Hibbits t_FmPcdSpEntry profiles[FM_VSP_MAX_NUM_OF_ENTRIES]; 585*852ba100SJustin Hibbits t_FmMapParam portsMapping[FM_MAX_NUM_OF_PORTS]; 586*852ba100SJustin Hibbits } t_FmSp; 587*852ba100SJustin Hibbits #endif /* (DPAA_VERSION >= 11) */ 588*852ba100SJustin Hibbits 589*852ba100SJustin Hibbits typedef struct t_Fm 5900aeed3e9SJustin Hibbits { 5910aeed3e9SJustin Hibbits /***************************/ 5920aeed3e9SJustin Hibbits /* Master/Guest parameters */ 5930aeed3e9SJustin Hibbits /***************************/ 5940aeed3e9SJustin Hibbits /* locals for recovery */ 5950aeed3e9SJustin Hibbits uintptr_t baseAddr; 5960aeed3e9SJustin Hibbits 5970aeed3e9SJustin Hibbits /* un-needed for recovery */ 5980aeed3e9SJustin Hibbits t_Handle h_Pcd; 5990aeed3e9SJustin Hibbits char fmModuleName[MODULE_NAME_SIZE]; 6000aeed3e9SJustin Hibbits char fmIpcHandlerModuleName[FM_MAX_NUM_OF_GUESTS][MODULE_NAME_SIZE]; 6010aeed3e9SJustin Hibbits t_Handle h_IpcSessions[FM_MAX_NUM_OF_GUESTS]; 6020aeed3e9SJustin Hibbits t_FmIntrSrc intrMng[e_FM_EV_DUMMY_LAST]; /* FM exceptions user callback */ 6030aeed3e9SJustin Hibbits uint8_t guestId; 6040aeed3e9SJustin Hibbits /**************************/ 6050aeed3e9SJustin Hibbits /* Master Only parameters */ 6060aeed3e9SJustin Hibbits /**************************/ 6070aeed3e9SJustin Hibbits /* locals for recovery */ 608*852ba100SJustin Hibbits struct fman_fpm_regs *p_FmFpmRegs; 609*852ba100SJustin Hibbits struct fman_bmi_regs *p_FmBmiRegs; 610*852ba100SJustin Hibbits struct fman_qmi_regs *p_FmQmiRegs; 611*852ba100SJustin Hibbits struct fman_dma_regs *p_FmDmaRegs; 612*852ba100SJustin Hibbits struct fman_regs *p_FmRegs; 6130aeed3e9SJustin Hibbits t_FmExceptionsCallback *f_Exception; 6140aeed3e9SJustin Hibbits t_FmBusErrorCallback *f_BusError; 6150aeed3e9SJustin Hibbits t_Handle h_App; /* Application handle */ 6160aeed3e9SJustin Hibbits t_Handle h_Spinlock; 6170aeed3e9SJustin Hibbits bool recoveryMode; 6180aeed3e9SJustin Hibbits t_FmStateStruct *p_FmStateStruct; 619*852ba100SJustin Hibbits uint16_t tnumAgingPeriod; 620*852ba100SJustin Hibbits #if (DPAA_VERSION >= 11) 621*852ba100SJustin Hibbits t_FmSp *p_FmSp; 622*852ba100SJustin Hibbits uint8_t partNumOfVSPs; 623*852ba100SJustin Hibbits uint8_t partVSPBase; 624*852ba100SJustin Hibbits uintptr_t vspBaseAddr; 625*852ba100SJustin Hibbits #endif /* (DPAA_VERSION >= 11) */ 626*852ba100SJustin Hibbits bool portsPreFetchConfigured[FM_MAX_NUM_OF_HW_PORT_IDS]; /* Prefetch configration per Tx-port */ 627*852ba100SJustin Hibbits bool portsPreFetchValue[FM_MAX_NUM_OF_HW_PORT_IDS]; /* Prefetch configration per Tx-port */ 6280aeed3e9SJustin Hibbits 6290aeed3e9SJustin Hibbits /* un-needed for recovery */ 630*852ba100SJustin Hibbits struct fman_cfg *p_FmDriverParam; 6310aeed3e9SJustin Hibbits t_Handle h_FmMuram; 6320aeed3e9SJustin Hibbits uint64_t fmMuramPhysBaseAddr; 6330aeed3e9SJustin Hibbits bool independentMode; 6340aeed3e9SJustin Hibbits bool hcPortInitialized; 6350aeed3e9SJustin Hibbits uintptr_t camBaseAddr; /* save for freeing */ 6360aeed3e9SJustin Hibbits uintptr_t resAddr; 6370aeed3e9SJustin Hibbits uintptr_t fifoBaseAddr; /* save for freeing */ 6380aeed3e9SJustin Hibbits t_FmanCtrlIntrSrc fmanCtrlIntr[FM_NUM_OF_FMAN_CTRL_EVENT_REGS]; /* FM exceptions user callback */ 6390aeed3e9SJustin Hibbits bool usedEventRegs[FM_NUM_OF_FMAN_CTRL_EVENT_REGS]; 640*852ba100SJustin Hibbits t_FmFirmwareParams firmware; 641*852ba100SJustin Hibbits bool fwVerify; 642*852ba100SJustin Hibbits bool resetOnInit; 643*852ba100SJustin Hibbits t_FmResetOnInitOverrideCallback *f_ResetOnInitOverride; 644*852ba100SJustin Hibbits uint32_t userSetExceptions; 6450aeed3e9SJustin Hibbits } t_Fm; 6460aeed3e9SJustin Hibbits 6470aeed3e9SJustin Hibbits 6480aeed3e9SJustin Hibbits #endif /* __FM_H */ 649