1 /* Copyright (c) 2008-2011 Freescale Semiconductor, Inc. 2 * All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright 9 * notice, this list of conditions and the following disclaimer in the 10 * documentation and/or other materials provided with the distribution. 11 * * Neither the name of Freescale Semiconductor nor the 12 * names of its contributors may be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * 16 * ALTERNATIVELY, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") as published by the Free Software 18 * Foundation, either version 2 of that License or (at your option) any 19 * later version. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /****************************************************************************** 34 @File fm_rtc.h 35 36 @Description Memory map and internal definitions for FM RTC IEEE1588 Timer driver. 37 38 @Cautions None 39 *//***************************************************************************/ 40 41 #ifndef __FM_RTC_H__ 42 #define __FM_RTC_H__ 43 44 #include "std_ext.h" 45 #include "fm_rtc_ext.h" 46 47 48 #define __ERR_MODULE__ MODULE_FM_RTC 49 50 /* General definitions */ 51 52 #define NANOSEC_PER_ONE_HZ_TICK 1000000000 53 #define MIN_RTC_CLK_FREQ_HZ 1000 54 #define MHz 1000000 55 56 #define ACCUMULATOR_OVERFLOW ((uint64_t)(1LL << 32)) 57 58 /* RTC default values */ 59 #define DEFAULT_srcClock e_FM_RTC_SOURCE_CLOCK_SYSTEM 60 #define DEFAULT_bypass FALSE 61 #define DEFAULT_invertInputClkPhase FALSE 62 #define DEFAULT_invertOutputClkPhase FALSE 63 #define DEFAULT_outputClockDivisor 0x00000002 64 #define DEFAULT_alarmPolarity e_FM_RTC_ALARM_POLARITY_ACTIVE_HIGH 65 #define DEFAULT_triggerPolarity e_FM_RTC_TRIGGER_ON_FALLING_EDGE 66 #define DEFAULT_pulseRealign FALSE 67 #define DEFAULT_clockPeriod 1000 68 69 /* FM RTC Registers definitions */ 70 #define TMR_CTRL_ALMP1 0x80000000 71 #define TMR_CTRL_ALMP2 0x40000000 72 #define TMR_CTRL_FS 0x10000000 73 #define TMR_CTRL_PP1L 0x08000000 74 #define TMR_CTRL_PP2L 0x04000000 75 #define TMR_CTRL_TCLK_PERIOD_MASK 0x03FF0000 76 #define TMR_CTRL_FRD 0x00004000 77 #define TMR_CTRL_SLV 0x00002000 78 #define TMR_CTRL_ETEP1 0x00000100 79 #define TMR_CTRL_COPH 0x00000080 80 #define TMR_CTRL_CIPH 0x00000040 81 #define TMR_CTRL_TMSR 0x00000020 82 #define TMR_CTRL_DBG 0x00000010 83 #define TMR_CTRL_BYP 0x00000008 84 #define TMR_CTRL_TE 0x00000004 85 #define TMR_CTRL_CKSEL_OSC_CLK 0x00000003 86 #define TMR_CTRL_CKSEL_MAC_CLK 0x00000001 87 #define TMR_CTRL_CKSEL_EXT_CLK 0x00000000 88 #define TMR_CTRL_TCLK_PERIOD_SHIFT 16 89 90 #define TMR_TEVENT_ETS2 0x02000000 91 #define TMR_TEVENT_ETS1 0x01000000 92 #define TMR_TEVENT_ALM2 0x00020000 93 #define TMR_TEVENT_ALM1 0x00010000 94 #define TMR_TEVENT_PP1 0x00000080 95 #define TMR_TEVENT_PP2 0x00000040 96 #define TMR_TEVENT_PP3 0x00000020 97 #define TMR_TEVENT_ALL (TMR_TEVENT_ETS2 | TMR_TEVENT_ETS1 | \ 98 TMR_TEVENT_ALM2 | TMR_TEVENT_ALM1 | \ 99 TMR_TEVENT_PP1 | TMR_TEVENT_PP2 | TMR_TEVENT_PP3) 100 101 #define TMR_PRSC_OCK_MASK 0x0000FFFF 102 103 104 /**************************************************************************//** 105 @Description Memory Mapped Registers 106 *//***************************************************************************/ 107 108 #if defined(__MWERKS__) && !defined(__GNUC__) 109 #pragma pack(push,1) 110 #endif /* defined(__MWERKS__) && ... */ 111 #define MEM_MAP_START 112 113 /**************************************************************************//** 114 @Description FM RTC timer alarm 115 *//***************************************************************************/ 116 typedef _Packed struct t_TmrAlaram 117 { 118 volatile uint32_t tmr_alarm_h; /**< */ 119 volatile uint32_t tmr_alarm_l; /**< */ 120 } _PackedType t_TmrAlaram; 121 122 /**************************************************************************//** 123 @Description FM RTC timer Ex trigger 124 *//***************************************************************************/ 125 typedef _Packed struct t_TmrExtTrigger 126 { 127 volatile uint32_t tmr_etts_h; /**< */ 128 volatile uint32_t tmr_etts_l; /**< */ 129 } _PackedType t_TmrExtTrigger; 130 131 typedef _Packed struct 132 { 133 volatile uint32_t tmr_id; /* Module ID and version register */ 134 volatile uint32_t tmr_id2; /* Module ID and configuration register */ 135 volatile uint32_t PTP_RESERVED1[30]; 136 volatile uint32_t tmr_ctrl; /* timer control register */ 137 volatile uint32_t tmr_tevent; /* timer event register */ 138 volatile uint32_t tmr_temask; /* timer event mask register */ 139 volatile uint32_t PTP_RESERVED2[3]; 140 volatile uint32_t tmr_cnt_h; /* timer counter high register */ 141 volatile uint32_t tmr_cnt_l; /* timer counter low register */ 142 volatile uint32_t tmr_add; /* timer drift compensation addend register */ 143 volatile uint32_t tmr_acc; /* timer accumulator register */ 144 volatile uint32_t tmr_prsc; /* timer prescale */ 145 volatile uint32_t PTP_RESERVED3; 146 volatile uint32_t tmr_off_h; /* timer offset high */ 147 volatile uint32_t tmr_off_l; /* timer offset low */ 148 volatile t_TmrAlaram tmr_alarm[FM_RTC_NUM_OF_ALARMS]; /* timer alarm */ 149 volatile uint32_t PTP_RESERVED4[2]; 150 volatile uint32_t tmr_fiper[FM_RTC_NUM_OF_PERIODIC_PULSES]; /* timer fixed period interval */ 151 volatile uint32_t PTP_RESERVED5[2]; 152 volatile t_TmrExtTrigger tmr_etts[FM_RTC_NUM_OF_EXT_TRIGGERS]; /*time stamp general purpose external */ 153 volatile uint32_t PTP_RESERVED6[3]; 154 } _PackedType t_FmRtcMemMap; 155 156 #define MEM_MAP_END 157 #if defined(__MWERKS__) && !defined(__GNUC__) 158 #pragma pack(pop) 159 #endif /* defined(__MWERKS__) && ... */ 160 161 162 /**************************************************************************//** 163 @Description RTC FM driver parameters structure. 164 *//***************************************************************************/ 165 typedef struct t_FmRtcDriverParam 166 { 167 t_Handle h_Fm; /**< */ 168 e_FmSrcClk srcClk; /**< */ 169 uint32_t extSrcClkFreq; /**< */ 170 uint32_t rtcFreqHz; /**< */ 171 bool timerSlaveMode; /*Slave/Master Mode*/ 172 bool invertInputClkPhase; 173 bool invertOutputClkPhase; 174 uint32_t eventsMask; 175 bool bypass; /**< Indicates if frequency compensation is bypassed */ 176 bool pulseRealign; 177 e_FmRtcAlarmPolarity alarmPolarity[FM_RTC_NUM_OF_ALARMS]; 178 e_FmRtcTriggerPolarity triggerPolarity[FM_RTC_NUM_OF_EXT_TRIGGERS]; 179 } t_FmRtcDriverParam; 180 181 typedef struct t_FmRtcAlarm 182 { 183 t_FmRtcExceptionsCallback *f_AlarmCallback; 184 bool clearOnExpiration; 185 } t_FmRtcAlarm; 186 187 typedef struct t_FmRtcPeriodicPulse 188 { 189 t_FmRtcExceptionsCallback *f_PeriodicPulseCallback; 190 } t_FmRtcPeriodicPulse; 191 192 typedef struct t_FmRtcExternalTrigger 193 { 194 t_FmRtcExceptionsCallback *f_ExternalTriggerCallback; 195 } t_FmRtcExternalTrigger; 196 197 198 /**************************************************************************//** 199 @Description RTC FM driver control structure. 200 *//***************************************************************************/ 201 typedef struct t_FmRtc 202 { 203 t_Part *p_Part; /**< Pointer to the integration device */ 204 t_Handle h_Fm; 205 t_Handle h_App; /**< Application handle */ 206 t_FmRtcMemMap *p_MemMap; /**< Pointer to RTC memory map */ 207 uint32_t clockPeriodNanoSec; /**< RTC clock period in nano-seconds (for FS mode) */ 208 uint32_t srcClkFreqMhz; 209 uint16_t outputClockDivisor; /**< Output clock divisor (for FS mode) */ 210 t_FmRtcAlarm alarmParams[FM_RTC_NUM_OF_ALARMS]; 211 t_FmRtcPeriodicPulse periodicPulseParams[FM_RTC_NUM_OF_PERIODIC_PULSES]; 212 t_FmRtcExternalTrigger externalTriggerParams[FM_RTC_NUM_OF_EXT_TRIGGERS]; 213 t_FmRtcDriverParam *p_RtcDriverParam; /**< RTC Driver parameters (for Init phase) */ 214 } t_FmRtc; 215 216 217 #endif /* __FM_RTC_H__ */ 218