1 /* 2 * Copyright 2008-2015 Freescale Semiconductor Inc. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright 9 * notice, this list of conditions and the following disclaimer in the 10 * documentation and/or other materials provided with the distribution. 11 * * Neither the name of Freescale Semiconductor nor the 12 * names of its contributors may be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * 16 * ALTERNATIVELY, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") as published by the Free Software 18 * Foundation, either version 2 of that License or (at your option) any 19 * later version. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /****************************************************************************** 34 @File fm_macsec_master.h 35 36 @Description FM MACSEC internal structures and definitions. 37 *//***************************************************************************/ 38 #ifndef __FM_MACSEC_MASTER_H 39 #define __FM_MACSEC_MASTER_H 40 41 #include "error_ext.h" 42 #include "std_ext.h" 43 44 #include "fm_macsec.h" 45 46 47 #define MACSEC_ICV_SIZE 16 48 #define MACSEC_SECTAG_SIZE 16 49 #define MACSEC_SCI_SIZE 8 50 #define MACSEC_FCS_SIZE 4 51 52 /**************************************************************************//** 53 @Description Exceptions 54 *//***************************************************************************/ 55 56 #define FM_MACSEC_EX_TX_SC_0 0x80000000 57 #define FM_MACSEC_EX_TX_SC(sc) (FM_MACSEC_EX_TX_SC_0 >> (sc)) 58 #define FM_MACSEC_EX_ECC 0x00000001 59 60 #define GET_EXCEPTION_FLAG(bitMask, exception, id) switch (exception){ \ 61 case e_FM_MACSEC_EX_TX_SC: \ 62 bitMask = FM_MACSEC_EX_TX_SC(id); break; \ 63 case e_FM_MACSEC_EX_ECC: \ 64 bitMask = FM_MACSEC_EX_ECC; break; \ 65 default: bitMask = 0;break;} 66 67 #define FM_MACSEC_USER_EX_SINGLE_BIT_ECC 0x80000000 68 #define FM_MACSEC_USER_EX_MULTI_BIT_ECC 0x40000000 69 70 #define GET_USER_EXCEPTION_FLAG(bitMask, exception) switch (exception){ \ 71 case e_FM_MACSEC_EX_SINGLE_BIT_ECC: \ 72 bitMask = FM_MACSEC_USER_EX_SINGLE_BIT_ECC; break; \ 73 case e_FM_MACSEC_EX_MULTI_BIT_ECC: \ 74 bitMask = FM_MACSEC_USER_EX_MULTI_BIT_ECC; break; \ 75 default: bitMask = 0;break;} 76 77 /**************************************************************************//** 78 @Description Events 79 *//***************************************************************************/ 80 81 #define FM_MACSEC_EV_TX_SC_0_NEXT_PN 0x80000000 82 #define FM_MACSEC_EV_TX_SC_NEXT_PN(sc) (FM_MACSEC_EV_TX_SC_0_NEXT_PN >> (sc)) 83 84 #define GET_EVENT_FLAG(bitMask, event, id) switch (event){ \ 85 case e_FM_MACSEC_EV_TX_SC_NEXT_PN: \ 86 bitMask = FM_MACSEC_EV_TX_SC_NEXT_PN(id); break; \ 87 default: bitMask = 0;break;} 88 89 /**************************************************************************//** 90 @Description Defaults 91 *//***************************************************************************/ 92 #define DEFAULT_userExceptions (FM_MACSEC_USER_EX_SINGLE_BIT_ECC |\ 93 FM_MACSEC_USER_EX_MULTI_BIT_ECC) 94 95 #define DEFAULT_exceptions (FM_MACSEC_EX_TX_SC(0) |\ 96 FM_MACSEC_EX_TX_SC(1) |\ 97 FM_MACSEC_EX_TX_SC(2) |\ 98 FM_MACSEC_EX_TX_SC(3) |\ 99 FM_MACSEC_EX_TX_SC(4) |\ 100 FM_MACSEC_EX_TX_SC(5) |\ 101 FM_MACSEC_EX_TX_SC(6) |\ 102 FM_MACSEC_EX_TX_SC(7) |\ 103 FM_MACSEC_EX_TX_SC(8) |\ 104 FM_MACSEC_EX_TX_SC(9) |\ 105 FM_MACSEC_EX_TX_SC(10) |\ 106 FM_MACSEC_EX_TX_SC(11) |\ 107 FM_MACSEC_EX_TX_SC(12) |\ 108 FM_MACSEC_EX_TX_SC(13) |\ 109 FM_MACSEC_EX_TX_SC(14) |\ 110 FM_MACSEC_EX_TX_SC(15) |\ 111 FM_MACSEC_EX_ECC ) 112 113 #define DEFAULT_events (FM_MACSEC_EV_TX_SC_NEXT_PN(0) |\ 114 FM_MACSEC_EV_TX_SC_NEXT_PN(1) |\ 115 FM_MACSEC_EV_TX_SC_NEXT_PN(2) |\ 116 FM_MACSEC_EV_TX_SC_NEXT_PN(3) |\ 117 FM_MACSEC_EV_TX_SC_NEXT_PN(4) |\ 118 FM_MACSEC_EV_TX_SC_NEXT_PN(5) |\ 119 FM_MACSEC_EV_TX_SC_NEXT_PN(6) |\ 120 FM_MACSEC_EV_TX_SC_NEXT_PN(7) |\ 121 FM_MACSEC_EV_TX_SC_NEXT_PN(8) |\ 122 FM_MACSEC_EV_TX_SC_NEXT_PN(9) |\ 123 FM_MACSEC_EV_TX_SC_NEXT_PN(10) |\ 124 FM_MACSEC_EV_TX_SC_NEXT_PN(11) |\ 125 FM_MACSEC_EV_TX_SC_NEXT_PN(12) |\ 126 FM_MACSEC_EV_TX_SC_NEXT_PN(13) |\ 127 FM_MACSEC_EV_TX_SC_NEXT_PN(14) |\ 128 FM_MACSEC_EV_TX_SC_NEXT_PN(15) ) 129 130 #define DEFAULT_unknownSciFrameTreatment e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_BOTH 131 #define DEFAULT_invalidTagsFrameTreatment FALSE 132 #define DEFAULT_encryptWithNoChangedTextFrameTreatment FALSE 133 #define DEFAULT_untagFrameTreatment e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED 134 #define DEFAULT_changedTextWithNoEncryptFrameTreatment FALSE 135 #define DEFAULT_onlyScbIsSetFrameTreatment FALSE 136 #define DEFAULT_keysUnreadable FALSE 137 #define DEFAULT_normalMode TRUE 138 #define DEFAULT_sc0ReservedForPTP FALSE 139 #define DEFAULT_initNextPn 1 140 #define DEFAULT_pnExhThr 0xffffffff 141 #define DEFAULT_sectagOverhead (MACSEC_ICV_SIZE + MACSEC_SECTAG_SIZE) 142 #define DEFAULT_mflSubtract MACSEC_FCS_SIZE 143 144 145 /**************************************************************************//** 146 @Description Memory Mapped Registers 147 *//***************************************************************************/ 148 149 #if defined(__MWERKS__) && !defined(__GNUC__) 150 #pragma pack(push,1) 151 #endif /* defined(__MWERKS__) && ... */ 152 153 typedef _Packed struct 154 { 155 /* MACsec configuration */ 156 volatile uint32_t cfg; /**< MACsec configuration */ 157 volatile uint32_t et; /**< MACsec EtherType */ 158 volatile uint8_t res1[56]; /**< reserved */ 159 volatile uint32_t mfl; /**< Maximum Frame Length */ 160 volatile uint32_t tpnet; /**< TX Packet Number exhaustion threshold */ 161 volatile uint8_t res2[56]; /**< reserved */ 162 volatile uint32_t rxsca; /**< RX SC access select */ 163 volatile uint8_t res3[60]; /**< reserved */ 164 volatile uint32_t txsca; /**< TX SC access select */ 165 volatile uint8_t res4[60]; /**< reserved */ 166 167 /* RX configuration, status and statistic */ 168 volatile uint32_t rxsci1h; /**< RX Secure Channel Identifier first half */ 169 volatile uint32_t rxsci2h; /**< RX Secure Channel Identifier second half */ 170 volatile uint8_t res5[8]; /**< reserved */ 171 volatile uint32_t ifio1hs; /**< ifInOctets first half Statistic */ 172 volatile uint32_t ifio2hs; /**< ifInOctets second half Statistic */ 173 volatile uint32_t ifiups; /**< ifInUcastPkts Statistic */ 174 volatile uint8_t res6[4]; /**< reserved */ 175 volatile uint32_t ifimps; /**< ifInMulticastPkts Statistic */ 176 volatile uint32_t ifibps; /**< ifInBroadcastPkts Statistic */ 177 volatile uint32_t rxsccfg; /**< RX Secure Channel configuration */ 178 volatile uint32_t rpw; /**< replayWindow */ 179 volatile uint8_t res7[16]; /**< reserved */ 180 volatile uint32_t inov1hs; /**< InOctetsValidated first half Statistic */ 181 volatile uint32_t inov2hs; /**< InOctetsValidated second half Statistic */ 182 volatile uint32_t inod1hs; /**< InOctetsDecrypted first half Statistic */ 183 volatile uint32_t inod2hs; /**< InOctetsDecrypted second half Statistic */ 184 volatile uint32_t rxscipus; /**< RX Secure Channel InPktsUnchecked Statistic */ 185 volatile uint32_t rxscipds; /**< RX Secure Channel InPktsDelayed Statistic */ 186 volatile uint32_t rxscipls; /**< RX Secure Channel InPktsLate Statistic */ 187 volatile uint8_t res8[4]; /**< reserved */ 188 volatile uint32_t rxaninuss[MAX_NUM_OF_SA_PER_SC]; /**< RX AN 0-3 InNotUsingSA Statistic */ 189 volatile uint32_t rxanipuss[MAX_NUM_OF_SA_PER_SC]; /**< RX AN 0-3 InPktsUnusedSA Statistic */ 190 _Packed struct 191 { 192 volatile uint32_t rxsacs; /**< RX Security Association configuration and status */ 193 volatile uint32_t rxsanpn; /**< RX Security Association nextPN */ 194 volatile uint32_t rxsalpn; /**< RX Security Association lowestPN */ 195 volatile uint32_t rxsaipos; /**< RX Security Association InPktsOK Statistic */ 196 volatile uint32_t rxsak[4]; /**< RX Security Association key (128 bit) */ 197 volatile uint32_t rxsah[4]; /**< RX Security Association hash (128 bit) */ 198 volatile uint32_t rxsaipis; /**< RX Security Association InPktsInvalid Statistic */ 199 volatile uint32_t rxsaipnvs; /**< RX Security Association InPktsNotValid Statistic */ 200 volatile uint8_t res9[8]; /**< reserved */ 201 } _PackedType fmMacsecRxScSa[NUM_OF_SA_PER_RX_SC]; 202 203 /* TX configuration, status and statistic */ 204 volatile uint32_t txsci1h; /**< TX Secure Channel Identifier first half */ 205 volatile uint32_t txsci2h; /**< TX Secure Channel Identifier second half */ 206 volatile uint8_t res10[8]; /**< reserved */ 207 volatile uint32_t ifoo1hs; /**< ifOutOctets first half Statistic */ 208 volatile uint32_t ifoo2hs; /**< ifOutOctets second half Statistic */ 209 volatile uint32_t ifoups; /**< ifOutUcastPkts Statistic */ 210 volatile uint32_t opus; /**< OutPktsUntagged Statistic */ 211 volatile uint32_t ifomps; /**< ifOutMulticastPkts Statistic */ 212 volatile uint32_t ifobps; /**< ifOutBroadcastPkts Statistic */ 213 volatile uint32_t txsccfg; /**< TX Secure Channel configuration */ 214 volatile uint32_t optls; /**< OutPktsTooLong Statistic */ 215 volatile uint8_t res11[16]; /**< reserved */ 216 volatile uint32_t oop1hs; /**< OutOctetsProtected first half Statistic */ 217 volatile uint32_t oop2hs; /**< OutOctetsProtected second half Statistic */ 218 volatile uint32_t ooe1hs; /**< OutOctetsEncrypted first half Statistic */ 219 volatile uint32_t ooe2hs; /**< OutOctetsEncrypted second half Statistic */ 220 volatile uint8_t res12[48]; /**< reserved */ 221 _Packed struct 222 { 223 volatile uint32_t txsacs; /**< TX Security Association configuration and status */ 224 volatile uint32_t txsanpn; /**< TX Security Association nextPN */ 225 volatile uint32_t txsaopps; /**< TX Security Association OutPktsProtected Statistic */ 226 volatile uint32_t txsaopes; /**< TX Security Association OutPktsEncrypted Statistic */ 227 volatile uint32_t txsak[4]; /**< TX Security Association key (128 bit) */ 228 volatile uint32_t txsah[4]; /**< TX Security Association hash (128 bit) */ 229 volatile uint8_t res13[16]; /**< reserved */ 230 } _PackedType fmMacsecTxScSa[NUM_OF_SA_PER_TX_SC]; 231 volatile uint8_t res14[248]; /**< reserved */ 232 233 /* Global configuration and status */ 234 volatile uint32_t ip_rev1; /**< MACsec IP Block Revision 1 register */ 235 volatile uint32_t ip_rev2; /**< MACsec IP Block Revision 2 register */ 236 volatile uint32_t evr; /**< MACsec Event Register */ 237 volatile uint32_t ever; /**< MACsec Event Enable Register */ 238 volatile uint32_t evfr; /**< MACsec Event Force Register */ 239 volatile uint32_t err; /**< MACsec Error Register */ 240 volatile uint32_t erer; /**< MACsec Error Enable Register */ 241 volatile uint32_t erfr; /**< MACsec Error Force Register */ 242 volatile uint8_t res15[40]; /**< reserved */ 243 volatile uint32_t meec; /**< MACsec Memory ECC Error Capture Register */ 244 volatile uint32_t idle; /**< MACsec Idle status Register */ 245 volatile uint8_t res16[184]; /**< reserved */ 246 /* DEBUG */ 247 volatile uint32_t rxec; /**< MACsec RX error capture Register */ 248 volatile uint8_t res17[28]; /**< reserved */ 249 volatile uint32_t txec; /**< MACsec TX error capture Register */ 250 volatile uint8_t res18[220]; /**< reserved */ 251 252 /* Macsec Rx global statistic */ 253 volatile uint32_t ifiocp1hs; /**< ifInOctetsCp first half Statistic */ 254 volatile uint32_t ifiocp2hs; /**< ifInOctetsCp second half Statistic */ 255 volatile uint32_t ifiupcps; /**< ifInUcastPktsCp Statistic */ 256 volatile uint8_t res19[4]; /**< reserved */ 257 volatile uint32_t ifioup1hs; /**< ifInOctetsUp first half Statistic */ 258 volatile uint32_t ifioup2hs; /**< ifInOctetsUp second half Statistic */ 259 volatile uint32_t ifiupups; /**< ifInUcastPktsUp Statistic */ 260 volatile uint8_t res20[4]; /**< reserved */ 261 volatile uint32_t ifimpcps; /**< ifInMulticastPktsCp Statistic */ 262 volatile uint32_t ifibpcps; /**< ifInBroadcastPktsCp Statistic */ 263 volatile uint32_t ifimpups; /**< ifInMulticastPktsUp Statistic */ 264 volatile uint32_t ifibpups; /**< ifInBroadcastPktsUp Statistic */ 265 volatile uint32_t ipwts; /**< InPktsWithoutTag Statistic */ 266 volatile uint32_t ipkays; /**< InPktsKaY Statistic */ 267 volatile uint32_t ipbts; /**< InPktsBadTag Statistic */ 268 volatile uint32_t ipsnfs; /**< InPktsSCINotFound Statistic */ 269 volatile uint32_t ipuecs; /**< InPktsUnsupportedEC Statistic */ 270 volatile uint32_t ipescbs; /**< InPktsEponSingleCopyBroadcast Statistic */ 271 volatile uint32_t iptls; /**< InPktsTooLong Statistic */ 272 volatile uint8_t res21[52]; /**< reserved */ 273 274 /* Macsec Tx global statistic */ 275 volatile uint32_t opds; /**< OutPktsDiscarded Statistic */ 276 #if (DPAA_VERSION >= 11) 277 volatile uint8_t res22[124]; /**< reserved */ 278 _Packed struct 279 { 280 volatile uint32_t rxsak[8]; /**< RX Security Association key (128/256 bit) */ 281 volatile uint8_t res23[32]; /**< reserved */ 282 } _PackedType rxScSaKey[NUM_OF_SA_PER_RX_SC]; 283 _Packed struct 284 { 285 volatile uint32_t txsak[8]; /**< TX Security Association key (128/256 bit) */ 286 volatile uint8_t res24[32]; /**< reserved */ 287 } _PackedType txScSaKey[NUM_OF_SA_PER_TX_SC]; 288 #endif /* (DPAA_VERSION >= 11) */ 289 } _PackedType t_FmMacsecRegs; 290 291 #if defined(__MWERKS__) && !defined(__GNUC__) 292 #pragma pack(pop) 293 #endif /* defined(__MWERKS__) && ... */ 294 295 296 /**************************************************************************//** 297 @Description General defines 298 *//***************************************************************************/ 299 300 #define SCI_HIGH_MASK 0xffffffff00000000LL 301 #define SCI_LOW_MASK 0x00000000ffffffffLL 302 303 #define LONG_SHIFT 32 304 305 #define GET_SCI_FIRST_HALF(sci) (uint32_t)((macsecSCI_t)((macsecSCI_t)(sci) & SCI_HIGH_MASK) >> LONG_SHIFT) 306 #define GET_SCI_SECOND_HALF(sci) (uint32_t)((macsecSCI_t)(sci) & SCI_LOW_MASK) 307 308 /**************************************************************************//** 309 @Description Configuration defines 310 *//***************************************************************************/ 311 312 /* masks */ 313 #define CFG_UECT 0x00000800 314 #define CFG_ESCBT 0x00000400 315 #define CFG_USFT 0x00000300 316 #define CFG_ITT 0x00000080 317 #define CFG_KFT 0x00000040 318 #define CFG_UFT 0x00000030 319 #define CFG_KSS 0x00000004 320 #define CFG_BYPN 0x00000002 321 #define CFG_S0I 0x00000001 322 323 #define ET_TYPE 0x0000ffff 324 325 #define MFL_MAX_LEN 0x0000ffff 326 327 #define RXSCA_SC_SEL 0x0000000f 328 329 #define TXSCA_SC_SEL 0x0000000f 330 331 #define IP_REV_1_IP_ID 0xffff0000 332 #define IP_REV_1_IP_MJ 0x0000ff00 333 #define IP_REV_1_IP_MM 0x000000ff 334 335 #define IP_REV_2_IP_INT 0x00ff0000 336 #define IP_REV_2_IP_ERR 0x0000ff00 337 #define IP_REV_2_IP_CFG 0x000000ff 338 339 #define MECC_CAP 0x80000000 340 #define MECC_CET 0x40000000 341 #define MECC_SERCNT 0x00ff0000 342 #define MECC_MEMADDR 0x000001ff 343 344 /* shifts */ 345 #define CFG_UECT_SHIFT (31-20) 346 #define CFG_ESCBT_SHIFT (31-21) 347 #define CFG_USFT_SHIFT (31-23) 348 #define CFG_ITT_SHIFT (31-24) 349 #define CFG_KFT_SHIFT (31-25) 350 #define CFG_UFT_SHIFT (31-27) 351 #define CFG_KSS_SHIFT (31-29) 352 #define CFG_BYPN_SHIFT (31-30) 353 #define CFG_S0I_SHIFT (31-31) 354 355 #define IP_REV_1_IP_ID_SHIFT (31-15) 356 #define IP_REV_1_IP_MJ_SHIFT (31-23) 357 #define IP_REV_1_IP_MM_SHIFT (31-31) 358 359 #define IP_REV_2_IP_INT_SHIFT (31-15) 360 #define IP_REV_2_IP_ERR_SHIFT (31-23) 361 #define IP_REV_2_IP_CFG_SHIFT (31-31) 362 363 #define MECC_CAP_SHIFT (31-0) 364 #define MECC_CET_SHIFT (31-1) 365 #define MECC_SERCNT_SHIFT (31-15) 366 #define MECC_MEMADDR_SHIFT (31-31) 367 368 /**************************************************************************//** 369 @Description RX SC defines 370 *//***************************************************************************/ 371 372 /* masks */ 373 #define RX_SCCFG_SCI_EN_MASK 0x00000800 374 #define RX_SCCFG_RP_MASK 0x00000400 375 #define RX_SCCFG_VF_MASK 0x00000300 376 #define RX_SCCFG_CO_MASK 0x0000003f 377 378 /* shifts */ 379 #define RX_SCCFG_SCI_EN_SHIFT (31-20) 380 #define RX_SCCFG_RP_SHIFT (31-21) 381 #define RX_SCCFG_VF_SHIFT (31-23) 382 #define RX_SCCFG_CO_SHIFT (31-31) 383 #define RX_SCCFG_CS_SHIFT (31-7) 384 385 /**************************************************************************//** 386 @Description RX SA defines 387 *//***************************************************************************/ 388 389 /* masks */ 390 #define RX_SACFG_ACTIVE 0x80000000 391 #define RX_SACFG_AN_MASK 0x00000006 392 #define RX_SACFG_EN_MASK 0x00000001 393 394 /* shifts */ 395 #define RX_SACFG_AN_SHIFT (31-30) 396 #define RX_SACFG_EN_SHIFT (31-31) 397 398 /**************************************************************************//** 399 @Description TX SC defines 400 *//***************************************************************************/ 401 402 /* masks */ 403 #define TX_SCCFG_AN_MASK 0x000c0000 404 #define TX_SCCFG_ASA_MASK 0x00020000 405 #define TX_SCCFG_SCE_MASK 0x00010000 406 #define TX_SCCFG_CO_MASK 0x00003f00 407 #define TX_SCCFG_CE_MASK 0x00000010 408 #define TX_SCCFG_PF_MASK 0x00000008 409 #define TX_SCCFG_AIS_MASK 0x00000004 410 #define TX_SCCFG_UES_MASK 0x00000002 411 #define TX_SCCFG_USCB_MASK 0x00000001 412 413 /* shifts */ 414 #define TX_SCCFG_AN_SHIFT (31-13) 415 #define TX_SCCFG_ASA_SHIFT (31-14) 416 #define TX_SCCFG_SCE_SHIFT (31-15) 417 #define TX_SCCFG_CO_SHIFT (31-23) 418 #define TX_SCCFG_CE_SHIFT (31-27) 419 #define TX_SCCFG_PF_SHIFT (31-28) 420 #define TX_SCCFG_AIS_SHIFT (31-29) 421 #define TX_SCCFG_UES_SHIFT (31-30) 422 #define TX_SCCFG_USCB_SHIFT (31-31) 423 #define TX_SCCFG_CS_SHIFT (31-7) 424 425 /**************************************************************************//** 426 @Description TX SA defines 427 *//***************************************************************************/ 428 429 /* masks */ 430 #define TX_SACFG_ACTIVE 0x80000000 431 432 433 typedef struct 434 { 435 void (*f_Isr) (t_Handle h_Arg, uint32_t id); 436 t_Handle h_SrcHandle; 437 } t_FmMacsecIntrSrc; 438 439 typedef struct 440 { 441 e_FmMacsecUnknownSciFrameTreatment unknownSciTreatMode; 442 bool invalidTagsDeliverUncontrolled; 443 bool changedTextWithNoEncryptDeliverUncontrolled; 444 bool onlyScbIsSetDeliverUncontrolled; 445 bool encryptWithNoChangedTextDiscardUncontrolled; 446 e_FmMacsecUntagFrameTreatment untagTreatMode; 447 uint32_t pnExhThr; 448 bool keysUnreadable; 449 bool byPassMode; 450 bool reservedSc0; 451 uint32_t sectagOverhead; 452 uint32_t mflSubtract; 453 } t_FmMacsecDriverParam; 454 455 typedef struct 456 { 457 t_FmMacsecControllerDriver fmMacsecControllerDriver; 458 t_Handle h_Fm; 459 t_FmMacsecRegs *p_FmMacsecRegs; 460 t_Handle h_FmMac; /**< A handle to the FM MAC object related to */ 461 char fmMacsecModuleName[MODULE_NAME_SIZE]; 462 t_FmMacsecIntrSrc intrMng[NUM_OF_INTER_MODULE_EVENTS]; 463 uint32_t events; 464 uint32_t exceptions; 465 uint32_t userExceptions; 466 t_FmMacsecExceptionsCallback *f_Exception; /**< Exception Callback Routine */ 467 t_Handle h_App; /**< A handle to an application layer object; This handle will 468 be passed by the driver upon calling the above callbacks */ 469 bool rxScTable[NUM_OF_RX_SC]; 470 uint32_t numRxScAvailable; 471 bool txScTable[NUM_OF_TX_SC]; 472 uint32_t numTxScAvailable; 473 t_Handle rxScSpinLock; 474 t_Handle txScSpinLock; 475 t_FmMacsecDriverParam *p_FmMacsecDriverParam; 476 } t_FmMacsec; 477 478 479 #endif /* __FM_MACSEC_MASTER_H */ 480