1 /* Copyright (c) 2008-2011 Freescale Semiconductor, Inc. 2 * All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright 9 * notice, this list of conditions and the following disclaimer in the 10 * documentation and/or other materials provided with the distribution. 11 * * Neither the name of Freescale Semiconductor nor the 12 * names of its contributors may be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * 16 * ALTERNATIVELY, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") as published by the Free Software 18 * Foundation, either version 2 of that License or (at your option) any 19 * later version. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef __TGEC_MII_ACC_H 34 #define __TGEC_MII_ACC_H 35 36 #include "std_ext.h" 37 38 39 /* MII Management Command Register */ 40 #define MIIMCOM_READ_POST_INCREMENT 0x00004000 41 #define MIIMCOM_READ_CYCLE 0x00008000 42 #define MIIMCOM_SCAN_CYCLE 0x00000800 43 #define MIIMCOM_PREAMBLE_DISABLE 0x00000400 44 45 #define MIIMCOM_MDIO_HOLD_1_REG_CLK 0 46 #define MIIMCOM_MDIO_HOLD_2_REG_CLK 1 47 #define MIIMCOM_MDIO_HOLD_3_REG_CLK 2 48 #define MIIMCOM_MDIO_HOLD_4_REG_CLK 3 49 50 #define MIIMCOM_DIV_MASK 0x0000ff00 51 #define MIIMCOM_DIV_SHIFT 8 52 53 /* MII Management Indicator Register */ 54 #define MIIMIND_BUSY 0x00000001 55 #define MIIMIND_READ_ERROR 0x00000002 56 57 #define MIIDATA_BUSY 0x80000000 58 59 #if defined(__MWERKS__) && !defined(__GNUC__) 60 #pragma pack(push,1) 61 #endif /* defined(__MWERKS__) && ... */ 62 #define MEM_MAP_START 63 64 /*----------------------------------------------------*/ 65 /* MII Configuration Control Memory Map Registers */ 66 /*----------------------------------------------------*/ 67 typedef _Packed struct t_TgecMiiAccessMemMap 68 { 69 volatile uint32_t mdio_cfg_status; /* 0x030 */ 70 volatile uint32_t mdio_command; /* 0x034 */ 71 volatile uint32_t mdio_data; /* 0x038 */ 72 volatile uint32_t mdio_regaddr; /* 0x03c */ 73 } _PackedType t_TgecMiiAccessMemMap ; 74 75 #define MEM_MAP_END 76 #if defined(__MWERKS__) && !defined(__GNUC__) 77 #pragma pack(pop) 78 #endif /* defined(__MWERKS__) && ... */ 79 80 81 #endif /* __TGEC_MII_ACC_H */ 82