xref: /freebsd/sys/contrib/ncsw/Peripherals/FM/MAC/memac.h (revision c2c014f24c10f90d85126ac5fbd4d8524de32b1c)
1*852ba100SJustin Hibbits /*
2*852ba100SJustin Hibbits  * Copyright 2008-2012 Freescale Semiconductor Inc.
3*852ba100SJustin Hibbits  *
4*852ba100SJustin Hibbits  * Redistribution and use in source and binary forms, with or without
5*852ba100SJustin Hibbits  * modification, are permitted provided that the following conditions are met:
6*852ba100SJustin Hibbits  *     * Redistributions of source code must retain the above copyright
7*852ba100SJustin Hibbits  *       notice, this list of conditions and the following disclaimer.
8*852ba100SJustin Hibbits  *     * Redistributions in binary form must reproduce the above copyright
9*852ba100SJustin Hibbits  *       notice, this list of conditions and the following disclaimer in the
10*852ba100SJustin Hibbits  *       documentation and/or other materials provided with the distribution.
11*852ba100SJustin Hibbits  *     * Neither the name of Freescale Semiconductor nor the
12*852ba100SJustin Hibbits  *       names of its contributors may be used to endorse or promote products
13*852ba100SJustin Hibbits  *       derived from this software without specific prior written permission.
14*852ba100SJustin Hibbits  *
15*852ba100SJustin Hibbits  *
16*852ba100SJustin Hibbits  * ALTERNATIVELY, this software may be distributed under the terms of the
17*852ba100SJustin Hibbits  * GNU General Public License ("GPL") as published by the Free Software
18*852ba100SJustin Hibbits  * Foundation, either version 2 of that License or (at your option) any
19*852ba100SJustin Hibbits  * later version.
20*852ba100SJustin Hibbits  *
21*852ba100SJustin Hibbits  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
22*852ba100SJustin Hibbits  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23*852ba100SJustin Hibbits  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24*852ba100SJustin Hibbits  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
25*852ba100SJustin Hibbits  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26*852ba100SJustin Hibbits  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27*852ba100SJustin Hibbits  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28*852ba100SJustin Hibbits  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29*852ba100SJustin Hibbits  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30*852ba100SJustin Hibbits  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31*852ba100SJustin Hibbits  */
32*852ba100SJustin Hibbits 
33*852ba100SJustin Hibbits 
34*852ba100SJustin Hibbits /******************************************************************************
35*852ba100SJustin Hibbits  @File          memac.h
36*852ba100SJustin Hibbits 
37*852ba100SJustin Hibbits  @Description   FM Multirate Ethernet MAC (mEMAC)
38*852ba100SJustin Hibbits *//***************************************************************************/
39*852ba100SJustin Hibbits #ifndef __MEMAC_H
40*852ba100SJustin Hibbits #define __MEMAC_H
41*852ba100SJustin Hibbits 
42*852ba100SJustin Hibbits #include "std_ext.h"
43*852ba100SJustin Hibbits #include "error_ext.h"
44*852ba100SJustin Hibbits #include "list_ext.h"
45*852ba100SJustin Hibbits 
46*852ba100SJustin Hibbits #include "fsl_fman_memac_mii_acc.h"
47*852ba100SJustin Hibbits #include "fm_mac.h"
48*852ba100SJustin Hibbits #include "fsl_fman_memac.h"
49*852ba100SJustin Hibbits 
50*852ba100SJustin Hibbits 
51*852ba100SJustin Hibbits #define MEMAC_default_exceptions    \
52*852ba100SJustin Hibbits         ((uint32_t)(MEMAC_IMASK_TSECC_ER | MEMAC_IMASK_TECC_ER | MEMAC_IMASK_RECC_ER | MEMAC_IMASK_MGI))
53*852ba100SJustin Hibbits 
54*852ba100SJustin Hibbits #define GET_EXCEPTION_FLAG(bitMask, exception)       switch (exception){    \
55*852ba100SJustin Hibbits     case e_FM_MAC_EX_10G_1TX_ECC_ER:                                        \
56*852ba100SJustin Hibbits         bitMask = MEMAC_IMASK_TECC_ER; break;                               \
57*852ba100SJustin Hibbits     case e_FM_MAC_EX_10G_RX_ECC_ER:                                         \
58*852ba100SJustin Hibbits         bitMask = MEMAC_IMASK_RECC_ER; break;                               \
59*852ba100SJustin Hibbits     case e_FM_MAC_EX_TS_FIFO_ECC_ERR:                                       \
60*852ba100SJustin Hibbits         bitMask = MEMAC_IMASK_TSECC_ER; break;                              \
61*852ba100SJustin Hibbits     case e_FM_MAC_EX_MAGIC_PACKET_INDICATION:                               \
62*852ba100SJustin Hibbits         bitMask = MEMAC_IMASK_MGI; break;                                   \
63*852ba100SJustin Hibbits     default: bitMask = 0;break;}
64*852ba100SJustin Hibbits 
65*852ba100SJustin Hibbits 
66*852ba100SJustin Hibbits typedef struct
67*852ba100SJustin Hibbits {
68*852ba100SJustin Hibbits     t_FmMacControllerDriver     fmMacControllerDriver;               /**< Upper Mac control block */
69*852ba100SJustin Hibbits     t_Handle                    h_App;                               /**< Handle to the upper layer application  */
70*852ba100SJustin Hibbits     struct memac_regs           *p_MemMap;                           /**< Pointer to MAC memory mapped registers */
71*852ba100SJustin Hibbits     struct memac_mii_access_mem_map *p_MiiMemMap;                        /**< Pointer to MII memory mapped registers */
72*852ba100SJustin Hibbits     uint64_t                    addr;                                /**< MAC address of device */
73*852ba100SJustin Hibbits     e_EnetMode                  enetMode;                            /**< Ethernet physical interface  */
74*852ba100SJustin Hibbits     t_FmMacExceptionCallback    *f_Exception;
75*852ba100SJustin Hibbits     int                         mdioIrq;
76*852ba100SJustin Hibbits     t_FmMacExceptionCallback    *f_Event;
77*852ba100SJustin Hibbits     bool                        indAddrRegUsed[MEMAC_NUM_OF_PADDRS]; /**< Whether a particular individual address recognition register is being used */
78*852ba100SJustin Hibbits     uint64_t                    paddr[MEMAC_NUM_OF_PADDRS];          /**< MAC address for particular individual address recognition register */
79*852ba100SJustin Hibbits     uint8_t                     numOfIndAddrInRegs;                  /**< Number of individual addresses in registers for this station. */
80*852ba100SJustin Hibbits     t_EthHash                   *p_MulticastAddrHash;                /**< Pointer to driver's global address hash table  */
81*852ba100SJustin Hibbits     t_EthHash                   *p_UnicastAddrHash;                  /**< Pointer to driver's individual address hash table  */
82*852ba100SJustin Hibbits     bool                        debugMode;
83*852ba100SJustin Hibbits     uint8_t                     macId;
84*852ba100SJustin Hibbits     uint32_t                    exceptions;
85*852ba100SJustin Hibbits     struct memac_cfg            *p_MemacDriverParam;
86*852ba100SJustin Hibbits } t_Memac;
87*852ba100SJustin Hibbits 
88*852ba100SJustin Hibbits 
89*852ba100SJustin Hibbits /* Internal PHY access */
90*852ba100SJustin Hibbits #define PHY_MDIO_ADDR               0
91*852ba100SJustin Hibbits 
92*852ba100SJustin Hibbits /* Internal PHY Registers - SGMII */
93*852ba100SJustin Hibbits #define PHY_SGMII_CR_PHY_RESET          0x8000
94*852ba100SJustin Hibbits #define PHY_SGMII_CR_RESET_AN           0x0200
95*852ba100SJustin Hibbits #define PHY_SGMII_CR_DEF_VAL            0x1140
96*852ba100SJustin Hibbits #define PHY_SGMII_DEV_ABILITY_SGMII     0x4001
97*852ba100SJustin Hibbits #define PHY_SGMII_DEV_ABILITY_1000X     0x01A0
98*852ba100SJustin Hibbits #define PHY_SGMII_IF_SPEED_GIGABIT	0x0008
99*852ba100SJustin Hibbits #define PHY_SGMII_IF_MODE_AN            0x0002
100*852ba100SJustin Hibbits #define PHY_SGMII_IF_MODE_SGMII         0x0001
101*852ba100SJustin Hibbits #define PHY_SGMII_IF_MODE_1000X         0x0000
102*852ba100SJustin Hibbits 
103*852ba100SJustin Hibbits 
104*852ba100SJustin Hibbits #define MEMAC_TO_MII_OFFSET         0x030       /* Offset from the MEM map to the MDIO mem map */
105*852ba100SJustin Hibbits 
106*852ba100SJustin Hibbits t_Error MEMAC_MII_WritePhyReg(t_Handle h_Memac, uint8_t phyAddr, uint8_t reg, uint16_t data);
107*852ba100SJustin Hibbits t_Error MEMAC_MII_ReadPhyReg(t_Handle h_Memac,  uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
108*852ba100SJustin Hibbits 
109*852ba100SJustin Hibbits 
110*852ba100SJustin Hibbits #endif /* __MEMAC_H */
111