1 /** @file 2 ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January, 2016. 3 4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR> 5 Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR> 6 (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR> 7 This program and the accompanying materials 8 are licensed and made available under the terms and conditions of the BSD License 9 which accompanies this distribution. The full text of the license may be found at 10 http://opensource.org/licenses/bsd-license.php 11 12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 **/ 15 16 #ifndef _ACPI_5_1_H_ 17 #define _ACPI_5_1_H_ 18 19 #include <IndustryStandard/Acpi50.h> 20 21 // 22 // Ensure proper structure formats 23 // 24 #pragma pack(1) 25 26 /// 27 /// ACPI 5.1 Generic Address Space definition 28 /// 29 typedef struct { 30 UINT8 AddressSpaceId; 31 UINT8 RegisterBitWidth; 32 UINT8 RegisterBitOffset; 33 UINT8 AccessSize; 34 UINT64 Address; 35 } EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE; 36 37 // 38 // Generic Address Space Address IDs 39 // 40 #define EFI_ACPI_5_1_SYSTEM_MEMORY 0 41 #define EFI_ACPI_5_1_SYSTEM_IO 1 42 #define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2 43 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3 44 #define EFI_ACPI_5_1_SMBUS 4 45 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A 46 #define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F 47 48 // 49 // Generic Address Space Access Sizes 50 // 51 #define EFI_ACPI_5_1_UNDEFINED 0 52 #define EFI_ACPI_5_1_BYTE 1 53 #define EFI_ACPI_5_1_WORD 2 54 #define EFI_ACPI_5_1_DWORD 3 55 #define EFI_ACPI_5_1_QWORD 4 56 57 // 58 // ACPI 5.1 table structures 59 // 60 61 /// 62 /// Root System Description Pointer Structure 63 /// 64 typedef struct { 65 UINT64 Signature; 66 UINT8 Checksum; 67 UINT8 OemId[6]; 68 UINT8 Revision; 69 UINT32 RsdtAddress; 70 UINT32 Length; 71 UINT64 XsdtAddress; 72 UINT8 ExtendedChecksum; 73 UINT8 Reserved[3]; 74 } EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER; 75 76 /// 77 /// RSD_PTR Revision (as defined in ACPI 5.1 spec.) 78 /// 79 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2 80 81 /// 82 /// Common table header, this prefaces all ACPI tables, including FACS, but 83 /// excluding the RSD PTR structure 84 /// 85 typedef struct { 86 UINT32 Signature; 87 UINT32 Length; 88 } EFI_ACPI_5_1_COMMON_HEADER; 89 90 // 91 // Root System Description Table 92 // No definition needed as it is a common description table header, the same with 93 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. 94 // 95 96 /// 97 /// RSDT Revision (as defined in ACPI 5.1 spec.) 98 /// 99 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 100 101 // 102 // Extended System Description Table 103 // No definition needed as it is a common description table header, the same with 104 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. 105 // 106 107 /// 108 /// XSDT Revision (as defined in ACPI 5.1 spec.) 109 /// 110 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 111 112 /// 113 /// Fixed ACPI Description Table Structure (FADT) 114 /// 115 typedef struct { 116 EFI_ACPI_DESCRIPTION_HEADER Header; 117 UINT32 FirmwareCtrl; 118 UINT32 Dsdt; 119 UINT8 Reserved0; 120 UINT8 PreferredPmProfile; 121 UINT16 SciInt; 122 UINT32 SmiCmd; 123 UINT8 AcpiEnable; 124 UINT8 AcpiDisable; 125 UINT8 S4BiosReq; 126 UINT8 PstateCnt; 127 UINT32 Pm1aEvtBlk; 128 UINT32 Pm1bEvtBlk; 129 UINT32 Pm1aCntBlk; 130 UINT32 Pm1bCntBlk; 131 UINT32 Pm2CntBlk; 132 UINT32 PmTmrBlk; 133 UINT32 Gpe0Blk; 134 UINT32 Gpe1Blk; 135 UINT8 Pm1EvtLen; 136 UINT8 Pm1CntLen; 137 UINT8 Pm2CntLen; 138 UINT8 PmTmrLen; 139 UINT8 Gpe0BlkLen; 140 UINT8 Gpe1BlkLen; 141 UINT8 Gpe1Base; 142 UINT8 CstCnt; 143 UINT16 PLvl2Lat; 144 UINT16 PLvl3Lat; 145 UINT16 FlushSize; 146 UINT16 FlushStride; 147 UINT8 DutyOffset; 148 UINT8 DutyWidth; 149 UINT8 DayAlrm; 150 UINT8 MonAlrm; 151 UINT8 Century; 152 UINT16 IaPcBootArch; 153 UINT8 Reserved1; 154 UINT32 Flags; 155 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg; 156 UINT8 ResetValue; 157 UINT16 ArmBootArch; 158 UINT8 MinorVersion; 159 UINT64 XFirmwareCtrl; 160 UINT64 XDsdt; 161 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 162 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 163 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 164 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 165 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 166 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 167 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 168 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 169 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg; 170 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; 171 } EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE; 172 173 /// 174 /// FADT Version (as defined in ACPI 5.1 spec.) 175 /// 176 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05 177 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01 178 179 // 180 // Fixed ACPI Description Table Preferred Power Management Profile 181 // 182 #define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0 183 #define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1 184 #define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2 185 #define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3 186 #define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4 187 #define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5 188 #define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6 189 #define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7 190 #define EFI_ACPI_5_1_PM_PROFILE_TABLET 8 191 192 // 193 // Fixed ACPI Description Table Boot Architecture Flags 194 // All other bits are reserved and must be set to 0. 195 // 196 #define EFI_ACPI_5_1_LEGACY_DEVICES BIT0 197 #define EFI_ACPI_5_1_8042 BIT1 198 #define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2 199 #define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3 200 #define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4 201 #define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5 202 203 // 204 // Fixed ACPI Description Table Arm Boot Architecture Flags 205 // All other bits are reserved and must be set to 0. 206 // 207 #define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0 208 #define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1 209 210 // 211 // Fixed ACPI Description Table Fixed Feature Flags 212 // All other bits are reserved and must be set to 0. 213 // 214 #define EFI_ACPI_5_1_WBINVD BIT0 215 #define EFI_ACPI_5_1_WBINVD_FLUSH BIT1 216 #define EFI_ACPI_5_1_PROC_C1 BIT2 217 #define EFI_ACPI_5_1_P_LVL2_UP BIT3 218 #define EFI_ACPI_5_1_PWR_BUTTON BIT4 219 #define EFI_ACPI_5_1_SLP_BUTTON BIT5 220 #define EFI_ACPI_5_1_FIX_RTC BIT6 221 #define EFI_ACPI_5_1_RTC_S4 BIT7 222 #define EFI_ACPI_5_1_TMR_VAL_EXT BIT8 223 #define EFI_ACPI_5_1_DCK_CAP BIT9 224 #define EFI_ACPI_5_1_RESET_REG_SUP BIT10 225 #define EFI_ACPI_5_1_SEALED_CASE BIT11 226 #define EFI_ACPI_5_1_HEADLESS BIT12 227 #define EFI_ACPI_5_1_CPU_SW_SLP BIT13 228 #define EFI_ACPI_5_1_PCI_EXP_WAK BIT14 229 #define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15 230 #define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16 231 #define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17 232 #define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18 233 #define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 234 #define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20 235 #define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21 236 237 /// 238 /// Firmware ACPI Control Structure 239 /// 240 typedef struct { 241 UINT32 Signature; 242 UINT32 Length; 243 UINT32 HardwareSignature; 244 UINT32 FirmwareWakingVector; 245 UINT32 GlobalLock; 246 UINT32 Flags; 247 UINT64 XFirmwareWakingVector; 248 UINT8 Version; 249 UINT8 Reserved0[3]; 250 UINT32 OspmFlags; 251 UINT8 Reserved1[24]; 252 } EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE; 253 254 /// 255 /// FACS Version (as defined in ACPI 5.1 spec.) 256 /// 257 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 258 259 /// 260 /// Firmware Control Structure Feature Flags 261 /// All other bits are reserved and must be set to 0. 262 /// 263 #define EFI_ACPI_5_1_S4BIOS_F BIT0 264 #define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1 265 266 /// 267 /// OSPM Enabled Firmware Control Structure Flags 268 /// All other bits are reserved and must be set to 0. 269 /// 270 #define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0 271 272 // 273 // Differentiated System Description Table, 274 // Secondary System Description Table 275 // and Persistent System Description Table, 276 // no definition needed as they are common description table header, the same with 277 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. 278 // 279 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 280 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 281 282 /// 283 /// Multiple APIC Description Table header definition. The rest of the table 284 /// must be defined in a platform specific manner. 285 /// 286 typedef struct { 287 EFI_ACPI_DESCRIPTION_HEADER Header; 288 UINT32 LocalApicAddress; 289 UINT32 Flags; 290 } EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; 291 292 /// 293 /// MADT Revision (as defined in ACPI 5.1 spec.) 294 /// 295 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03 296 297 /// 298 /// Multiple APIC Flags 299 /// All other bits are reserved and must be set to 0. 300 /// 301 #define EFI_ACPI_5_1_PCAT_COMPAT BIT0 302 303 // 304 // Multiple APIC Description Table APIC structure types 305 // All other values between 0x0D and 0x7F are reserved and 306 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. 307 // 308 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00 309 #define EFI_ACPI_5_1_IO_APIC 0x01 310 #define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02 311 #define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03 312 #define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04 313 #define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 314 #define EFI_ACPI_5_1_IO_SAPIC 0x06 315 #define EFI_ACPI_5_1_LOCAL_SAPIC 0x07 316 #define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08 317 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09 318 #define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A 319 #define EFI_ACPI_5_1_GIC 0x0B 320 #define EFI_ACPI_5_1_GICD 0x0C 321 #define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D 322 #define EFI_ACPI_5_1_GICR 0x0E 323 324 // 325 // APIC Structure Definitions 326 // 327 328 /// 329 /// Processor Local APIC Structure Definition 330 /// 331 typedef struct { 332 UINT8 Type; 333 UINT8 Length; 334 UINT8 AcpiProcessorId; 335 UINT8 ApicId; 336 UINT32 Flags; 337 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE; 338 339 /// 340 /// Local APIC Flags. All other bits are reserved and must be 0. 341 /// 342 #define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0 343 344 /// 345 /// IO APIC Structure 346 /// 347 typedef struct { 348 UINT8 Type; 349 UINT8 Length; 350 UINT8 IoApicId; 351 UINT8 Reserved; 352 UINT32 IoApicAddress; 353 UINT32 GlobalSystemInterruptBase; 354 } EFI_ACPI_5_1_IO_APIC_STRUCTURE; 355 356 /// 357 /// Interrupt Source Override Structure 358 /// 359 typedef struct { 360 UINT8 Type; 361 UINT8 Length; 362 UINT8 Bus; 363 UINT8 Source; 364 UINT32 GlobalSystemInterrupt; 365 UINT16 Flags; 366 } EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; 367 368 /// 369 /// Platform Interrupt Sources Structure Definition 370 /// 371 typedef struct { 372 UINT8 Type; 373 UINT8 Length; 374 UINT16 Flags; 375 UINT8 InterruptType; 376 UINT8 ProcessorId; 377 UINT8 ProcessorEid; 378 UINT8 IoSapicVector; 379 UINT32 GlobalSystemInterrupt; 380 UINT32 PlatformInterruptSourceFlags; 381 UINT8 CpeiProcessorOverride; 382 UINT8 Reserved[31]; 383 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE; 384 385 // 386 // MPS INTI flags. 387 // All other bits are reserved and must be set to 0. 388 // 389 #define EFI_ACPI_5_1_POLARITY (3 << 0) 390 #define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2) 391 392 /// 393 /// Non-Maskable Interrupt Source Structure 394 /// 395 typedef struct { 396 UINT8 Type; 397 UINT8 Length; 398 UINT16 Flags; 399 UINT32 GlobalSystemInterrupt; 400 } EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; 401 402 /// 403 /// Local APIC NMI Structure 404 /// 405 typedef struct { 406 UINT8 Type; 407 UINT8 Length; 408 UINT8 AcpiProcessorId; 409 UINT16 Flags; 410 UINT8 LocalApicLint; 411 } EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE; 412 413 /// 414 /// Local APIC Address Override Structure 415 /// 416 typedef struct { 417 UINT8 Type; 418 UINT8 Length; 419 UINT16 Reserved; 420 UINT64 LocalApicAddress; 421 } EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; 422 423 /// 424 /// IO SAPIC Structure 425 /// 426 typedef struct { 427 UINT8 Type; 428 UINT8 Length; 429 UINT8 IoApicId; 430 UINT8 Reserved; 431 UINT32 GlobalSystemInterruptBase; 432 UINT64 IoSapicAddress; 433 } EFI_ACPI_5_1_IO_SAPIC_STRUCTURE; 434 435 /// 436 /// Local SAPIC Structure 437 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 438 /// 439 typedef struct { 440 UINT8 Type; 441 UINT8 Length; 442 UINT8 AcpiProcessorId; 443 UINT8 LocalSapicId; 444 UINT8 LocalSapicEid; 445 UINT8 Reserved[3]; 446 UINT32 Flags; 447 UINT32 ACPIProcessorUIDValue; 448 } EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE; 449 450 /// 451 /// Platform Interrupt Sources Structure 452 /// 453 typedef struct { 454 UINT8 Type; 455 UINT8 Length; 456 UINT16 Flags; 457 UINT8 InterruptType; 458 UINT8 ProcessorId; 459 UINT8 ProcessorEid; 460 UINT8 IoSapicVector; 461 UINT32 GlobalSystemInterrupt; 462 UINT32 PlatformInterruptSourceFlags; 463 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; 464 465 /// 466 /// Platform Interrupt Source Flags. 467 /// All other bits are reserved and must be set to 0. 468 /// 469 #define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0 470 471 /// 472 /// Processor Local x2APIC Structure Definition 473 /// 474 typedef struct { 475 UINT8 Type; 476 UINT8 Length; 477 UINT8 Reserved[2]; 478 UINT32 X2ApicId; 479 UINT32 Flags; 480 UINT32 AcpiProcessorUid; 481 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE; 482 483 /// 484 /// Local x2APIC NMI Structure 485 /// 486 typedef struct { 487 UINT8 Type; 488 UINT8 Length; 489 UINT16 Flags; 490 UINT32 AcpiProcessorUid; 491 UINT8 LocalX2ApicLint; 492 UINT8 Reserved[3]; 493 } EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE; 494 495 /// 496 /// GIC Structure 497 /// 498 typedef struct { 499 UINT8 Type; 500 UINT8 Length; 501 UINT16 Reserved; 502 UINT32 CPUInterfaceNumber; 503 UINT32 AcpiProcessorUid; 504 UINT32 Flags; 505 UINT32 ParkingProtocolVersion; 506 UINT32 PerformanceInterruptGsiv; 507 UINT64 ParkedAddress; 508 UINT64 PhysicalBaseAddress; 509 UINT64 GICV; 510 UINT64 GICH; 511 UINT32 VGICMaintenanceInterrupt; 512 UINT64 GICRBaseAddress; 513 UINT64 MPIDR; 514 } EFI_ACPI_5_1_GIC_STRUCTURE; 515 516 /// 517 /// GIC Flags. All other bits are reserved and must be 0. 518 /// 519 #define EFI_ACPI_5_1_GIC_ENABLED BIT0 520 #define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1 521 #define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2 522 523 /// 524 /// GIC Distributor Structure 525 /// 526 typedef struct { 527 UINT8 Type; 528 UINT8 Length; 529 UINT16 Reserved1; 530 UINT32 GicId; 531 UINT64 PhysicalBaseAddress; 532 UINT32 SystemVectorBase; 533 UINT8 GicVersion; 534 UINT8 Reserved2[3]; 535 } EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE; 536 537 /// 538 /// GIC Version 539 /// 540 #define EFI_ACPI_5_1_GIC_V1 0x01 541 #define EFI_ACPI_5_1_GIC_V2 0x02 542 #define EFI_ACPI_5_1_GIC_V3 0x03 543 #define EFI_ACPI_5_1_GIC_V4 0x04 544 545 /// 546 /// GIC MSI Frame Structure 547 /// 548 typedef struct { 549 UINT8 Type; 550 UINT8 Length; 551 UINT16 Reserved1; 552 UINT32 GicMsiFrameId; 553 UINT64 PhysicalBaseAddress; 554 UINT32 Flags; 555 UINT16 SPICount; 556 UINT16 SPIBase; 557 } EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE; 558 559 /// 560 /// GIC MSI Frame Flags. All other bits are reserved and must be 0. 561 /// 562 #define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0 563 564 /// 565 /// GICR Structure 566 /// 567 typedef struct { 568 UINT8 Type; 569 UINT8 Length; 570 UINT16 Reserved; 571 UINT64 DiscoveryRangeBaseAddress; 572 UINT32 DiscoveryRangeLength; 573 } EFI_ACPI_5_1_GICR_STRUCTURE; 574 575 /// 576 /// Smart Battery Description Table (SBST) 577 /// 578 typedef struct { 579 EFI_ACPI_DESCRIPTION_HEADER Header; 580 UINT32 WarningEnergyLevel; 581 UINT32 LowEnergyLevel; 582 UINT32 CriticalEnergyLevel; 583 } EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE; 584 585 /// 586 /// SBST Version (as defined in ACPI 5.1 spec.) 587 /// 588 #define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 589 590 /// 591 /// Embedded Controller Boot Resources Table (ECDT) 592 /// The table is followed by a null terminated ASCII string that contains 593 /// a fully qualified reference to the name space object. 594 /// 595 typedef struct { 596 EFI_ACPI_DESCRIPTION_HEADER Header; 597 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl; 598 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData; 599 UINT32 Uid; 600 UINT8 GpeBit; 601 } EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; 602 603 /// 604 /// ECDT Version (as defined in ACPI 5.1 spec.) 605 /// 606 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 607 608 /// 609 /// System Resource Affinity Table (SRAT). The rest of the table 610 /// must be defined in a platform specific manner. 611 /// 612 typedef struct { 613 EFI_ACPI_DESCRIPTION_HEADER Header; 614 UINT32 Reserved1; ///< Must be set to 1 615 UINT64 Reserved2; 616 } EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; 617 618 /// 619 /// SRAT Version (as defined in ACPI 5.1 spec.) 620 /// 621 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 622 623 // 624 // SRAT structure types. 625 // All other values between 0x04 an 0xFF are reserved and 626 // will be ignored by OSPM. 627 // 628 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 629 #define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01 630 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 631 #define EFI_ACPI_5_1_GICC_AFFINITY 0x03 632 633 /// 634 /// Processor Local APIC/SAPIC Affinity Structure Definition 635 /// 636 typedef struct { 637 UINT8 Type; 638 UINT8 Length; 639 UINT8 ProximityDomain7To0; 640 UINT8 ApicId; 641 UINT32 Flags; 642 UINT8 LocalSapicEid; 643 UINT8 ProximityDomain31To8[3]; 644 UINT32 ClockDomain; 645 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; 646 647 /// 648 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 649 /// 650 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) 651 652 /// 653 /// Memory Affinity Structure Definition 654 /// 655 typedef struct { 656 UINT8 Type; 657 UINT8 Length; 658 UINT32 ProximityDomain; 659 UINT16 Reserved1; 660 UINT32 AddressBaseLow; 661 UINT32 AddressBaseHigh; 662 UINT32 LengthLow; 663 UINT32 LengthHigh; 664 UINT32 Reserved2; 665 UINT32 Flags; 666 UINT64 Reserved3; 667 } EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE; 668 669 // 670 // Memory Flags. All other bits are reserved and must be 0. 671 // 672 #define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0) 673 #define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1) 674 #define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2) 675 676 /// 677 /// Processor Local x2APIC Affinity Structure Definition 678 /// 679 typedef struct { 680 UINT8 Type; 681 UINT8 Length; 682 UINT8 Reserved1[2]; 683 UINT32 ProximityDomain; 684 UINT32 X2ApicId; 685 UINT32 Flags; 686 UINT32 ClockDomain; 687 UINT8 Reserved2[4]; 688 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; 689 690 /// 691 /// GICC Affinity Structure Definition 692 /// 693 typedef struct { 694 UINT8 Type; 695 UINT8 Length; 696 UINT32 ProximityDomain; 697 UINT32 AcpiProcessorUid; 698 UINT32 Flags; 699 UINT32 ClockDomain; 700 } EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE; 701 702 /// 703 /// GICC Flags. All other bits are reserved and must be 0. 704 /// 705 #define EFI_ACPI_5_1_GICC_ENABLED (1 << 0) 706 707 /// 708 /// System Locality Distance Information Table (SLIT). 709 /// The rest of the table is a matrix. 710 /// 711 typedef struct { 712 EFI_ACPI_DESCRIPTION_HEADER Header; 713 UINT64 NumberOfSystemLocalities; 714 } EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; 715 716 /// 717 /// SLIT Version (as defined in ACPI 5.1 spec.) 718 /// 719 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 720 721 /// 722 /// Corrected Platform Error Polling Table (CPEP) 723 /// 724 typedef struct { 725 EFI_ACPI_DESCRIPTION_HEADER Header; 726 UINT8 Reserved[8]; 727 } EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; 728 729 /// 730 /// CPEP Version (as defined in ACPI 5.1 spec.) 731 /// 732 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 733 734 // 735 // CPEP processor structure types. 736 // 737 #define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00 738 739 /// 740 /// Corrected Platform Error Polling Processor Structure Definition 741 /// 742 typedef struct { 743 UINT8 Type; 744 UINT8 Length; 745 UINT8 ProcessorId; 746 UINT8 ProcessorEid; 747 UINT32 PollingInterval; 748 } EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; 749 750 /// 751 /// Maximum System Characteristics Table (MSCT) 752 /// 753 typedef struct { 754 EFI_ACPI_DESCRIPTION_HEADER Header; 755 UINT32 OffsetProxDomInfo; 756 UINT32 MaximumNumberOfProximityDomains; 757 UINT32 MaximumNumberOfClockDomains; 758 UINT64 MaximumPhysicalAddress; 759 } EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; 760 761 /// 762 /// MSCT Version (as defined in ACPI 5.1 spec.) 763 /// 764 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 765 766 /// 767 /// Maximum Proximity Domain Information Structure Definition 768 /// 769 typedef struct { 770 UINT8 Revision; 771 UINT8 Length; 772 UINT32 ProximityDomainRangeLow; 773 UINT32 ProximityDomainRangeHigh; 774 UINT32 MaximumProcessorCapacity; 775 UINT64 MaximumMemoryCapacity; 776 } EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; 777 778 /// 779 /// ACPI RAS Feature Table definition. 780 /// 781 typedef struct { 782 EFI_ACPI_DESCRIPTION_HEADER Header; 783 UINT8 PlatformCommunicationChannelIdentifier[12]; 784 } EFI_ACPI_5_1_RAS_FEATURE_TABLE; 785 786 /// 787 /// RASF Version (as defined in ACPI 5.1 spec.) 788 /// 789 #define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01 790 791 /// 792 /// ACPI RASF Platform Communication Channel Shared Memory Region definition. 793 /// 794 typedef struct { 795 UINT32 Signature; 796 UINT16 Command; 797 UINT16 Status; 798 UINT16 Version; 799 UINT8 RASCapabilities[16]; 800 UINT8 SetRASCapabilities[16]; 801 UINT16 NumberOfRASFParameterBlocks; 802 UINT32 SetRASCapabilitiesStatus; 803 } EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 804 805 /// 806 /// ACPI RASF PCC command code 807 /// 808 #define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01 809 810 /// 811 /// ACPI RASF Platform RAS Capabilities 812 /// 813 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01 814 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02 815 816 /// 817 /// ACPI RASF Parameter Block structure for PATROL_SCRUB 818 /// 819 typedef struct { 820 UINT16 Type; 821 UINT16 Version; 822 UINT16 Length; 823 UINT16 PatrolScrubCommand; 824 UINT64 RequestedAddressRange[2]; 825 UINT64 ActualAddressRange[2]; 826 UINT16 Flags; 827 UINT8 RequestedSpeed; 828 } EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE; 829 830 /// 831 /// ACPI RASF Patrol Scrub command 832 /// 833 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01 834 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02 835 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03 836 837 /// 838 /// Memory Power State Table definition. 839 /// 840 typedef struct { 841 EFI_ACPI_DESCRIPTION_HEADER Header; 842 UINT8 PlatformCommunicationChannelIdentifier; 843 UINT8 Reserved[3]; 844 // Memory Power Node Structure 845 // Memory Power State Characteristics 846 } EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE; 847 848 /// 849 /// MPST Version (as defined in ACPI 5.1 spec.) 850 /// 851 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01 852 853 /// 854 /// MPST Platform Communication Channel Shared Memory Region definition. 855 /// 856 typedef struct { 857 UINT32 Signature; 858 UINT16 Command; 859 UINT16 Status; 860 UINT32 MemoryPowerCommandRegister; 861 UINT32 MemoryPowerStatusRegister; 862 UINT32 PowerStateId; 863 UINT32 MemoryPowerNodeId; 864 UINT64 MemoryEnergyConsumed; 865 UINT64 ExpectedAveragePowerComsuned; 866 } EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 867 868 /// 869 /// ACPI MPST PCC command code 870 /// 871 #define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03 872 873 /// 874 /// ACPI MPST Memory Power command 875 /// 876 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01 877 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02 878 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03 879 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04 880 881 /// 882 /// MPST Memory Power Node Table 883 /// 884 typedef struct { 885 UINT8 PowerStateValue; 886 UINT8 PowerStateInformationIndex; 887 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE; 888 889 typedef struct { 890 UINT8 Flag; 891 UINT8 Reserved; 892 UINT16 MemoryPowerNodeId; 893 UINT32 Length; 894 UINT64 AddressBase; 895 UINT64 AddressLength; 896 UINT32 NumberOfPowerStates; 897 UINT32 NumberOfPhysicalComponents; 898 //EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; 899 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; 900 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE; 901 902 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01 903 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02 904 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04 905 906 typedef struct { 907 UINT16 MemoryPowerNodeCount; 908 UINT8 Reserved[2]; 909 } EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE; 910 911 /// 912 /// MPST Memory Power State Characteristics Table 913 /// 914 typedef struct { 915 UINT8 PowerStateStructureID; 916 UINT8 Flag; 917 UINT16 Reserved; 918 UINT32 AveragePowerConsumedInMPS0; 919 UINT32 RelativePowerSavingToMPS0; 920 UINT64 ExitLatencyToMPS0; 921 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE; 922 923 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01 924 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02 925 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04 926 927 typedef struct { 928 UINT16 MemoryPowerStateCharacteristicsCount; 929 UINT8 Reserved[2]; 930 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE; 931 932 /// 933 /// Memory Topology Table definition. 934 /// 935 typedef struct { 936 EFI_ACPI_DESCRIPTION_HEADER Header; 937 UINT32 Reserved; 938 } EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE; 939 940 /// 941 /// PMTT Version (as defined in ACPI 5.1 spec.) 942 /// 943 #define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01 944 945 /// 946 /// Common Memory Aggregator Device Structure. 947 /// 948 typedef struct { 949 UINT8 Type; 950 UINT8 Reserved; 951 UINT16 Length; 952 UINT16 Flags; 953 UINT16 Reserved1; 954 } EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 955 956 /// 957 /// Memory Aggregator Device Type 958 /// 959 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1 960 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2 961 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3 962 963 /// 964 /// Socket Memory Aggregator Device Structure. 965 /// 966 typedef struct { 967 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 968 UINT16 SocketIdentifier; 969 UINT16 Reserved; 970 //EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; 971 } EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 972 973 /// 974 /// MemoryController Memory Aggregator Device Structure. 975 /// 976 typedef struct { 977 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 978 UINT32 ReadLatency; 979 UINT32 WriteLatency; 980 UINT32 ReadBandwidth; 981 UINT32 WriteBandwidth; 982 UINT16 OptimalAccessUnit; 983 UINT16 OptimalAccessAlignment; 984 UINT16 Reserved; 985 UINT16 NumberOfProximityDomains; 986 //UINT32 ProximityDomain[NumberOfProximityDomains]; 987 //EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; 988 } EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 989 990 /// 991 /// DIMM Memory Aggregator Device Structure. 992 /// 993 typedef struct { 994 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 995 UINT16 PhysicalComponentIdentifier; 996 UINT16 Reserved; 997 UINT32 SizeOfDimm; 998 UINT32 SmbiosHandle; 999 } EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1000 1001 /// 1002 /// Boot Graphics Resource Table definition. 1003 /// 1004 typedef struct { 1005 EFI_ACPI_DESCRIPTION_HEADER Header; 1006 /// 1007 /// 2-bytes (16 bit) version ID. This value must be 1. 1008 /// 1009 UINT16 Version; 1010 /// 1011 /// 1-byte status field indicating current status about the table. 1012 /// Bits[7:1] = Reserved (must be zero) 1013 /// Bit [0] = Valid. A one indicates the boot image graphic is valid. 1014 /// 1015 UINT8 Status; 1016 /// 1017 /// 1-byte enumerated type field indicating format of the image. 1018 /// 0 = Bitmap 1019 /// 1 - 255 Reserved (for future use) 1020 /// 1021 UINT8 ImageType; 1022 /// 1023 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy 1024 /// of the image bitmap. 1025 /// 1026 UINT64 ImageAddress; 1027 /// 1028 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. 1029 /// (X, Y) display offset of the top left corner of the boot image. 1030 /// The top left corner of the display is at offset (0, 0). 1031 /// 1032 UINT32 ImageOffsetX; 1033 /// 1034 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. 1035 /// (X, Y) display offset of the top left corner of the boot image. 1036 /// The top left corner of the display is at offset (0, 0). 1037 /// 1038 UINT32 ImageOffsetY; 1039 } EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE; 1040 1041 /// 1042 /// BGRT Revision 1043 /// 1044 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1 1045 1046 /// 1047 /// BGRT Version 1048 /// 1049 #define EFI_ACPI_5_1_BGRT_VERSION 0x01 1050 1051 /// 1052 /// BGRT Status 1053 /// 1054 #define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00 1055 #define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01 1056 1057 /// 1058 /// BGRT Image Type 1059 /// 1060 #define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00 1061 1062 /// 1063 /// FPDT Version (as defined in ACPI 5.1 spec.) 1064 /// 1065 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01 1066 1067 /// 1068 /// FPDT Performance Record Types 1069 /// 1070 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000 1071 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001 1072 1073 /// 1074 /// FPDT Performance Record Revision 1075 /// 1076 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01 1077 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01 1078 1079 /// 1080 /// FPDT Runtime Performance Record Types 1081 /// 1082 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000 1083 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001 1084 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002 1085 1086 /// 1087 /// FPDT Runtime Performance Record Revision 1088 /// 1089 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01 1090 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01 1091 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02 1092 1093 /// 1094 /// FPDT Performance Record header 1095 /// 1096 typedef struct { 1097 UINT16 Type; 1098 UINT8 Length; 1099 UINT8 Revision; 1100 } EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER; 1101 1102 /// 1103 /// FPDT Performance Table header 1104 /// 1105 typedef struct { 1106 UINT32 Signature; 1107 UINT32 Length; 1108 } EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER; 1109 1110 /// 1111 /// FPDT Firmware Basic Boot Performance Pointer Record Structure 1112 /// 1113 typedef struct { 1114 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1115 UINT32 Reserved; 1116 /// 1117 /// 64-bit processor-relative physical address of the Basic Boot Performance Table. 1118 /// 1119 UINT64 BootPerformanceTablePointer; 1120 } EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD; 1121 1122 /// 1123 /// FPDT S3 Performance Table Pointer Record Structure 1124 /// 1125 typedef struct { 1126 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1127 UINT32 Reserved; 1128 /// 1129 /// 64-bit processor-relative physical address of the S3 Performance Table. 1130 /// 1131 UINT64 S3PerformanceTablePointer; 1132 } EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD; 1133 1134 /// 1135 /// FPDT Firmware Basic Boot Performance Record Structure 1136 /// 1137 typedef struct { 1138 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1139 UINT32 Reserved; 1140 /// 1141 /// Timer value logged at the beginning of firmware image execution. 1142 /// This may not always be zero or near zero. 1143 /// 1144 UINT64 ResetEnd; 1145 /// 1146 /// Timer value logged just prior to loading the OS boot loader into memory. 1147 /// For non-UEFI compatible boots, this field must be zero. 1148 /// 1149 UINT64 OsLoaderLoadImageStart; 1150 /// 1151 /// Timer value logged just prior to launching the previously loaded OS boot loader image. 1152 /// For non-UEFI compatible boots, the timer value logged will be just prior 1153 /// to the INT 19h handler invocation. 1154 /// 1155 UINT64 OsLoaderStartImageStart; 1156 /// 1157 /// Timer value logged at the point when the OS loader calls the 1158 /// ExitBootServices function for UEFI compatible firmware. 1159 /// For non-UEFI compatible boots, this field must be zero. 1160 /// 1161 UINT64 ExitBootServicesEntry; 1162 /// 1163 /// Timer value logged at the point just prior towhen the OS loader gaining 1164 /// control back from calls the ExitBootServices function for UEFI compatible firmware. 1165 /// For non-UEFI compatible boots, this field must be zero. 1166 /// 1167 UINT64 ExitBootServicesExit; 1168 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD; 1169 1170 /// 1171 /// FPDT Firmware Basic Boot Performance Table signature 1172 /// 1173 #define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T') 1174 1175 // 1176 // FPDT Firmware Basic Boot Performance Table 1177 // 1178 typedef struct { 1179 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; 1180 // 1181 // one or more Performance Records. 1182 // 1183 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE; 1184 1185 /// 1186 /// FPDT "S3PT" S3 Performance Table 1187 /// 1188 #define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T') 1189 1190 // 1191 // FPDT Firmware S3 Boot Performance Table 1192 // 1193 typedef struct { 1194 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; 1195 // 1196 // one or more Performance Records. 1197 // 1198 } EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE; 1199 1200 /// 1201 /// FPDT Basic S3 Resume Performance Record 1202 /// 1203 typedef struct { 1204 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1205 /// 1206 /// A count of the number of S3 resume cycles since the last full boot sequence. 1207 /// 1208 UINT32 ResumeCount; 1209 /// 1210 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the 1211 /// OS waking vector. Only the most recent resume cycle's time is retained. 1212 /// 1213 UINT64 FullResume; 1214 /// 1215 /// Average timer value of all resume cycles logged since the last full boot 1216 /// sequence, including the most recent resume. Note that the entire log of 1217 /// timer values does not need to be retained in order to calculate this average. 1218 /// 1219 UINT64 AverageResume; 1220 } EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD; 1221 1222 /// 1223 /// FPDT Basic S3 Suspend Performance Record 1224 /// 1225 typedef struct { 1226 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1227 /// 1228 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. 1229 /// Only the most recent suspend cycle's timer value is retained. 1230 /// 1231 UINT64 SuspendStart; 1232 /// 1233 /// Timer value recorded at the final firmware write to SLP_TYP (or other 1234 /// mechanism) used to trigger hardware entry to S3. 1235 /// Only the most recent suspend cycle's timer value is retained. 1236 /// 1237 UINT64 SuspendEnd; 1238 } EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD; 1239 1240 /// 1241 /// Firmware Performance Record Table definition. 1242 /// 1243 typedef struct { 1244 EFI_ACPI_DESCRIPTION_HEADER Header; 1245 } EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE; 1246 1247 /// 1248 /// Generic Timer Description Table definition. 1249 /// 1250 typedef struct { 1251 EFI_ACPI_DESCRIPTION_HEADER Header; 1252 UINT64 CntControlBasePhysicalAddress; 1253 UINT32 Reserved; 1254 UINT32 SecurePL1TimerGSIV; 1255 UINT32 SecurePL1TimerFlags; 1256 UINT32 NonSecurePL1TimerGSIV; 1257 UINT32 NonSecurePL1TimerFlags; 1258 UINT32 VirtualTimerGSIV; 1259 UINT32 VirtualTimerFlags; 1260 UINT32 NonSecurePL2TimerGSIV; 1261 UINT32 NonSecurePL2TimerFlags; 1262 UINT64 CntReadBasePhysicalAddress; 1263 UINT32 PlatformTimerCount; 1264 UINT32 PlatformTimerOffset; 1265 } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE; 1266 1267 /// 1268 /// GTDT Version (as defined in ACPI 5.1 spec.) 1269 /// 1270 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02 1271 1272 /// 1273 /// Timer Flags. All other bits are reserved and must be 0. 1274 /// 1275 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1276 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1277 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2 1278 1279 /// 1280 /// Platform Timer Type 1281 /// 1282 #define EFI_ACPI_5_1_GTDT_GT_BLOCK 0 1283 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1 1284 1285 /// 1286 /// GT Block Structure 1287 /// 1288 typedef struct { 1289 UINT8 Type; 1290 UINT16 Length; 1291 UINT8 Reserved; 1292 UINT64 CntCtlBase; 1293 UINT32 GTBlockTimerCount; 1294 UINT32 GTBlockTimerOffset; 1295 } EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE; 1296 1297 /// 1298 /// GT Block Timer Structure 1299 /// 1300 typedef struct { 1301 UINT8 GTFrameNumber; 1302 UINT8 Reserved[3]; 1303 UINT64 CntBaseX; 1304 UINT64 CntEL0BaseX; 1305 UINT32 GTxPhysicalTimerGSIV; 1306 UINT32 GTxPhysicalTimerFlags; 1307 UINT32 GTxVirtualTimerGSIV; 1308 UINT32 GTxVirtualTimerFlags; 1309 UINT32 GTxCommonFlags; 1310 } EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE; 1311 1312 /// 1313 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0. 1314 /// 1315 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1316 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1317 1318 /// 1319 /// Common Flags Flags. All other bits are reserved and must be 0. 1320 /// 1321 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0 1322 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1 1323 1324 /// 1325 /// SBSA Generic Watchdog Structure 1326 /// 1327 typedef struct { 1328 UINT8 Type; 1329 UINT16 Length; 1330 UINT8 Reserved; 1331 UINT64 RefreshFramePhysicalAddress; 1332 UINT64 WatchdogControlFramePhysicalAddress; 1333 UINT32 WatchdogTimerGSIV; 1334 UINT32 WatchdogTimerFlags; 1335 } EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE; 1336 1337 /// 1338 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0. 1339 /// 1340 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0 1341 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1342 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2 1343 1344 /// 1345 /// Boot Error Record Table (BERT) 1346 /// 1347 typedef struct { 1348 EFI_ACPI_DESCRIPTION_HEADER Header; 1349 UINT32 BootErrorRegionLength; 1350 UINT64 BootErrorRegion; 1351 } EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER; 1352 1353 /// 1354 /// BERT Version (as defined in ACPI 5.1 spec.) 1355 /// 1356 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 1357 1358 /// 1359 /// Boot Error Region Block Status Definition 1360 /// 1361 typedef struct { 1362 UINT32 UncorrectableErrorValid:1; 1363 UINT32 CorrectableErrorValid:1; 1364 UINT32 MultipleUncorrectableErrors:1; 1365 UINT32 MultipleCorrectableErrors:1; 1366 UINT32 ErrorDataEntryCount:10; 1367 UINT32 Reserved:18; 1368 } EFI_ACPI_5_1_ERROR_BLOCK_STATUS; 1369 1370 /// 1371 /// Boot Error Region Definition 1372 /// 1373 typedef struct { 1374 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; 1375 UINT32 RawDataOffset; 1376 UINT32 RawDataLength; 1377 UINT32 DataLength; 1378 UINT32 ErrorSeverity; 1379 } EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE; 1380 1381 // 1382 // Boot Error Severity types 1383 // 1384 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00 1385 #define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01 1386 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02 1387 #define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03 1388 1389 /// 1390 /// Generic Error Data Entry Definition 1391 /// 1392 typedef struct { 1393 UINT8 SectionType[16]; 1394 UINT32 ErrorSeverity; 1395 UINT16 Revision; 1396 UINT8 ValidationBits; 1397 UINT8 Flags; 1398 UINT32 ErrorDataLength; 1399 UINT8 FruId[16]; 1400 UINT8 FruText[20]; 1401 } EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; 1402 1403 /// 1404 /// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.) 1405 /// 1406 #define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201 1407 1408 /// 1409 /// HEST - Hardware Error Source Table 1410 /// 1411 typedef struct { 1412 EFI_ACPI_DESCRIPTION_HEADER Header; 1413 UINT32 ErrorSourceCount; 1414 } EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER; 1415 1416 /// 1417 /// HEST Version (as defined in ACPI 5.1 spec.) 1418 /// 1419 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01 1420 1421 // 1422 // Error Source structure types. 1423 // 1424 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 1425 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 1426 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02 1427 #define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06 1428 #define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07 1429 #define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08 1430 #define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09 1431 1432 // 1433 // Error Source structure flags. 1434 // 1435 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) 1436 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) 1437 1438 /// 1439 /// IA-32 Architecture Machine Check Exception Structure Definition 1440 /// 1441 typedef struct { 1442 UINT16 Type; 1443 UINT16 SourceId; 1444 UINT8 Reserved0[2]; 1445 UINT8 Flags; 1446 UINT8 Enabled; 1447 UINT32 NumberOfRecordsToPreAllocate; 1448 UINT32 MaxSectionsPerRecord; 1449 UINT64 GlobalCapabilityInitData; 1450 UINT64 GlobalControlInitData; 1451 UINT8 NumberOfHardwareBanks; 1452 UINT8 Reserved1[7]; 1453 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; 1454 1455 /// 1456 /// IA-32 Architecture Machine Check Bank Structure Definition 1457 /// 1458 typedef struct { 1459 UINT8 BankNumber; 1460 UINT8 ClearStatusOnInitialization; 1461 UINT8 StatusDataFormat; 1462 UINT8 Reserved0; 1463 UINT32 ControlRegisterMsrAddress; 1464 UINT64 ControlInitData; 1465 UINT32 StatusRegisterMsrAddress; 1466 UINT32 AddressRegisterMsrAddress; 1467 UINT32 MiscRegisterMsrAddress; 1468 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; 1469 1470 /// 1471 /// IA-32 Architecture Machine Check Bank Structure MCA data format 1472 /// 1473 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 1474 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 1475 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 1476 1477 // 1478 // Hardware Error Notification types. All other values are reserved 1479 // 1480 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 1481 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 1482 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 1483 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 1484 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 1485 1486 /// 1487 /// Hardware Error Notification Configuration Write Enable Structure Definition 1488 /// 1489 typedef struct { 1490 UINT16 Type:1; 1491 UINT16 PollInterval:1; 1492 UINT16 SwitchToPollingThresholdValue:1; 1493 UINT16 SwitchToPollingThresholdWindow:1; 1494 UINT16 ErrorThresholdValue:1; 1495 UINT16 ErrorThresholdWindow:1; 1496 UINT16 Reserved:10; 1497 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; 1498 1499 /// 1500 /// Hardware Error Notification Structure Definition 1501 /// 1502 typedef struct { 1503 UINT8 Type; 1504 UINT8 Length; 1505 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 1506 UINT32 PollInterval; 1507 UINT32 Vector; 1508 UINT32 SwitchToPollingThresholdValue; 1509 UINT32 SwitchToPollingThresholdWindow; 1510 UINT32 ErrorThresholdValue; 1511 UINT32 ErrorThresholdWindow; 1512 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; 1513 1514 /// 1515 /// IA-32 Architecture Corrected Machine Check Structure Definition 1516 /// 1517 typedef struct { 1518 UINT16 Type; 1519 UINT16 SourceId; 1520 UINT8 Reserved0[2]; 1521 UINT8 Flags; 1522 UINT8 Enabled; 1523 UINT32 NumberOfRecordsToPreAllocate; 1524 UINT32 MaxSectionsPerRecord; 1525 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1526 UINT8 NumberOfHardwareBanks; 1527 UINT8 Reserved1[3]; 1528 } EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; 1529 1530 /// 1531 /// IA-32 Architecture NMI Error Structure Definition 1532 /// 1533 typedef struct { 1534 UINT16 Type; 1535 UINT16 SourceId; 1536 UINT8 Reserved0[2]; 1537 UINT32 NumberOfRecordsToPreAllocate; 1538 UINT32 MaxSectionsPerRecord; 1539 UINT32 MaxRawDataLength; 1540 } EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; 1541 1542 /// 1543 /// PCI Express Root Port AER Structure Definition 1544 /// 1545 typedef struct { 1546 UINT16 Type; 1547 UINT16 SourceId; 1548 UINT8 Reserved0[2]; 1549 UINT8 Flags; 1550 UINT8 Enabled; 1551 UINT32 NumberOfRecordsToPreAllocate; 1552 UINT32 MaxSectionsPerRecord; 1553 UINT32 Bus; 1554 UINT16 Device; 1555 UINT16 Function; 1556 UINT16 DeviceControl; 1557 UINT8 Reserved1[2]; 1558 UINT32 UncorrectableErrorMask; 1559 UINT32 UncorrectableErrorSeverity; 1560 UINT32 CorrectableErrorMask; 1561 UINT32 AdvancedErrorCapabilitiesAndControl; 1562 UINT32 RootErrorCommand; 1563 } EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; 1564 1565 /// 1566 /// PCI Express Device AER Structure Definition 1567 /// 1568 typedef struct { 1569 UINT16 Type; 1570 UINT16 SourceId; 1571 UINT8 Reserved0[2]; 1572 UINT8 Flags; 1573 UINT8 Enabled; 1574 UINT32 NumberOfRecordsToPreAllocate; 1575 UINT32 MaxSectionsPerRecord; 1576 UINT32 Bus; 1577 UINT16 Device; 1578 UINT16 Function; 1579 UINT16 DeviceControl; 1580 UINT8 Reserved1[2]; 1581 UINT32 UncorrectableErrorMask; 1582 UINT32 UncorrectableErrorSeverity; 1583 UINT32 CorrectableErrorMask; 1584 UINT32 AdvancedErrorCapabilitiesAndControl; 1585 } EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE; 1586 1587 /// 1588 /// PCI Express Bridge AER Structure Definition 1589 /// 1590 typedef struct { 1591 UINT16 Type; 1592 UINT16 SourceId; 1593 UINT8 Reserved0[2]; 1594 UINT8 Flags; 1595 UINT8 Enabled; 1596 UINT32 NumberOfRecordsToPreAllocate; 1597 UINT32 MaxSectionsPerRecord; 1598 UINT32 Bus; 1599 UINT16 Device; 1600 UINT16 Function; 1601 UINT16 DeviceControl; 1602 UINT8 Reserved1[2]; 1603 UINT32 UncorrectableErrorMask; 1604 UINT32 UncorrectableErrorSeverity; 1605 UINT32 CorrectableErrorMask; 1606 UINT32 AdvancedErrorCapabilitiesAndControl; 1607 UINT32 SecondaryUncorrectableErrorMask; 1608 UINT32 SecondaryUncorrectableErrorSeverity; 1609 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 1610 } EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; 1611 1612 /// 1613 /// Generic Hardware Error Source Structure Definition 1614 /// 1615 typedef struct { 1616 UINT16 Type; 1617 UINT16 SourceId; 1618 UINT16 RelatedSourceId; 1619 UINT8 Flags; 1620 UINT8 Enabled; 1621 UINT32 NumberOfRecordsToPreAllocate; 1622 UINT32 MaxSectionsPerRecord; 1623 UINT32 MaxRawDataLength; 1624 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1625 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1626 UINT32 ErrorStatusBlockLength; 1627 } EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; 1628 1629 /// 1630 /// Generic Error Status Definition 1631 /// 1632 typedef struct { 1633 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; 1634 UINT32 RawDataOffset; 1635 UINT32 RawDataLength; 1636 UINT32 DataLength; 1637 UINT32 ErrorSeverity; 1638 } EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE; 1639 1640 /// 1641 /// ERST - Error Record Serialization Table 1642 /// 1643 typedef struct { 1644 EFI_ACPI_DESCRIPTION_HEADER Header; 1645 UINT32 SerializationHeaderSize; 1646 UINT8 Reserved0[4]; 1647 UINT32 InstructionEntryCount; 1648 } EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; 1649 1650 /// 1651 /// ERST Version (as defined in ACPI 5.1 spec.) 1652 /// 1653 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 1654 1655 /// 1656 /// ERST Serialization Actions 1657 /// 1658 #define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00 1659 #define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01 1660 #define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02 1661 #define EFI_ACPI_5_1_ERST_END_OPERATION 0x03 1662 #define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04 1663 #define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05 1664 #define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06 1665 #define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07 1666 #define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08 1667 #define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09 1668 #define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A 1669 #define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B 1670 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D 1671 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E 1672 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F 1673 1674 /// 1675 /// ERST Action Command Status 1676 /// 1677 #define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00 1678 #define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01 1679 #define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02 1680 #define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03 1681 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04 1682 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05 1683 1684 /// 1685 /// ERST Serialization Instructions 1686 /// 1687 #define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00 1688 #define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01 1689 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02 1690 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03 1691 #define EFI_ACPI_5_1_ERST_NOOP 0x04 1692 #define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05 1693 #define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06 1694 #define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07 1695 #define EFI_ACPI_5_1_ERST_ADD 0x08 1696 #define EFI_ACPI_5_1_ERST_SUBTRACT 0x09 1697 #define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A 1698 #define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B 1699 #define EFI_ACPI_5_1_ERST_STALL 0x0C 1700 #define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D 1701 #define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E 1702 #define EFI_ACPI_5_1_ERST_GOTO 0x0F 1703 #define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10 1704 #define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11 1705 #define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12 1706 1707 /// 1708 /// ERST Instruction Flags 1709 /// 1710 #define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01 1711 1712 /// 1713 /// ERST Serialization Instruction Entry 1714 /// 1715 typedef struct { 1716 UINT8 SerializationAction; 1717 UINT8 Instruction; 1718 UINT8 Flags; 1719 UINT8 Reserved0; 1720 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1721 UINT64 Value; 1722 UINT64 Mask; 1723 } EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY; 1724 1725 /// 1726 /// EINJ - Error Injection Table 1727 /// 1728 typedef struct { 1729 EFI_ACPI_DESCRIPTION_HEADER Header; 1730 UINT32 InjectionHeaderSize; 1731 UINT8 InjectionFlags; 1732 UINT8 Reserved0[3]; 1733 UINT32 InjectionEntryCount; 1734 } EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER; 1735 1736 /// 1737 /// EINJ Version (as defined in ACPI 5.1 spec.) 1738 /// 1739 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01 1740 1741 /// 1742 /// EINJ Error Injection Actions 1743 /// 1744 #define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00 1745 #define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 1746 #define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02 1747 #define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03 1748 #define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04 1749 #define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05 1750 #define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06 1751 #define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07 1752 #define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF 1753 1754 /// 1755 /// EINJ Action Command Status 1756 /// 1757 #define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00 1758 #define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01 1759 #define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02 1760 1761 /// 1762 /// EINJ Error Type Definition 1763 /// 1764 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) 1765 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) 1766 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) 1767 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) 1768 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) 1769 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) 1770 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) 1771 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) 1772 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) 1773 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) 1774 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) 1775 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) 1776 1777 /// 1778 /// EINJ Injection Instructions 1779 /// 1780 #define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00 1781 #define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01 1782 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02 1783 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03 1784 #define EFI_ACPI_5_1_EINJ_NOOP 0x04 1785 1786 /// 1787 /// EINJ Instruction Flags 1788 /// 1789 #define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01 1790 1791 /// 1792 /// EINJ Injection Instruction Entry 1793 /// 1794 typedef struct { 1795 UINT8 InjectionAction; 1796 UINT8 Instruction; 1797 UINT8 Flags; 1798 UINT8 Reserved0; 1799 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1800 UINT64 Value; 1801 UINT64 Mask; 1802 } EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY; 1803 1804 /// 1805 /// EINJ Trigger Action Table 1806 /// 1807 typedef struct { 1808 UINT32 HeaderSize; 1809 UINT32 Revision; 1810 UINT32 TableSize; 1811 UINT32 EntryCount; 1812 } EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE; 1813 1814 /// 1815 /// Platform Communications Channel Table (PCCT) 1816 /// 1817 typedef struct { 1818 EFI_ACPI_DESCRIPTION_HEADER Header; 1819 UINT32 Flags; 1820 UINT64 Reserved; 1821 } EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER; 1822 1823 /// 1824 /// PCCT Version (as defined in ACPI 5.1 spec.) 1825 /// 1826 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01 1827 1828 /// 1829 /// PCCT Global Flags 1830 /// 1831 #define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0 1832 1833 // 1834 // PCCT Subspace type 1835 // 1836 #define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00 1837 1838 /// 1839 /// PCC Subspace Structure Header 1840 /// 1841 typedef struct { 1842 UINT8 Type; 1843 UINT8 Length; 1844 } EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER; 1845 1846 /// 1847 /// Generic Communications Subspace Structure 1848 /// 1849 typedef struct { 1850 UINT8 Type; 1851 UINT8 Length; 1852 UINT8 Reserved[6]; 1853 UINT64 BaseAddress; 1854 UINT64 AddressLength; 1855 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 1856 UINT64 DoorbellPreserve; 1857 UINT64 DoorbellWrite; 1858 UINT32 NominalLatency; 1859 UINT32 MaximumPeriodicAccessRate; 1860 UINT16 MinimumRequestTurnaroundTime; 1861 } EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC; 1862 1863 /// 1864 /// Generic Communications Channel Shared Memory Region 1865 /// 1866 1867 typedef struct { 1868 UINT8 Command; 1869 UINT8 Reserved:7; 1870 UINT8 GenerateSci:1; 1871 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND; 1872 1873 typedef struct { 1874 UINT8 CommandComplete:1; 1875 UINT8 SciDoorbell:1; 1876 UINT8 Error:1; 1877 UINT8 PlatformNotification:1; 1878 UINT8 Reserved:4; 1879 UINT8 Reserved1; 1880 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS; 1881 1882 typedef struct { 1883 UINT32 Signature; 1884 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; 1885 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; 1886 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER; 1887 1888 // 1889 // Known table signatures 1890 // 1891 1892 /// 1893 /// "RSD PTR " Root System Description Pointer 1894 /// 1895 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') 1896 1897 /// 1898 /// "APIC" Multiple APIC Description Table 1899 /// 1900 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') 1901 1902 /// 1903 /// "BERT" Boot Error Record Table 1904 /// 1905 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') 1906 1907 /// 1908 /// "BGRT" Boot Graphics Resource Table 1909 /// 1910 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T') 1911 1912 /// 1913 /// "CPEP" Corrected Platform Error Polling Table 1914 /// 1915 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') 1916 1917 /// 1918 /// "DSDT" Differentiated System Description Table 1919 /// 1920 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') 1921 1922 /// 1923 /// "ECDT" Embedded Controller Boot Resources Table 1924 /// 1925 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') 1926 1927 /// 1928 /// "EINJ" Error Injection Table 1929 /// 1930 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') 1931 1932 /// 1933 /// "ERST" Error Record Serialization Table 1934 /// 1935 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') 1936 1937 /// 1938 /// "FACP" Fixed ACPI Description Table 1939 /// 1940 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') 1941 1942 /// 1943 /// "FACS" Firmware ACPI Control Structure 1944 /// 1945 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') 1946 1947 /// 1948 /// "FPDT" Firmware Performance Data Table 1949 /// 1950 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T') 1951 1952 /// 1953 /// "GTDT" Generic Timer Description Table 1954 /// 1955 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T') 1956 1957 /// 1958 /// "HEST" Hardware Error Source Table 1959 /// 1960 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') 1961 1962 /// 1963 /// "MPST" Memory Power State Table 1964 /// 1965 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T') 1966 1967 /// 1968 /// "MSCT" Maximum System Characteristics Table 1969 /// 1970 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') 1971 1972 /// 1973 /// "PMTT" Platform Memory Topology Table 1974 /// 1975 #define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T') 1976 1977 /// 1978 /// "PSDT" Persistent System Description Table 1979 /// 1980 #define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') 1981 1982 /// 1983 /// "RASF" ACPI RAS Feature Table 1984 /// 1985 #define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F') 1986 1987 /// 1988 /// "RSDT" Root System Description Table 1989 /// 1990 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') 1991 1992 /// 1993 /// "SBST" Smart Battery Specification Table 1994 /// 1995 #define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') 1996 1997 /// 1998 /// "SLIT" System Locality Information Table 1999 /// 2000 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') 2001 2002 /// 2003 /// "SRAT" System Resource Affinity Table 2004 /// 2005 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') 2006 2007 /// 2008 /// "SSDT" Secondary System Description Table 2009 /// 2010 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') 2011 2012 /// 2013 /// "XSDT" Extended System Description Table 2014 /// 2015 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') 2016 2017 /// 2018 /// "BOOT" MS Simple Boot Spec 2019 /// 2020 #define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') 2021 2022 /// 2023 /// "CSRT" MS Core System Resource Table 2024 /// 2025 #define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T') 2026 2027 /// 2028 /// "DBG2" MS Debug Port 2 Spec 2029 /// 2030 #define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2') 2031 2032 /// 2033 /// "DBGP" MS Debug Port Spec 2034 /// 2035 #define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') 2036 2037 /// 2038 /// "DMAR" DMA Remapping Table 2039 /// 2040 #define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') 2041 2042 /// 2043 /// "DRTM" Dynamic Root of Trust for Measurement Table 2044 /// 2045 #define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M') 2046 2047 /// 2048 /// "ETDT" Event Timer Description Table 2049 /// 2050 #define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') 2051 2052 /// 2053 /// "HPET" IA-PC High Precision Event Timer Table 2054 /// 2055 #define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') 2056 2057 /// 2058 /// "iBFT" iSCSI Boot Firmware Table 2059 /// 2060 #define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') 2061 2062 /// 2063 /// "IVRS" I/O Virtualization Reporting Structure 2064 /// 2065 #define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') 2066 2067 /// 2068 /// "LPIT" Low Power Idle Table 2069 /// 2070 #define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T') 2071 2072 /// 2073 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 2074 /// 2075 #define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') 2076 2077 /// 2078 /// "MCHI" Management Controller Host Interface Table 2079 /// 2080 #define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') 2081 2082 /// 2083 /// "MSDM" MS Data Management Table 2084 /// 2085 #define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') 2086 2087 /// 2088 /// "SLIC" MS Software Licensing Table Specification 2089 /// 2090 #define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C') 2091 2092 /// 2093 /// "SPCR" Serial Port Concole Redirection Table 2094 /// 2095 #define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') 2096 2097 /// 2098 /// "SPMI" Server Platform Management Interface Table 2099 /// 2100 #define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') 2101 2102 /// 2103 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 2104 /// 2105 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') 2106 2107 /// 2108 /// "TPM2" Trusted Computing Platform 1 Table 2109 /// 2110 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2') 2111 2112 /// 2113 /// "UEFI" UEFI ACPI Data Table 2114 /// 2115 #define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') 2116 2117 /// 2118 /// "WAET" Windows ACPI Emulated Devices Table 2119 /// 2120 #define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') 2121 2122 /// 2123 /// "WDAT" Watchdog Action Table 2124 /// 2125 #define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') 2126 2127 /// 2128 /// "WDRT" Watchdog Resource Table 2129 /// 2130 #define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') 2131 2132 /// 2133 /// "WPBT" MS Platform Binary Table 2134 /// 2135 #define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T') 2136 2137 #pragma pack() 2138 2139 #endif 2140