xref: /freebsd/sys/contrib/device-tree/src/riscv/starfive/jh7110-starfive-visionfive-2.dtsi (revision 2f9966ff63d65bd474478888c9088eeae3f9c669)
1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/*
3 * Copyright (C) 2022 StarFive Technology Co., Ltd.
4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
5 */
6
7/dts-v1/;
8#include "jh7110.dtsi"
9#include "jh7110-pinfunc.h"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	aliases {
14		i2c0 = &i2c0;
15		i2c2 = &i2c2;
16		i2c5 = &i2c5;
17		i2c6 = &i2c6;
18		serial0 = &uart0;
19	};
20
21	chosen {
22		stdout-path = "serial0:115200n8";
23	};
24
25	cpus {
26		timebase-frequency = <4000000>;
27	};
28
29	memory@40000000 {
30		device_type = "memory";
31		reg = <0x0 0x40000000 0x1 0x0>;
32	};
33
34	gpio-restart {
35		compatible = "gpio-restart";
36		gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
37		priority = <224>;
38	};
39};
40
41&gmac0_rgmii_rxin {
42	clock-frequency = <125000000>;
43};
44
45&gmac0_rmii_refin {
46	clock-frequency = <50000000>;
47};
48
49&gmac1_rgmii_rxin {
50	clock-frequency = <125000000>;
51};
52
53&gmac1_rmii_refin {
54	clock-frequency = <50000000>;
55};
56
57&i2srx_bclk_ext {
58	clock-frequency = <12288000>;
59};
60
61&i2srx_lrck_ext {
62	clock-frequency = <192000>;
63};
64
65&i2stx_bclk_ext {
66	clock-frequency = <12288000>;
67};
68
69&i2stx_lrck_ext {
70	clock-frequency = <192000>;
71};
72
73&mclk_ext {
74	clock-frequency = <12288000>;
75};
76
77&osc {
78	clock-frequency = <24000000>;
79};
80
81&rtc_osc {
82	clock-frequency = <32768>;
83};
84
85&tdm_ext {
86	clock-frequency = <49152000>;
87};
88
89&i2c0 {
90	clock-frequency = <100000>;
91	i2c-sda-hold-time-ns = <300>;
92	i2c-sda-falling-time-ns = <510>;
93	i2c-scl-falling-time-ns = <510>;
94	pinctrl-names = "default";
95	pinctrl-0 = <&i2c0_pins>;
96	status = "okay";
97};
98
99&i2c2 {
100	clock-frequency = <100000>;
101	i2c-sda-hold-time-ns = <300>;
102	i2c-sda-falling-time-ns = <510>;
103	i2c-scl-falling-time-ns = <510>;
104	pinctrl-names = "default";
105	pinctrl-0 = <&i2c2_pins>;
106	status = "okay";
107};
108
109&i2c5 {
110	clock-frequency = <100000>;
111	i2c-sda-hold-time-ns = <300>;
112	i2c-sda-falling-time-ns = <510>;
113	i2c-scl-falling-time-ns = <510>;
114	pinctrl-names = "default";
115	pinctrl-0 = <&i2c5_pins>;
116	status = "okay";
117
118	axp15060: pmic@36 {
119		compatible = "x-powers,axp15060";
120		reg = <0x36>;
121		interrupts = <0>;
122		interrupt-controller;
123		#interrupt-cells = <1>;
124
125		regulators {
126			vdd_cpu: dcdc2 {
127				regulator-always-on;
128				regulator-min-microvolt = <500000>;
129				regulator-max-microvolt = <1540000>;
130				regulator-name = "vdd-cpu";
131			};
132		};
133	};
134};
135
136&i2c6 {
137	clock-frequency = <100000>;
138	i2c-sda-hold-time-ns = <300>;
139	i2c-sda-falling-time-ns = <510>;
140	i2c-scl-falling-time-ns = <510>;
141	pinctrl-names = "default";
142	pinctrl-0 = <&i2c6_pins>;
143	status = "okay";
144};
145
146&sysgpio {
147	i2c0_pins: i2c0-0 {
148		i2c-pins {
149			pinmux = <GPIOMUX(57, GPOUT_LOW,
150					      GPOEN_SYS_I2C0_CLK,
151					      GPI_SYS_I2C0_CLK)>,
152				 <GPIOMUX(58, GPOUT_LOW,
153					      GPOEN_SYS_I2C0_DATA,
154					      GPI_SYS_I2C0_DATA)>;
155			bias-disable; /* external pull-up */
156			input-enable;
157			input-schmitt-enable;
158		};
159	};
160
161	i2c2_pins: i2c2-0 {
162		i2c-pins {
163			pinmux = <GPIOMUX(3, GPOUT_LOW,
164					     GPOEN_SYS_I2C2_CLK,
165					     GPI_SYS_I2C2_CLK)>,
166				 <GPIOMUX(2, GPOUT_LOW,
167					     GPOEN_SYS_I2C2_DATA,
168					     GPI_SYS_I2C2_DATA)>;
169			bias-disable; /* external pull-up */
170			input-enable;
171			input-schmitt-enable;
172		};
173	};
174
175	i2c5_pins: i2c5-0 {
176		i2c-pins {
177			pinmux = <GPIOMUX(19, GPOUT_LOW,
178					      GPOEN_SYS_I2C5_CLK,
179					      GPI_SYS_I2C5_CLK)>,
180				 <GPIOMUX(20, GPOUT_LOW,
181					      GPOEN_SYS_I2C5_DATA,
182					      GPI_SYS_I2C5_DATA)>;
183			bias-disable; /* external pull-up */
184			input-enable;
185			input-schmitt-enable;
186		};
187	};
188
189	i2c6_pins: i2c6-0 {
190		i2c-pins {
191			pinmux = <GPIOMUX(16, GPOUT_LOW,
192					      GPOEN_SYS_I2C6_CLK,
193					      GPI_SYS_I2C6_CLK)>,
194				 <GPIOMUX(17, GPOUT_LOW,
195					      GPOEN_SYS_I2C6_DATA,
196					      GPI_SYS_I2C6_DATA)>;
197			bias-disable; /* external pull-up */
198			input-enable;
199			input-schmitt-enable;
200		};
201	};
202
203	uart0_pins: uart0-0 {
204		tx-pins {
205			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
206					     GPOEN_ENABLE,
207					     GPI_NONE)>;
208			bias-disable;
209			drive-strength = <12>;
210			input-disable;
211			input-schmitt-disable;
212			slew-rate = <0>;
213		};
214
215		rx-pins {
216			pinmux = <GPIOMUX(6, GPOUT_LOW,
217					     GPOEN_DISABLE,
218					     GPI_SYS_UART0_RX)>;
219			bias-disable; /* external pull-up */
220			drive-strength = <2>;
221			input-enable;
222			input-schmitt-enable;
223			slew-rate = <0>;
224		};
225	};
226};
227
228&uart0 {
229	pinctrl-names = "default";
230	pinctrl-0 = <&uart0_pins>;
231	status = "okay";
232};
233
234&U74_1 {
235	cpu-supply = <&vdd_cpu>;
236};
237
238&U74_2 {
239	cpu-supply = <&vdd_cpu>;
240};
241
242&U74_3 {
243	cpu-supply = <&vdd_cpu>;
244};
245
246&U74_4 {
247	cpu-supply = <&vdd_cpu>;
248};
249