xref: /freebsd/sys/contrib/device-tree/src/riscv/starfive/jh7100-common.dtsi (revision b64c5a0ace59af62eff52bfe110a521dc73c937b) 
1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/*
3 * Copyright (C) 2021 StarFive Technology Co., Ltd.
4 * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
5 */
6
7/dts-v1/;
8#include "jh7100.dtsi"
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/leds/common.h>
11#include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
12
13/ {
14	aliases {
15		mmc0 = &sdio0;
16		mmc1 = &sdio1;
17		serial0 = &uart3;
18	};
19
20	chosen {
21		stdout-path = "serial0:115200n8";
22	};
23
24	cpus {
25		timebase-frequency = <6250000>;
26	};
27
28	memory@80000000 {
29		device_type = "memory";
30		reg = <0x0 0x80000000 0x2 0x0>;
31	};
32
33	leds {
34		compatible = "gpio-leds";
35
36		led-ack {
37			gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
38			color = <LED_COLOR_ID_GREEN>;
39			function = LED_FUNCTION_HEARTBEAT;
40			linux,default-trigger = "heartbeat";
41			label = "ack";
42		};
43	};
44
45	reserved-memory {
46		#address-cells = <2>;
47		#size-cells = <2>;
48		ranges;
49
50		dma-reserved@fa000000 {
51			reg = <0x0 0xfa000000 0x0 0x1000000>;
52			no-map;
53		};
54
55		linux,dma@107a000000 {
56			compatible = "shared-dma-pool";
57			reg = <0x10 0x7a000000 0x0 0x1000000>;
58			no-map;
59			linux,dma-default;
60		};
61	};
62
63	soc {
64		dma-ranges = <0x00 0x80000000 0x00 0x80000000 0x00 0x7a000000>,
65			     <0x00 0xfa000000 0x10 0x7a000000 0x00 0x01000000>,
66			     <0x00 0xfb000000 0x00 0xfb000000 0x07 0x85000000>;
67	};
68
69	wifi_pwrseq: wifi-pwrseq {
70		compatible = "mmc-pwrseq-simple";
71		reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
72	};
73};
74
75&gpio {
76	i2c0_pins: i2c0-0 {
77		i2c-pins {
78			pinmux = <GPIOMUX(62, GPO_LOW,
79				  GPO_I2C0_PAD_SCK_OEN,
80				  GPI_I2C0_PAD_SCK_IN)>,
81				 <GPIOMUX(61, GPO_LOW,
82				  GPO_I2C0_PAD_SDA_OEN,
83				  GPI_I2C0_PAD_SDA_IN)>;
84			bias-disable; /* external pull-up */
85			input-enable;
86			input-schmitt-enable;
87		};
88	};
89
90	i2c1_pins: i2c1-0 {
91		i2c-pins {
92			pinmux = <GPIOMUX(47, GPO_LOW,
93				  GPO_I2C1_PAD_SCK_OEN,
94				  GPI_I2C1_PAD_SCK_IN)>,
95				 <GPIOMUX(48, GPO_LOW,
96				  GPO_I2C1_PAD_SDA_OEN,
97				  GPI_I2C1_PAD_SDA_IN)>;
98			bias-pull-up;
99			input-enable;
100			input-schmitt-enable;
101		};
102	};
103
104	i2c2_pins: i2c2-0 {
105		i2c-pins {
106			pinmux = <GPIOMUX(60, GPO_LOW,
107				  GPO_I2C2_PAD_SCK_OEN,
108				  GPI_I2C2_PAD_SCK_IN)>,
109				 <GPIOMUX(59, GPO_LOW,
110				  GPO_I2C2_PAD_SDA_OEN,
111				  GPI_I2C2_PAD_SDA_IN)>;
112			bias-disable; /* external pull-up */
113			input-enable;
114			input-schmitt-enable;
115		};
116	};
117
118	sdio0_pins: sdio0-0 {
119		clk-pins {
120			pinmux = <GPIOMUX(54, GPO_SDIO0_PAD_CCLK_OUT,
121				  GPO_ENABLE, GPI_NONE)>;
122			bias-disable;
123			input-disable;
124			input-schmitt-disable;
125		};
126		sdio-pins {
127			pinmux = <GPIOMUX(55, GPO_LOW, GPO_DISABLE,
128				  GPI_SDIO0_PAD_CARD_DETECT_N)>,
129				 <GPIOMUX(53,
130				  GPO_SDIO0_PAD_CCMD_OUT,
131				  GPO_SDIO0_PAD_CCMD_OEN,
132				  GPI_SDIO0_PAD_CCMD_IN)>,
133				 <GPIOMUX(49,
134				  GPO_SDIO0_PAD_CDATA_OUT_BIT0,
135				  GPO_SDIO0_PAD_CDATA_OEN_BIT0,
136				  GPI_SDIO0_PAD_CDATA_IN_BIT0)>,
137				 <GPIOMUX(50,
138				  GPO_SDIO0_PAD_CDATA_OUT_BIT1,
139				  GPO_SDIO0_PAD_CDATA_OEN_BIT1,
140				  GPI_SDIO0_PAD_CDATA_IN_BIT1)>,
141				 <GPIOMUX(51,
142				  GPO_SDIO0_PAD_CDATA_OUT_BIT2,
143				  GPO_SDIO0_PAD_CDATA_OEN_BIT2,
144				  GPI_SDIO0_PAD_CDATA_IN_BIT2)>,
145				 <GPIOMUX(52,
146				  GPO_SDIO0_PAD_CDATA_OUT_BIT3,
147				  GPO_SDIO0_PAD_CDATA_OEN_BIT3,
148				  GPI_SDIO0_PAD_CDATA_IN_BIT3)>;
149			bias-pull-up;
150			input-enable;
151			input-schmitt-enable;
152		};
153	};
154
155	sdio1_pins: sdio1-0 {
156		clk-pins {
157			pinmux = <GPIOMUX(33, GPO_SDIO1_PAD_CCLK_OUT,
158				  GPO_ENABLE, GPI_NONE)>;
159			bias-disable;
160			input-disable;
161			input-schmitt-disable;
162		};
163		sdio-pins {
164			pinmux = <GPIOMUX(29,
165				  GPO_SDIO1_PAD_CCMD_OUT,
166				  GPO_SDIO1_PAD_CCMD_OEN,
167				  GPI_SDIO1_PAD_CCMD_IN)>,
168				 <GPIOMUX(36,
169				  GPO_SDIO1_PAD_CDATA_OUT_BIT0,
170				  GPO_SDIO1_PAD_CDATA_OEN_BIT0,
171				  GPI_SDIO1_PAD_CDATA_IN_BIT0)>,
172				 <GPIOMUX(30,
173				  GPO_SDIO1_PAD_CDATA_OUT_BIT1,
174				  GPO_SDIO1_PAD_CDATA_OEN_BIT1,
175				  GPI_SDIO1_PAD_CDATA_IN_BIT1)>,
176				 <GPIOMUX(34,
177				  GPO_SDIO1_PAD_CDATA_OUT_BIT2,
178				  GPO_SDIO1_PAD_CDATA_OEN_BIT2,
179				  GPI_SDIO1_PAD_CDATA_IN_BIT2)>,
180				 <GPIOMUX(31,
181				  GPO_SDIO1_PAD_CDATA_OUT_BIT3,
182				  GPO_SDIO1_PAD_CDATA_OEN_BIT3,
183				  GPI_SDIO1_PAD_CDATA_IN_BIT3)>;
184			bias-pull-up;
185			input-enable;
186			input-schmitt-enable;
187		};
188	};
189
190	uart3_pins: uart3-0 {
191		rx-pins {
192			pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
193				  GPI_UART3_PAD_SIN)>;
194			bias-pull-up;
195			drive-strength = <14>;
196			input-enable;
197			input-schmitt-enable;
198			slew-rate = <0>;
199		};
200		tx-pins {
201			pinmux = <GPIOMUX(14, GPO_UART3_PAD_SOUT,
202				  GPO_ENABLE, GPI_NONE)>;
203			bias-disable;
204			drive-strength = <35>;
205			input-disable;
206			input-schmitt-disable;
207			slew-rate = <0>;
208		};
209	};
210};
211
212&i2c0 {
213	clock-frequency = <100000>;
214	i2c-sda-hold-time-ns = <300>;
215	i2c-sda-falling-time-ns = <500>;
216	i2c-scl-falling-time-ns = <500>;
217	pinctrl-names = "default";
218	pinctrl-0 = <&i2c0_pins>;
219	status = "okay";
220
221	pmic@5e {
222		compatible = "ti,tps65086";
223		reg = <0x5e>;
224		gpio-controller;
225		#gpio-cells = <2>;
226
227		regulators {
228		};
229	};
230};
231
232&i2c1 {
233	clock-frequency = <400000>;
234	i2c-sda-hold-time-ns = <300>;
235	i2c-sda-falling-time-ns = <100>;
236	i2c-scl-falling-time-ns = <100>;
237	pinctrl-names = "default";
238	pinctrl-0 = <&i2c1_pins>;
239	status = "okay";
240};
241
242&i2c2 {
243	clock-frequency = <100000>;
244	i2c-sda-hold-time-ns = <300>;
245	i2c-sda-falling-time-ns = <500>;
246	i2c-scl-falling-time-ns = <500>;
247	pinctrl-names = "default";
248	pinctrl-0 = <&i2c2_pins>;
249	status = "okay";
250};
251
252&osc_sys {
253	clock-frequency = <25000000>;
254};
255
256&osc_aud {
257	clock-frequency = <27000000>;
258};
259
260&sdio0 {
261	broken-cd;
262	bus-width = <4>;
263	cap-sd-highspeed;
264	pinctrl-names = "default";
265	pinctrl-0 = <&sdio0_pins>;
266	status = "okay";
267};
268
269&sdio1 {
270	#address-cells = <1>;
271	#size-cells = <0>;
272	bus-width = <4>;
273	cap-sd-highspeed;
274	cap-sdio-irq;
275	cap-power-off-card;
276	mmc-pwrseq = <&wifi_pwrseq>;
277	non-removable;
278	pinctrl-names = "default";
279	pinctrl-0 = <&sdio1_pins>;
280	status = "okay";
281
282	wifi@1 {
283		compatible = "brcm,bcm4329-fmac";
284		reg = <1>;
285	};
286};
287
288&uart3 {
289	pinctrl-names = "default";
290	pinctrl-0 = <&uart3_pins>;
291	status = "okay";
292};
293