1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* Copyright (c) 2020-2021 Microchip Technology Inc */ 3 4/ { 5 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit", 6 "microchip,mpfs"; 7 8 core_pwm0: pwm@40000000 { 9 compatible = "microchip,corepwm-rtl-v4"; 10 reg = <0x0 0x40000000 0x0 0xF0>; 11 microchip,sync-update-mask = /bits/ 32 <0>; 12 #pwm-cells = <3>; 13 clocks = <&ccc_nw CLK_CCC_PLL0_OUT3>; 14 status = "disabled"; 15 }; 16 17 i2c2: i2c@40000200 { 18 compatible = "microchip,corei2c-rtl-v7"; 19 reg = <0x0 0x40000200 0x0 0x100>; 20 #address-cells = <1>; 21 #size-cells = <0>; 22 clocks = <&ccc_nw CLK_CCC_PLL0_OUT3>; 23 interrupt-parent = <&plic>; 24 interrupts = <122>; 25 clock-frequency = <100000>; 26 status = "disabled"; 27 }; 28 29 pcie: pcie@3000000000 { 30 compatible = "microchip,pcie-host-1.0"; 31 #address-cells = <0x3>; 32 #interrupt-cells = <0x1>; 33 #size-cells = <0x2>; 34 device_type = "pci"; 35 reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>; 36 reg-names = "cfg", "apb"; 37 bus-range = <0x0 0x7f>; 38 interrupt-parent = <&plic>; 39 interrupts = <119>; 40 interrupt-map = <0 0 0 1 &pcie_intc 0>, 41 <0 0 0 2 &pcie_intc 1>, 42 <0 0 0 3 &pcie_intc 2>, 43 <0 0 0 4 &pcie_intc 3>; 44 interrupt-map-mask = <0 0 0 7>; 45 clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>, <&ccc_nw CLK_CCC_PLL0_OUT3>; 46 clock-names = "fic1", "fic3"; 47 ranges = <0x3000000 0x0 0x8000000 0x30 0x8000000 0x0 0x80000000>; 48 dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x1 0x00000000>; 49 msi-parent = <&pcie>; 50 msi-controller; 51 status = "disabled"; 52 pcie_intc: interrupt-controller { 53 #address-cells = <0>; 54 #interrupt-cells = <1>; 55 interrupt-controller; 56 }; 57 }; 58 59 refclk_ccc: cccrefclk { 60 compatible = "fixed-clock"; 61 #clock-cells = <0>; 62 }; 63}; 64 65&ccc_nw { 66 clocks = <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, 67 <&refclk_ccc>, <&refclk_ccc>; 68 clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1", 69 "dll0_ref", "dll1_ref"; 70 status = "okay"; 71}; 72