1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip. 4 * 5 * Copyright 2007,2008 Freescale Semiconductor Inc. 6 */ 7 8/dts-v1/; 9 10/ { 11 model = "pq2fads"; 12 compatible = "fsl,pq2fads"; 13 #address-cells = <1>; 14 #size-cells = <1>; 15 16 aliases { 17 ethernet0 = &enet0; 18 ethernet1 = &enet1; 19 serial0 = &serial0; 20 serial1 = &serial1; 21 pci0 = &pci0; 22 }; 23 24 cpus { 25 #address-cells = <1>; 26 #size-cells = <0>; 27 28 cpu@0 { 29 device_type = "cpu"; 30 reg = <0x0>; 31 d-cache-line-size = <32>; 32 i-cache-line-size = <32>; 33 d-cache-size = <16384>; 34 i-cache-size = <16384>; 35 timebase-frequency = <0>; 36 clock-frequency = <0>; 37 }; 38 }; 39 40 memory { 41 device_type = "memory"; 42 reg = <0x0 0x0>; 43 }; 44 45 localbus@f0010100 { 46 compatible = "fsl,mpc8280-localbus", 47 "fsl,pq2-localbus"; 48 #address-cells = <2>; 49 #size-cells = <1>; 50 reg = <0xf0010100 0x60>; 51 52 ranges = <0x0 0x0 0xff800000 0x800000 53 0x1 0x0 0xf4500000 0x8000 54 0x8 0x0 0xf8200000 0x8000>; 55 56 flash@0,0 { 57 compatible = "jedec-flash"; 58 reg = <0x0 0x0 0x800000>; 59 bank-width = <4>; 60 device-width = <1>; 61 }; 62 63 bcsr@1,0 { 64 reg = <0x1 0x0 0x20>; 65 compatible = "fsl,pq2fads-bcsr"; 66 }; 67 68 PCI_PIC: pic@8,0 { 69 #interrupt-cells = <1>; 70 interrupt-controller; 71 reg = <0x8 0x0 0x8>; 72 compatible = "fsl,pq2ads-pci-pic"; 73 interrupt-parent = <&PIC>; 74 interrupts = <24 8>; 75 }; 76 }; 77 78 pci0: pci@f0010800 { 79 device_type = "pci"; 80 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>; 81 compatible = "fsl,mpc8280-pci", "fsl,pq2-pci"; 82 #interrupt-cells = <1>; 83 #size-cells = <2>; 84 #address-cells = <3>; 85 clock-frequency = <66000000>; 86 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 87 interrupt-map = < 88 /* IDSEL 0x16 */ 89 0xb000 0x0 0x0 0x1 &PCI_PIC 0 90 0xb000 0x0 0x0 0x2 &PCI_PIC 1 91 0xb000 0x0 0x0 0x3 &PCI_PIC 2 92 0xb000 0x0 0x0 0x4 &PCI_PIC 3 93 94 /* IDSEL 0x17 */ 95 0xb800 0x0 0x0 0x1 &PCI_PIC 4 96 0xb800 0x0 0x0 0x2 &PCI_PIC 5 97 0xb800 0x0 0x0 0x3 &PCI_PIC 6 98 0xb800 0x0 0x0 0x4 &PCI_PIC 7 99 100 /* IDSEL 0x18 */ 101 0xc000 0x0 0x0 0x1 &PCI_PIC 8 102 0xc000 0x0 0x0 0x2 &PCI_PIC 9 103 0xc000 0x0 0x0 0x3 &PCI_PIC 10 104 0xc000 0x0 0x0 0x4 &PCI_PIC 11>; 105 106 interrupt-parent = <&PIC>; 107 interrupts = <18 8>; 108 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000 109 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 110 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>; 111 }; 112 113 soc@f0000000 { 114 #address-cells = <1>; 115 #size-cells = <1>; 116 device_type = "soc"; 117 compatible = "fsl,mpc8280", "fsl,pq2-soc"; 118 ranges = <0x0 0xf0000000 0x53000>; 119 120 // Temporary -- will go away once kernel uses ranges for get_immrbase(). 121 reg = <0xf0000000 0x53000>; 122 123 cpm@119c0 { 124 #address-cells = <1>; 125 #size-cells = <1>; 126 #interrupt-cells = <2>; 127 compatible = "fsl,mpc8280-cpm", "fsl,cpm2"; 128 reg = <0x119c0 0x30>; 129 ranges; 130 131 muram@0 { 132 #address-cells = <1>; 133 #size-cells = <1>; 134 ranges = <0x0 0x0 0x10000>; 135 136 data@0 { 137 compatible = "fsl,cpm-muram-data"; 138 reg = <0x0 0x2000 0x9800 0x800>; 139 }; 140 }; 141 142 brg@119f0 { 143 compatible = "fsl,mpc8280-brg", 144 "fsl,cpm2-brg", 145 "fsl,cpm-brg"; 146 reg = <0x119f0 0x10 0x115f0 0x10>; 147 }; 148 149 serial0: serial@11a00 { 150 device_type = "serial"; 151 compatible = "fsl,mpc8280-scc-uart", 152 "fsl,cpm2-scc-uart"; 153 reg = <0x11a00 0x20 0x8000 0x100>; 154 interrupts = <40 8>; 155 interrupt-parent = <&PIC>; 156 fsl,cpm-brg = <1>; 157 fsl,cpm-command = <0x800000>; 158 }; 159 160 serial1: serial@11a20 { 161 device_type = "serial"; 162 compatible = "fsl,mpc8280-scc-uart", 163 "fsl,cpm2-scc-uart"; 164 reg = <0x11a20 0x20 0x8100 0x100>; 165 interrupts = <41 8>; 166 interrupt-parent = <&PIC>; 167 fsl,cpm-brg = <2>; 168 fsl,cpm-command = <0x4a00000>; 169 }; 170 171 enet0: ethernet@11320 { 172 device_type = "network"; 173 compatible = "fsl,mpc8280-fcc-enet", 174 "fsl,cpm2-fcc-enet"; 175 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; 176 interrupts = <33 8>; 177 interrupt-parent = <&PIC>; 178 phy-handle = <&PHY0>; 179 linux,network-index = <0>; 180 fsl,cpm-command = <0x16200300>; 181 }; 182 183 enet1: ethernet@11340 { 184 device_type = "network"; 185 compatible = "fsl,mpc8280-fcc-enet", 186 "fsl,cpm2-fcc-enet"; 187 reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>; 188 interrupts = <34 8>; 189 interrupt-parent = <&PIC>; 190 phy-handle = <&PHY1>; 191 linux,network-index = <1>; 192 fsl,cpm-command = <0x1a400300>; 193 local-mac-address = [00 e0 0c 00 79 01]; 194 }; 195 196 mdio@10d40 { 197 compatible = "fsl,pq2fads-mdio-bitbang", 198 "fsl,mpc8280-mdio-bitbang", 199 "fsl,cpm2-mdio-bitbang"; 200 #address-cells = <1>; 201 #size-cells = <0>; 202 reg = <0x10d40 0x14>; 203 fsl,mdio-pin = <9>; 204 fsl,mdc-pin = <10>; 205 206 PHY0: ethernet-phy@0 { 207 interrupt-parent = <&PIC>; 208 interrupts = <25 2>; 209 reg = <0x0>; 210 }; 211 212 PHY1: ethernet-phy@1 { 213 interrupt-parent = <&PIC>; 214 interrupts = <25 2>; 215 reg = <0x3>; 216 }; 217 }; 218 219 usb@11b60 { 220 #address-cells = <1>; 221 #size-cells = <0>; 222 compatible = "fsl,mpc8280-usb", 223 "fsl,cpm2-usb"; 224 reg = <0x11b60 0x18 0x8b00 0x100>; 225 interrupt-parent = <&PIC>; 226 interrupts = <11 8>; 227 fsl,cpm-command = <0x2e600000>; 228 }; 229 }; 230 231 PIC: interrupt-controller@10c00 { 232 #interrupt-cells = <2>; 233 interrupt-controller; 234 reg = <0x10c00 0x80>; 235 compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic"; 236 }; 237 238 }; 239 240 chosen { 241 stdout-path = "/soc/cpm/serial@11a00"; 242 }; 243}; 244