1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Microsemi Corporation 4 */ 5 6/dts-v1/; 7#include "jaguar2_common.dtsi" 8#include <dt-bindings/gpio/gpio.h> 9 10/ { 11 model = "Jaguar2 Cu8-Sfp16 PCB110 Reference Board"; 12 compatible = "mscc,jr2-pcb110", "mscc,jr2"; 13 14 aliases { 15 i2c0 = &i2c0; 16 i2c108 = &i2c108; 17 i2c109 = &i2c109; 18 i2c110 = &i2c110; 19 i2c111 = &i2c111; 20 i2c112 = &i2c112; 21 i2c113 = &i2c113; 22 i2c114 = &i2c114; 23 i2c115 = &i2c115; 24 i2c116 = &i2c116; 25 i2c117 = &i2c117; 26 i2c118 = &i2c118; 27 i2c119 = &i2c119; 28 i2c120 = &i2c120; 29 i2c121 = &i2c121; 30 i2c122 = &i2c122; 31 i2c123 = &i2c123; 32 i2c124 = &i2c124; 33 i2c125 = &i2c125; 34 i2c126 = &i2c126; 35 i2c127 = &i2c127; 36 i2c128 = &i2c128; 37 i2c129 = &i2c129; 38 i2c130 = &i2c130; 39 i2c131 = &i2c131; 40 i2c149 = &i2c149; 41 i2c150 = &i2c150; 42 i2c151 = &i2c151; 43 i2c152 = &i2c152; 44 }; 45 i2c0_imux: i2c0-imux { 46 compatible = "i2c-mux-pinctrl"; 47 #address-cells = <1>; 48 #size-cells = <0>; 49 i2c-parent = <&i2c0>; 50 pinctrl-names = 51 "i2c149", "i2c150", "i2c151", "i2c152", "idle"; 52 pinctrl-0 = <&i2cmux_0>; 53 pinctrl-1 = <&i2cmux_1>; 54 pinctrl-2 = <&i2cmux_2>; 55 pinctrl-3 = <&i2cmux_3>; 56 pinctrl-4 = <&i2cmux_pins_i>; 57 i2c149: i2c@0 { 58 reg = <0x0>; 59 #address-cells = <1>; 60 #size-cells = <0>; 61 }; 62 i2c150: i2c@1 { 63 reg = <0x1>; 64 #address-cells = <1>; 65 #size-cells = <0>; 66 }; 67 i2c151: i2c@2 { 68 reg = <0x2>; 69 #address-cells = <1>; 70 #size-cells = <0>; 71 }; 72 i2c152: i2c@3 { 73 reg = <0x3>; 74 #address-cells = <1>; 75 #size-cells = <0>; 76 }; 77 }; 78 i2c0_emux: i2c0-emux { 79 compatible = "i2c-mux-gpio"; 80 #address-cells = <1>; 81 #size-cells = <0>; 82 i2c-parent = <&i2c0>; 83 mux-gpios = <&gpio 51 GPIO_ACTIVE_HIGH 84 &gpio 52 GPIO_ACTIVE_HIGH 85 &gpio 53 GPIO_ACTIVE_HIGH 86 &gpio 58 GPIO_ACTIVE_HIGH 87 &gpio 59 GPIO_ACTIVE_HIGH>; 88 idle-state = <0x0>; 89 i2c108: i2c@10 { 90 reg = <0x10>; 91 #address-cells = <1>; 92 #size-cells = <0>; 93 }; 94 i2c109: i2c@11 { 95 reg = <0x11>; 96 #address-cells = <1>; 97 #size-cells = <0>; 98 }; 99 i2c110: i2c@12 { 100 reg = <0x12>; 101 #address-cells = <1>; 102 #size-cells = <0>; 103 }; 104 i2c111: i2c@13 { 105 reg = <0x13>; 106 #address-cells = <1>; 107 #size-cells = <0>; 108 }; 109 i2c112: i2c@14 { 110 reg = <0x14>; 111 #address-cells = <1>; 112 #size-cells = <0>; 113 }; 114 i2c113: i2c@15 { 115 reg = <0x15>; 116 #address-cells = <1>; 117 #size-cells = <0>; 118 }; 119 i2c114: i2c@16 { 120 reg = <0x16>; 121 #address-cells = <1>; 122 #size-cells = <0>; 123 }; 124 i2c115: i2c@17 { 125 reg = <0x17>; 126 #address-cells = <1>; 127 #size-cells = <0>; 128 }; 129 i2c116: i2c@8 { 130 reg = <0x8>; 131 #address-cells = <1>; 132 #size-cells = <0>; 133 }; 134 i2c117: i2c@9 { 135 reg = <0x9>; 136 #address-cells = <1>; 137 #size-cells = <0>; 138 }; 139 i2c118: i2c@a { 140 reg = <0xa>; 141 #address-cells = <1>; 142 #size-cells = <0>; 143 }; 144 i2c119: i2c@b { 145 reg = <0xb>; 146 #address-cells = <1>; 147 #size-cells = <0>; 148 }; 149 i2c120: i2c@c { 150 reg = <0xc>; 151 #address-cells = <1>; 152 #size-cells = <0>; 153 }; 154 i2c121: i2c@d { 155 reg = <0xd>; 156 #address-cells = <1>; 157 #size-cells = <0>; 158 }; 159 i2c122: i2c@e { 160 reg = <0xe>; 161 #address-cells = <1>; 162 #size-cells = <0>; 163 }; 164 i2c123: i2c@f { 165 reg = <0xf>; 166 #address-cells = <1>; 167 #size-cells = <0>; 168 }; 169 }; 170}; 171 172&gpio { 173 synce_pins: synce-pins { 174 // GPIO 16 == SI_nCS1 175 pins = "GPIO_16"; 176 function = "si"; 177 }; 178 synce_builtin_pins: synce-builtin-pins { 179 // GPIO 49 == SI_nCS13 180 pins = "GPIO_49"; 181 function = "si"; 182 }; 183 i2cmux_pins_i: i2cmux-pins { 184 pins = "GPIO_17", "GPIO_18", "GPIO_20", "GPIO_21"; 185 function = "twi_scl_m"; 186 output-low; 187 }; 188 i2cmux_0: i2cmux-0-pins { 189 pins = "GPIO_17"; 190 function = "twi_scl_m"; 191 output-high; 192 }; 193 i2cmux_1: i2cmux-1-pins { 194 pins = "GPIO_18"; 195 function = "twi_scl_m"; 196 output-high; 197 }; 198 i2cmux_2: i2cmux-2-pins { 199 pins = "GPIO_20"; 200 function = "twi_scl_m"; 201 output-high; 202 }; 203 i2cmux_3: i2cmux-3-pins { 204 pins = "GPIO_21"; 205 function = "twi_scl_m"; 206 output-high; 207 }; 208}; 209 210&i2c0 { 211 pca9545@70 { 212 compatible = "nxp,pca9545"; 213 reg = <0x70>; 214 #address-cells = <1>; 215 #size-cells = <0>; 216 i2c-mux-idle-disconnect; 217 i2c124: i2c@0 { 218 #address-cells = <1>; 219 #size-cells = <0>; 220 reg = <0>; 221 }; 222 i2c125: i2c@1 { 223 /* FMC B */ 224 #address-cells = <1>; 225 #size-cells = <0>; 226 reg = <1>; 227 }; 228 i2c126: i2c@2 { 229 #address-cells = <1>; 230 #size-cells = <0>; 231 reg = <2>; 232 }; 233 i2c127: i2c@3 { 234 #address-cells = <1>; 235 #size-cells = <0>; 236 reg = <3>; 237 }; 238 }; 239 pca9545@71 { 240 compatible = "nxp,pca9545"; 241 reg = <0x71>; 242 #address-cells = <1>; 243 #size-cells = <0>; 244 i2c-mux-idle-disconnect; 245 i2c128: i2c@0 { 246 #address-cells = <1>; 247 #size-cells = <0>; 248 reg = <0>; 249 }; 250 i2c129: i2c@1 { 251 /* FMC B */ 252 #address-cells = <1>; 253 #size-cells = <0>; 254 reg = <1>; 255 }; 256 i2c130: i2c@2 { 257 #address-cells = <1>; 258 #size-cells = <0>; 259 reg = <2>; 260 }; 261 i2c131: i2c@3 { 262 #address-cells = <1>; 263 #size-cells = <0>; 264 reg = <3>; 265 }; 266 }; 267}; 268