xref: /freebsd/sys/contrib/device-tree/src/mips/loongson/ls7a-pch.dtsi (revision 5956d97f4b3204318ceb6aa9c77bd0bc6ea87a41) 
1// SPDX-License-Identifier: GPL-2.0
2
3/ {
4	pch: bus@10000000 {
5		compatible = "simple-bus";
6		#address-cells = <2>;
7		#size-cells = <2>;
8		ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9				0 0x20000000 0 0x20000000 0 0x10000000
10				0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11				0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
12
13		pic: interrupt-controller@10000000 {
14			compatible = "loongson,pch-pic-1.0";
15			reg = <0 0x10000000 0 0x400>;
16			interrupt-controller;
17			interrupt-parent = <&htvec>;
18			loongson,pic-base-vec = <0>;
19			#interrupt-cells = <2>;
20		};
21
22		ls7a_uart0: serial@10080000 {
23			compatible = "ns16550a";
24			reg = <0 0x10080000 0 0x100>;
25			clock-frequency = <50000000>;
26			interrupt-parent = <&pic>;
27			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
28			no-loopback-test;
29		};
30
31		ls7a_uart1: serial@10080100 {
32			status = "disabled";
33			compatible = "ns16550a";
34			reg = <0 0x10080100 0 0x100>;
35			clock-frequency = <50000000>;
36			interrupt-parent = <&pic>;
37			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
38			no-loopback-test;
39		};
40
41		ls7a_uart2: serial@10080200 {
42			status = "disabled";
43			compatible = "ns16550a";
44			reg = <0 0x10080200 0 0x100>;
45			clock-frequency = <50000000>;
46			interrupt-parent = <&pic>;
47			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
48			no-loopback-test;
49		};
50
51		ls7a_uart3: serial@10080300 {
52			status = "disabled";
53			compatible = "ns16550a";
54			reg = <0 0x10080300 0 0x100>;
55			clock-frequency = <50000000>;
56			interrupt-parent = <&pic>;
57			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
58			no-loopback-test;
59		};
60
61		pci@1a000000 {
62			compatible = "loongson,ls7a-pci";
63			device_type = "pci";
64			#address-cells = <3>;
65			#size-cells = <2>;
66			#interrupt-cells = <2>;
67			msi-parent = <&msi>;
68
69			reg = <0 0x1a000000 0 0x02000000>,
70				<0xefe 0x00000000 0 0x20000000>;
71
72			ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
73				 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
74
75			ohci@4,0 {
76				compatible = "pci0014,7a24.0",
77						   "pci0014,7a24",
78						   "pciclass0c0310",
79						   "pciclass0c03";
80
81				reg = <0x2000 0x0 0x0 0x0 0x0>;
82				interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
83				interrupt-parent = <&pic>;
84			};
85
86			ehci@4,1 {
87				compatible = "pci0014,7a14.0",
88						   "pci0014,7a14",
89						   "pciclass0c0320",
90						   "pciclass0c03";
91
92				reg = <0x2100 0x0 0x0 0x0 0x0>;
93				interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
94				interrupt-parent = <&pic>;
95			};
96
97			ohci@5,0 {
98				compatible = "pci0014,7a24.0",
99						   "pci0014,7a24",
100						   "pciclass0c0310",
101						   "pciclass0c03";
102
103				reg = <0x2800 0x0 0x0 0x0 0x0>;
104				interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
105				interrupt-parent = <&pic>;
106			};
107
108			ehci@5,1 {
109				compatible = "pci0014,7a14.0",
110						   "pci0014,7a14",
111						   "pciclass0c0320",
112						   "pciclass0c03";
113
114				reg = <0x2900 0x0 0x0 0x0 0x0>;
115				interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
116				interrupt-parent = <&pic>;
117			};
118
119			sata@8,0 {
120				compatible = "pci0014,7a08.0",
121						   "pci0014,7a08",
122						   "pciclass010601",
123						   "pciclass0106";
124
125				reg = <0x4000 0x0 0x0 0x0 0x0>;
126				interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
127				interrupt-parent = <&pic>;
128			};
129
130			sata@8,1 {
131				compatible = "pci0014,7a08.0",
132						   "pci0014,7a08",
133						   "pciclass010601",
134						   "pciclass0106";
135
136				reg = <0x4100 0x0 0x0 0x0 0x0>;
137				interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
138				interrupt-parent = <&pic>;
139			};
140
141			sata@8,2 {
142				compatible = "pci0014,7a08.0",
143						   "pci0014,7a08",
144						   "pciclass010601",
145						   "pciclass0106";
146
147				reg = <0x4200 0x0 0x0 0x0 0x0>;
148				interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
149				interrupt-parent = <&pic>;
150			};
151
152			gpu@6,0 {
153				compatible = "pci0014,7a15.0",
154						   "pci0014,7a15",
155						   "pciclass030200",
156						   "pciclass0302";
157
158				reg = <0x3000 0x0 0x0 0x0 0x0>;
159				interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
160				interrupt-parent = <&pic>;
161			};
162
163			dc@6,1 {
164				compatible = "pci0014,7a06.0",
165						   "pci0014,7a06",
166						   "pciclass030000",
167						   "pciclass0300";
168
169				reg = <0x3100 0x0 0x0 0x0 0x0>;
170				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
171				interrupt-parent = <&pic>;
172			};
173
174			hda@7,0 {
175				compatible = "pci0014,7a07.0",
176						   "pci0014,7a07",
177						   "pciclass040300",
178						   "pciclass0403";
179
180				reg = <0x3800 0x0 0x0 0x0 0x0>;
181				interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
182				interrupt-parent = <&pic>;
183			};
184
185			gmac@3,0 {
186				compatible = "pci0014,7a03.0",
187						   "pci0014,7a03",
188						   "pciclass020000",
189						   "pciclass0200",
190						   "loongson, pci-gmac";
191
192				reg = <0x1800 0x0 0x0 0x0 0x0>;
193				interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
194					     <13 IRQ_TYPE_LEVEL_HIGH>;
195				interrupt-names = "macirq", "eth_lpi";
196				interrupt-parent = <&pic>;
197				phy-mode = "rgmii";
198				mdio {
199					#address-cells = <1>;
200					#size-cells = <0>;
201					compatible = "snps,dwmac-mdio";
202					phy0: ethernet-phy@0 {
203						reg = <0>;
204					};
205				};
206			};
207
208			gmac@3,1 {
209				compatible = "pci0014,7a03.0",
210						   "pci0014,7a03",
211						   "pciclass020000",
212						   "pciclass0200",
213						   "loongson, pci-gmac";
214
215				reg = <0x1900 0x0 0x0 0x0 0x0>;
216				interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
217					     <15 IRQ_TYPE_LEVEL_HIGH>;
218				interrupt-names = "macirq", "eth_lpi";
219				interrupt-parent = <&pic>;
220				phy-mode = "rgmii";
221				mdio {
222					#address-cells = <1>;
223					#size-cells = <0>;
224					compatible = "snps,dwmac-mdio";
225					phy1: ethernet-phy@1 {
226						reg = <0>;
227					};
228				};
229			};
230
231			pci_bridge@9,0 {
232				compatible = "pci0014,7a19.1",
233						   "pci0014,7a19",
234						   "pciclass060400",
235						   "pciclass0604";
236
237				reg = <0x4800 0x0 0x0 0x0 0x0>;
238				interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
239				interrupt-parent = <&pic>;
240
241				#interrupt-cells = <1>;
242				interrupt-map-mask = <0 0 0 0>;
243				interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
244			};
245
246			pci_bridge@a,0 {
247				compatible = "pci0014,7a09.1",
248						   "pci0014,7a09",
249						   "pciclass060400",
250						   "pciclass0604";
251
252				reg = <0x5000 0x0 0x0 0x0 0x0>;
253				interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
254				interrupt-parent = <&pic>;
255
256				#interrupt-cells = <1>;
257				interrupt-map-mask = <0 0 0 0>;
258				interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
259			};
260
261			pci_bridge@b,0 {
262				compatible = "pci0014,7a09.1",
263						   "pci0014,7a09",
264						   "pciclass060400",
265						   "pciclass0604";
266
267				reg = <0x5800 0x0 0x0 0x0 0x0>;
268				interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
269				interrupt-parent = <&pic>;
270
271				#interrupt-cells = <1>;
272				interrupt-map-mask = <0 0 0 0>;
273				interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
274			};
275
276			pci_bridge@c,0 {
277				compatible = "pci0014,7a09.1",
278						   "pci0014,7a09",
279						   "pciclass060400",
280						   "pciclass0604";
281
282				reg = <0x6000 0x0 0x0 0x0 0x0>;
283				interrupts = <35 IRQ_TYPE_LEVEL_HIGH>;
284				interrupt-parent = <&pic>;
285
286				#interrupt-cells = <1>;
287				interrupt-map-mask = <0 0 0 0>;
288				interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
289			};
290
291			pci_bridge@d,0 {
292				compatible = "pci0014,7a19.1",
293						   "pci0014,7a19",
294						   "pciclass060400",
295						   "pciclass0604";
296
297				reg = <0x6800 0x0 0x0 0x0 0x0>;
298				interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
299				interrupt-parent = <&pic>;
300
301				#interrupt-cells = <1>;
302				interrupt-map-mask = <0 0 0 0>;
303				interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
304			};
305
306			pci_bridge@e,0 {
307				compatible = "pci0014,7a09.1",
308						   "pci0014,7a09",
309						   "pciclass060400",
310						   "pciclass0604";
311
312				reg = <0x7000 0x0 0x0 0x0 0x0>;
313				interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
314				interrupt-parent = <&pic>;
315
316				#interrupt-cells = <1>;
317				interrupt-map-mask = <0 0 0 0>;
318				interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
319			};
320
321			pci_bridge@f,0 {
322				compatible = "pci0014,7a29.1",
323						   "pci0014,7a29",
324						   "pciclass060400",
325						   "pciclass0604";
326
327				reg = <0x7800 0x0 0x0 0x0 0x0>;
328				interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
329				interrupt-parent = <&pic>;
330
331				#interrupt-cells = <1>;
332				interrupt-map-mask = <0 0 0 0>;
333				interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
334			};
335
336			pci_bridge@10,0 {
337				compatible = "pci0014,7a19.1",
338						   "pci0014,7a19",
339						   "pciclass060400",
340						   "pciclass0604";
341
342				reg = <0x8000 0x0 0x0 0x0 0x0>;
343				interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
344				interrupt-parent = <&pic>;
345
346				#interrupt-cells = <1>;
347				interrupt-map-mask = <0 0 0 0>;
348				interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
349			};
350
351			pci_bridge@11,0 {
352				compatible = "pci0014,7a29.1",
353						   "pci0014,7a29",
354						   "pciclass060400",
355						   "pciclass0604";
356
357				reg = <0x8800 0x0 0x0 0x0 0x0>;
358				interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
359				interrupt-parent = <&pic>;
360
361				#interrupt-cells = <1>;
362				interrupt-map-mask = <0 0 0 0>;
363				interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
364			};
365
366			pci_bridge@12,0 {
367				compatible = "pci0014,7a19.1",
368						   "pci0014,7a19",
369						   "pciclass060400",
370						   "pciclass0604";
371
372				reg = <0x9000 0x0 0x0 0x0 0x0>;
373				interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;
374				interrupt-parent = <&pic>;
375
376				#interrupt-cells = <1>;
377				interrupt-map-mask = <0 0 0 0>;
378				interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
379			};
380
381			pci_bridge@13,0 {
382				compatible = "pci0014,7a29.1",
383						   "pci0014,7a29",
384						   "pciclass060400",
385						   "pciclass0604";
386
387				reg = <0x9800 0x0 0x0 0x0 0x0>;
388				interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
389				interrupt-parent = <&pic>;
390
391				#interrupt-cells = <1>;
392				interrupt-map-mask = <0 0 0 0>;
393				interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
394			};
395
396			pci_bridge@14,0 {
397				compatible = "pci0014,7a19.1",
398						   "pci0014,7a19",
399						   "pciclass060400",
400						   "pciclass0604";
401
402				reg = <0xa000 0x0 0x0 0x0 0x0>;
403				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
404				interrupt-parent = <&pic>;
405
406				#interrupt-cells = <1>;
407				interrupt-map-mask = <0 0 0 0>;
408				interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
409			};
410		};
411
412		isa@18000000 {
413			compatible = "isa";
414			#address-cells = <2>;
415			#size-cells = <1>;
416			ranges = <1 0 0 0x18000000 0x20000>;
417		};
418	};
419};
420