1*2846c905SEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only OR MIT 2*2846c905SEmmanuel Vadot/** 3*2846c905SEmmanuel Vadot * DT Overlay for enabling PCIE0 instances of PCIe in Endpoint Configuration 4*2846c905SEmmanuel Vadot * on AM69-SK. 5*2846c905SEmmanuel Vadot * 6*2846c905SEmmanuel Vadot * AM69-SK Product Link: https://www.ti.com/tool/SK-AM69 7*2846c905SEmmanuel Vadot * 8*2846c905SEmmanuel Vadot * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ 9*2846c905SEmmanuel Vadot */ 10*2846c905SEmmanuel Vadot 11*2846c905SEmmanuel Vadot/dts-v1/; 12*2846c905SEmmanuel Vadot/plugin/; 13*2846c905SEmmanuel Vadot 14*2846c905SEmmanuel Vadot#include <dt-bindings/interrupt-controller/arm-gic.h> 15*2846c905SEmmanuel Vadot#include <dt-bindings/soc/ti,sci_pm_domain.h> 16*2846c905SEmmanuel Vadot 17*2846c905SEmmanuel Vadot#include "k3-pinctrl.h" 18*2846c905SEmmanuel Vadot 19*2846c905SEmmanuel Vadot/* 20*2846c905SEmmanuel Vadot * Since Root Complex and Endpoint modes are mutually exclusive 21*2846c905SEmmanuel Vadot * disable Root Complex mode. 22*2846c905SEmmanuel Vadot */ 23*2846c905SEmmanuel Vadot&pcie0_rc { 24*2846c905SEmmanuel Vadot status = "disabled"; 25*2846c905SEmmanuel Vadot}; 26*2846c905SEmmanuel Vadot 27*2846c905SEmmanuel Vadot&cbass_main { 28*2846c905SEmmanuel Vadot #address-cells = <2>; 29*2846c905SEmmanuel Vadot #size-cells = <2>; 30*2846c905SEmmanuel Vadot interrupt-parent = <&gic500>; 31*2846c905SEmmanuel Vadot 32*2846c905SEmmanuel Vadot pcie0_ep: pcie-ep@2900000 { 33*2846c905SEmmanuel Vadot compatible = "ti,j784s4-pcie-ep"; 34*2846c905SEmmanuel Vadot reg = <0x00 0x02900000 0x00 0x1000>, 35*2846c905SEmmanuel Vadot <0x00 0x02907000 0x00 0x400>, 36*2846c905SEmmanuel Vadot <0x00 0x0d000000 0x00 0x00800000>, 37*2846c905SEmmanuel Vadot <0x00 0x10000000 0x00 0x08000000>; 38*2846c905SEmmanuel Vadot reg-names = "intd_cfg", "user_cfg", "reg", "mem"; 39*2846c905SEmmanuel Vadot interrupt-names = "link_state"; 40*2846c905SEmmanuel Vadot interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>; 41*2846c905SEmmanuel Vadot max-link-speed = <3>; 42*2846c905SEmmanuel Vadot num-lanes = <4>; 43*2846c905SEmmanuel Vadot power-domains = <&k3_pds 332 TI_SCI_PD_EXCLUSIVE>; 44*2846c905SEmmanuel Vadot clocks = <&k3_clks 332 0>; 45*2846c905SEmmanuel Vadot clock-names = "fck"; 46*2846c905SEmmanuel Vadot max-functions = /bits/ 8 <6>; 47*2846c905SEmmanuel Vadot max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>; 48*2846c905SEmmanuel Vadot dma-coherent; 49*2846c905SEmmanuel Vadot phys = <&serdes1_pcie_link>; 50*2846c905SEmmanuel Vadot phy-names = "pcie-phy"; 51*2846c905SEmmanuel Vadot ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>; 52*2846c905SEmmanuel Vadot }; 53*2846c905SEmmanuel Vadot}; 54