1*b2d2a78aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2*b2d2a78aSEmmanuel Vadot/* 3*b2d2a78aSEmmanuel Vadot * IOT2050 M.2 variant, overlay for B-key PCIE0_LANE0 + E-key PCIE1_LANE0 4*b2d2a78aSEmmanuel Vadot * Copyright (c) Siemens AG, 2022-2024 5*b2d2a78aSEmmanuel Vadot * 6*b2d2a78aSEmmanuel Vadot * Authors: 7*b2d2a78aSEmmanuel Vadot * Chao Zeng <chao.zeng@siemens.com> 8*b2d2a78aSEmmanuel Vadot * Jan Kiszka <jan.kiszka@siemens.com> 9*b2d2a78aSEmmanuel Vadot */ 10*b2d2a78aSEmmanuel Vadot 11*b2d2a78aSEmmanuel Vadot/dts-v1/; 12*b2d2a78aSEmmanuel Vadot/plugin/; 13*b2d2a78aSEmmanuel Vadot 14*b2d2a78aSEmmanuel Vadot#include <dt-bindings/phy/phy.h> 15*b2d2a78aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 16*b2d2a78aSEmmanuel Vadot 17*b2d2a78aSEmmanuel Vadot&pcie0_rc { 18*b2d2a78aSEmmanuel Vadot num-lanes = <1>; 19*b2d2a78aSEmmanuel Vadot phys = <&serdes0 PHY_TYPE_PCIE 1>; 20*b2d2a78aSEmmanuel Vadot phy-names = "pcie-phy0"; 21*b2d2a78aSEmmanuel Vadot reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>; 22*b2d2a78aSEmmanuel Vadot status = "okay"; 23*b2d2a78aSEmmanuel Vadot}; 24*b2d2a78aSEmmanuel Vadot 25*b2d2a78aSEmmanuel Vadot&pcie1_rc { 26*b2d2a78aSEmmanuel Vadot status = "okay"; 27*b2d2a78aSEmmanuel Vadot}; 28