xref: /freebsd/sys/contrib/device-tree/src/arm64/ti/k3-am642-phyboard-electra-rdk.dts (revision 2e3507c25e42292b45a5482e116d278f5515d04d)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 PHYTEC America, LLC - https://www.phytec.com
4 * Author: Matt McKee <mmckee@phytec.com>
5 *
6 * Copyright (C) 2022 PHYTEC Messtechnik GmbH
7 * Author: Wadim Egorov <w.egorov@phytec.de>
8 *
9 * Product homepage:
10 * https://www.phytec.com/product/phyboard-am64x
11 */
12
13/dts-v1/;
14
15#include <dt-bindings/gpio/gpio.h>
16#include <dt-bindings/input/input.h>
17#include <dt-bindings/leds/common.h>
18#include <dt-bindings/mux/ti-serdes.h>
19#include <dt-bindings/phy/phy.h>
20#include "k3-am642.dtsi"
21#include "k3-am64-phycore-som.dtsi"
22
23/ {
24	compatible = "phytec,am642-phyboard-electra-rdk",
25		     "phytec,am64-phycore-som", "ti,am642";
26	model = "PHYTEC phyBOARD-Electra-AM64x RDK";
27
28	aliases {
29		mmc1 = &sdhci1;
30		serial2 = &main_uart0;
31		serial3 = &main_uart1;
32	};
33
34	chosen {
35		stdout-path = &main_uart0;
36	};
37
38	can_tc1: can-phy0 {
39		compatible = "ti,tcan1042";
40		pinctrl-names = "default";
41		pinctrl-0 = <&can_tc1_pins_default>;
42		#phy-cells = <0>;
43		max-bitrate = <5000000>;
44		standby-gpios = <&main_gpio0 32 GPIO_ACTIVE_HIGH>;
45	};
46
47	can_tc2: can-phy1 {
48		compatible = "ti,tcan1042";
49		pinctrl-names = "default";
50		pinctrl-0 = <&can_tc2_pins_default>;
51		#phy-cells = <0>;
52		max-bitrate = <5000000>;
53		standby-gpios = <&main_gpio0 35 GPIO_ACTIVE_HIGH>;
54	};
55
56	keys {
57		compatible = "gpio-keys";
58		autorepeat;
59		pinctrl-names = "default";
60		pinctrl-0 = <&gpio_keys_pins_default>;
61
62		key-home {
63			label = "home";
64			linux,code = <KEY_HOME>;
65			gpios = <&main_gpio0 17 GPIO_ACTIVE_HIGH>;
66		};
67
68		key-menu {
69			label = "menu";
70			linux,code = <KEY_MENU>;
71			gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>;
72		};
73	};
74
75	leds {
76		compatible = "gpio-leds";
77		pinctrl-names = "default";
78		pinctrl-0 = <&leds_pins_default &user_leds_pins_default>;
79
80		led-1 {
81			color = <LED_COLOR_ID_RED>;
82			gpios = <&main_gpio0 15 GPIO_ACTIVE_HIGH>;
83			linux,default-trigger = "mmc0";
84			function = LED_FUNCTION_DISK;
85		};
86
87		led-2 {
88			color = <LED_COLOR_ID_GREEN>;
89			gpios = <&main_gpio0 16 GPIO_ACTIVE_HIGH>;
90			linux,default-trigger = "mmc1";
91			function = LED_FUNCTION_DISK;
92		};
93	};
94
95	vcc_3v3_mmc: regulator-sd {
96		/* TPS22963C */
97		compatible = "regulator-fixed";
98		regulator-name = "VCC_3V3_MMC";
99		regulator-min-microvolt = <3300000>;
100		regulator-max-microvolt = <3300000>;
101		regulator-boot-on;
102		regulator-always-on;
103	};
104};
105
106&main_pmx0 {
107	can_tc1_pins_default: can-tc1-pins-default {
108		pinctrl-single,pins = <
109			AM64X_IOPAD(0x0084, PIN_OUTPUT, 7)	/* (P16) GPMC0_ADVn_ALE.GPIO0_32 */
110		>;
111	};
112
113	can_tc2_pins_default: can-tc2-pins-default {
114		pinctrl-single,pins = <
115			AM64X_IOPAD(0x0090, PIN_OUTPUT, 7)	/* (P17) GPMC0_BE0n_CLE.GPIO0_35 */
116		>;
117	};
118
119	gpio_keys_pins_default: gpio-keys-pins-default {
120		pinctrl-single,pins = <
121			AM64X_IOPAD(0x0044, PIN_INPUT, 7)	/* (T18) GPMC0_AD2.GPIO0_17 */
122			AM64X_IOPAD(0x0054, PIN_INPUT, 7)	/* (V20) GPMC0_AD6.GPIO0_21 */
123		>;
124	};
125
126	main_i2c1_pins_default: main-i2c1-pins-default {
127		pinctrl-single,pins = <
128			AM64X_IOPAD(0x0268, PIN_INPUT, 0)	/* (C18) I2C1_SCL */
129			AM64X_IOPAD(0x026c, PIN_INPUT, 0)	/* (B19) I2C1_SDA */
130		>;
131	};
132
133	main_mcan0_pins_default: main-mcan0-pins-default {
134		pinctrl-single,pins = <
135			AM64X_IOPAD(0x0250, PIN_OUTPUT, 0)	/* (A17) MCAN0_TX */
136			AM64X_IOPAD(0x0254, PIN_INPUT, 0)	/* (B17) MCAN0_RX */
137		>;
138	};
139
140	main_mcan1_pins_default: main-mcan1-pins-default {
141		pinctrl-single,pins = <
142			AM64X_IOPAD(0x0258, PIN_OUTPUT, 0)	/* (C17) MCAN1_TX */
143			AM64X_IOPAD(0x025c, PIN_INPUT, 0)	/* (D17) MCAN1_RX */
144		>;
145	};
146
147	main_mmc1_pins_default: main-mmc1-pins-default {
148		pinctrl-single,pins = <
149			AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0)	/* (K18) MMC1_DAT3 */
150			AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0)	/* (K19) MMC1_DAT2 */
151			AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0)	/* (L21) MMC1_DAT1 */
152			AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0)	/* (K21) MMC1_DAT0 */
153			AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0)	/* (L20) MMC1_CLK */
154			AM64X_IOPAD(0x0290, PIN_INPUT, 0)		/* MMC1_CLKLB */
155			AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0)	/* (J19) MMC1_CMD */
156			AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0)	/* (D19) MMC1_SDCD */
157		>;
158	};
159
160	main_uart0_pins_default: main-uart0-pins-default {
161		pinctrl-single,pins = <
162			AM64X_IOPAD(0x0230, PIN_INPUT, 0)	/* (D15) UART0_RXD */
163			AM64X_IOPAD(0x0234, PIN_OUTPUT, 0)	/* (C16) UART0_TXD */
164		>;
165	};
166
167	main_uart1_pins_default: main-uart1-pins-default {
168		pinctrl-single,pins = <
169			AM64X_IOPAD(0x0248, PIN_INPUT, 0)	/* (D16) UART1_CTSn */
170			AM64X_IOPAD(0x024C, PIN_OUTPUT, 0)	/* (E16) UART1_RTSn */
171			AM64X_IOPAD(0x0240, PIN_INPUT, 0)	/* (E15) UART1_RXD */
172			AM64X_IOPAD(0x0244, PIN_OUTPUT, 0)	/* (E14) UART1_TXD */
173		>;
174	};
175
176	main_usb0_pins_default: main-usb0-pins-default {
177		pinctrl-single,pins = <
178			AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0)	/* (E19) USB0_DRVVBUS */
179		>;
180	};
181
182	pcie_usb_sel_pins_default: pcie-usb-sel-pins-default {
183		pinctrl-single,pins = <
184			AM64X_IOPAD(0x017c, PIN_OUTPUT, 7)	/* (T1) PRG0_PRU0_GPO7.GPIO1_7 */
185		>;
186	};
187
188	pcie0_pins_default: pcie0-pins-default {
189		pinctrl-single,pins = <
190			AM64X_IOPAD(0x0098, PIN_OUTPUT, 7)	/* (W19) GPMC0_WAIT0.GPIO0_37 */
191		>;
192	};
193
194	user_leds_pins_default: user-leds-pins-default {
195		pinctrl-single,pins = <
196			AM64X_IOPAD(0x003c, PIN_OUTPUT, 7)	/* (T20) GPMC0_AD0.GPIO0_15 */
197			AM64X_IOPAD(0x0040, PIN_OUTPUT, 7)	/* (U21) GPMC0_AD1.GPIO0_16 */
198		>;
199	};
200};
201
202&main_i2c1 {
203	status = "okay";
204	pinctrl-names = "default";
205	pinctrl-0 = <&main_i2c1_pins_default>;
206	clock-frequency = <400000>;
207
208	eeprom@51 {
209		compatible = "atmel,24c02";
210		pagesize = <16>;
211		reg = <0x51>;
212	};
213};
214
215&main_mcan0 {
216	status = "okay";
217	pinctrl-names = "default";
218	pinctrl-0 = <&main_mcan0_pins_default>;
219	phys = <&can_tc1>;
220};
221
222&main_mcan1 {
223	status = "okay";
224	pinctrl-names = "default";
225	pinctrl-0 = <&main_mcan1_pins_default>;
226	phys = <&can_tc2>;
227};
228
229&main_uart0 {
230	status = "okay";
231	pinctrl-names = "default";
232	pinctrl-0 = <&main_uart0_pins_default>;
233};
234
235&main_uart1 {
236	status = "okay";
237	pinctrl-names = "default";
238	pinctrl-0 = <&main_uart1_pins_default>;
239	uart-has-rtscts;
240};
241
242&sdhci1 {
243	vmmc-supply = <&vcc_3v3_mmc>;
244	pinctrl-names = "default";
245	pinctrl-0 = <&main_mmc1_pins_default>;
246	bus-width = <4>;
247	ti,driver-strength-ohm = <50>;
248	disable-wp;
249	no-1-8-v;
250};
251
252&serdes0 {
253	serdes0_pcie_usb_link: phy@0 {
254		reg = <0>;
255		cdns,num-lanes = <1>;
256		#phy-cells = <0>;
257		cdns,phy-type = <PHY_TYPE_USB3>;
258		resets = <&serdes_wiz0 1>;
259	};
260};
261
262&serdes_ln_ctrl {
263	idle-states = <AM64_SERDES0_LANE0_USB>;
264};
265
266&usbss0 {
267	ti,vbus-divider;
268};
269
270&usb0 {
271	pinctrl-names = "default";
272	pinctrl-0 = <&main_usb0_pins_default>;
273	dr_mode = "host";
274	maximum-speed = "super-speed";
275	phys = <&serdes0_pcie_usb_link>;
276	phy-names = "cdns3,usb3-phy";
277};
278