1*01950c46SEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0+ 2*01950c46SEmmanuel Vadot/* 3*01950c46SEmmanuel Vadot * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> 4*01950c46SEmmanuel Vadot * 5*01950c46SEmmanuel Vadot * Overlay for SolidRun AM642 HummingBoard-T to enable PCI-E. 6*01950c46SEmmanuel Vadot */ 7*01950c46SEmmanuel Vadot 8*01950c46SEmmanuel Vadot/dts-v1/; 9*01950c46SEmmanuel Vadot/plugin/; 10*01950c46SEmmanuel Vadot 11*01950c46SEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 12*01950c46SEmmanuel Vadot#include <dt-bindings/phy/phy.h> 13*01950c46SEmmanuel Vadot 14*01950c46SEmmanuel Vadot#include "k3-serdes.h" 15*01950c46SEmmanuel Vadot 16*01950c46SEmmanuel Vadot&pcie0_rc { 17*01950c46SEmmanuel Vadot pinctrl-names = "default"; 18*01950c46SEmmanuel Vadot pinctrl-0 = <&pcie0_default_pins>; 19*01950c46SEmmanuel Vadot reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>; 20*01950c46SEmmanuel Vadot phys = <&serdes0_link>; 21*01950c46SEmmanuel Vadot phy-names = "pcie-phy"; 22*01950c46SEmmanuel Vadot num-lanes = <1>; 23*01950c46SEmmanuel Vadot status = "okay"; 24*01950c46SEmmanuel Vadot}; 25*01950c46SEmmanuel Vadot 26*01950c46SEmmanuel Vadot&serdes0 { 27*01950c46SEmmanuel Vadot #address-cells = <1>; 28*01950c46SEmmanuel Vadot #size-cells = <0>; 29*01950c46SEmmanuel Vadot 30*01950c46SEmmanuel Vadot serdes0_link: phy@0 { 31*01950c46SEmmanuel Vadot reg = <0>; 32*01950c46SEmmanuel Vadot cdns,num-lanes = <1>; 33*01950c46SEmmanuel Vadot cdns,phy-type = <PHY_TYPE_PCIE>; 34*01950c46SEmmanuel Vadot #phy-cells = <0>; 35*01950c46SEmmanuel Vadot resets = <&serdes_wiz0 1>; 36*01950c46SEmmanuel Vadot }; 37*01950c46SEmmanuel Vadot}; 38*01950c46SEmmanuel Vadot 39*01950c46SEmmanuel Vadot&serdes_ln_ctrl { 40*01950c46SEmmanuel Vadot idle-states = <AM64_SERDES0_LANE0_PCIE0>; 41*01950c46SEmmanuel Vadot}; 42*01950c46SEmmanuel Vadot 43*01950c46SEmmanuel Vadot&serdes_mux { 44*01950c46SEmmanuel Vadot idle-state = <1>; 45*01950c46SEmmanuel Vadot}; 46