1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * AM62A SK: https://www.ti.com/lit/zip/sprr459 4 * 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/leds/common.h> 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/net/ti-dp83867.h> 13#include "k3-am62a7.dtsi" 14 15/ { 16 compatible = "ti,am62a7-sk", "ti,am62a7"; 17 model = "Texas Instruments AM62A7 SK"; 18 19 aliases { 20 serial0 = &wkup_uart0; 21 serial1 = &mcu_uart0; 22 serial2 = &main_uart0; 23 serial3 = &main_uart1; 24 mmc0 = &sdhci0; 25 mmc1 = &sdhci1; 26 rtc0 = &wkup_rtc0; 27 rtc1 = &tps659312; 28 }; 29 30 chosen { 31 stdout-path = "serial2:115200n8"; 32 }; 33 34 memory@80000000 { 35 device_type = "memory"; 36 /* 4G RAM */ 37 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 38 <0x00000008 0x80000000 0x00000000 0x80000000>; 39 bootph-all; 40 }; 41 42 reserved-memory { 43 #address-cells = <2>; 44 #size-cells = <2>; 45 ranges; 46 47 /* global cma region */ 48 linux,cma { 49 compatible = "shared-dma-pool"; 50 reusable; 51 size = <0x00 0x24000000>; 52 alloc-ranges = <0x00 0xc0000000 0x00 0x24000000>; 53 linux,cma-default; 54 }; 55 56 c7x_0_dma_memory_region: c7x-dma-memory@99800000 { 57 compatible = "shared-dma-pool"; 58 reg = <0x00 0x99800000 0x00 0x100000>; 59 no-map; 60 }; 61 62 c7x_0_memory_region: c7x-memory@99900000 { 63 compatible = "shared-dma-pool"; 64 reg = <0x00 0x99900000 0x00 0xf00000>; 65 no-map; 66 }; 67 68 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { 69 compatible = "shared-dma-pool"; 70 reg = <0x00 0x9b800000 0x00 0x100000>; 71 no-map; 72 }; 73 74 mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { 75 compatible = "shared-dma-pool"; 76 reg = <0x00 0x9b900000 0x00 0xf00000>; 77 no-map; 78 }; 79 80 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { 81 compatible = "shared-dma-pool"; 82 reg = <0x00 0x9c800000 0x00 0x100000>; 83 no-map; 84 }; 85 86 wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { 87 compatible = "shared-dma-pool"; 88 reg = <0x00 0x9c900000 0x00 0xf00000>; 89 no-map; 90 }; 91 92 secure_tfa_ddr: tfa@9e780000 { 93 reg = <0x00 0x9e780000 0x00 0x80000>; 94 alignment = <0x1000>; 95 no-map; 96 }; 97 98 secure_ddr: optee@9e800000 { 99 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 100 alignment = <0x1000>; 101 no-map; 102 }; 103 }; 104 105 opp-table { 106 /* Requires VDD_CORE at 0v85 */ 107 opp-1400000000 { 108 opp-hz = /bits/ 64 <1400000000>; 109 opp-supported-hw = <0x01 0x0004>; 110 clock-latency-ns = <6000000>; 111 }; 112 }; 113 114 vmain_pd: regulator-0 { 115 /* TPS25750 PD CONTROLLER OUTPUT */ 116 compatible = "regulator-fixed"; 117 regulator-name = "vmain_pd"; 118 regulator-min-microvolt = <5000000>; 119 regulator-max-microvolt = <5000000>; 120 regulator-always-on; 121 regulator-boot-on; 122 }; 123 124 vcc_5v0: regulator-1 { 125 /* Output of TPS63070 */ 126 compatible = "regulator-fixed"; 127 regulator-name = "vcc_5v0"; 128 regulator-min-microvolt = <5000000>; 129 regulator-max-microvolt = <5000000>; 130 vin-supply = <&vmain_pd>; 131 regulator-always-on; 132 regulator-boot-on; 133 }; 134 135 vcc_3v3_main: regulator-2 { 136 /* output of LM5141-Q1 */ 137 compatible = "regulator-fixed"; 138 regulator-name = "vcc_3v3_main"; 139 regulator-min-microvolt = <3300000>; 140 regulator-max-microvolt = <3300000>; 141 vin-supply = <&vmain_pd>; 142 regulator-always-on; 143 regulator-boot-on; 144 }; 145 146 vdd_mmc1: regulator-3 { 147 /* TPS22918DBVR */ 148 compatible = "regulator-fixed"; 149 regulator-name = "vdd_mmc1"; 150 regulator-min-microvolt = <3300000>; 151 regulator-max-microvolt = <3300000>; 152 regulator-boot-on; 153 enable-active-high; 154 gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; 155 bootph-all; 156 }; 157 158 vcc_3v3_sys: regulator-4 { 159 /* output of TPS222965DSGT */ 160 compatible = "regulator-fixed"; 161 regulator-name = "vcc_3v3_sys"; 162 regulator-min-microvolt = <3300000>; 163 regulator-max-microvolt = <3300000>; 164 vin-supply = <&vcc_3v3_main>; 165 regulator-always-on; 166 regulator-boot-on; 167 }; 168 169 vddshv_sdio: regulator-5 { 170 compatible = "regulator-gpio"; 171 regulator-name = "vddshv_sdio"; 172 pinctrl-names = "default"; 173 pinctrl-0 = <&vddshv_sdio_pins_default>; 174 regulator-min-microvolt = <1800000>; 175 regulator-max-microvolt = <3300000>; 176 regulator-boot-on; 177 vin-supply = <&ldo1>; 178 gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; 179 states = <1800000 0x0>, 180 <3300000 0x1>; 181 }; 182 183 leds { 184 compatible = "gpio-leds"; 185 pinctrl-names = "default"; 186 pinctrl-0 = <&usr_led_pins_default>; 187 188 led-0 { 189 label = "am62a-sk:green:heartbeat"; 190 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>; 191 linux,default-trigger = "heartbeat"; 192 function = LED_FUNCTION_HEARTBEAT; 193 default-state = "off"; 194 }; 195 }; 196 197 tlv320_mclk: clk-0 { 198 #clock-cells = <0>; 199 compatible = "fixed-clock"; 200 clock-frequency = <12288000>; 201 }; 202 203 hdmi0: connector-hdmi { 204 compatible = "hdmi-connector"; 205 label = "hdmi"; 206 type = "a"; 207 208 port { 209 hdmi_connector_in: endpoint { 210 remote-endpoint = <&sii9022_out>; 211 }; 212 }; 213 }; 214 215 codec_audio: sound { 216 compatible = "simple-audio-card"; 217 simple-audio-card,name = "AM62Ax-SKEVM"; 218 simple-audio-card,widgets = 219 "Headphone", "Headphone Jack", 220 "Line", "Line In", 221 "Microphone", "Microphone Jack"; 222 simple-audio-card,routing = 223 "Headphone Jack", "HPLOUT", 224 "Headphone Jack", "HPROUT", 225 "LINE1L", "Line In", 226 "LINE1R", "Line In", 227 "MIC3R", "Microphone Jack", 228 "Microphone Jack", "Mic Bias"; 229 simple-audio-card,format = "dsp_b"; 230 simple-audio-card,bitclock-master = <&sound_master>; 231 simple-audio-card,frame-master = <&sound_master>; 232 simple-audio-card,bitclock-inversion; 233 234 simple-audio-card,cpu { 235 sound-dai = <&mcasp1>; 236 }; 237 238 sound_master: simple-audio-card,codec { 239 sound-dai = <&tlv320aic3106>; 240 clocks = <&tlv320_mclk>; 241 }; 242 }; 243}; 244 245&mcu_pmx0 { 246 wkup_uart0_pins_default: wkup-uart0-default-pins { 247 pinctrl-single,pins = < 248 AM62AX_MCU_IOPAD(0x0024, PIN_INPUT, 0) /* (C9) WKUP_UART0_RXD */ 249 AM62AX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (E9) WKUP_UART0_TXD */ 250 AM62AX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C10) WKUP_UART0_CTSn */ 251 AM62AX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_RTSn */ 252 >; 253 }; 254}; 255 256/* WKUP UART0 is used for DM firmware logs */ 257&wkup_uart0 { 258 pinctrl-names = "default"; 259 pinctrl-0 = <&wkup_uart0_pins_default>; 260 status = "reserved"; 261}; 262 263&main_pmx0 { 264 main_dss0_pins_default: main-dss0-default-pins { 265 pinctrl-single,pins = < 266 AM62AX_IOPAD(0x100, PIN_OUTPUT, 0) /* (V17) VOUT0_VSYNC */ 267 AM62AX_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (T18) VOUT0_HSYNC */ 268 AM62AX_IOPAD(0x104, PIN_OUTPUT, 0) /* (AA22) VOUT0_PCLK */ 269 AM62AX_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (U17) VOUT0_DE */ 270 AM62AX_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */ 271 AM62AX_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (U21) VOUT0_DATA1 */ 272 AM62AX_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (U20) VOUT0_DATA2 */ 273 AM62AX_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (U19) VOUT0_DATA3 */ 274 AM62AX_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (T19) VOUT0_DATA4 */ 275 AM62AX_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (U18) VOUT0_DATA5 */ 276 AM62AX_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (V22) VOUT0_DATA6 */ 277 AM62AX_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA7 */ 278 AM62AX_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V19) VOUT0_DATA8 */ 279 AM62AX_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (V18) VOUT0_DATA9 */ 280 AM62AX_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (W22) VOUT0_DATA10 */ 281 AM62AX_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA11 */ 282 AM62AX_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (W20) VOUT0_DATA12 */ 283 AM62AX_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (W19) VOUT0_DATA13 */ 284 AM62AX_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y21) VOUT0_DATA14 */ 285 AM62AX_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA15 */ 286 AM62AX_IOPAD(0x05c, PIN_OUTPUT, 1) /* (P22) GPMC0_AD8.VOUT0_DATA16 */ 287 AM62AX_IOPAD(0x060, PIN_OUTPUT, 1) /* (R19) GPMC0_AD9.VOUT0_DATA17 */ 288 AM62AX_IOPAD(0x064, PIN_OUTPUT, 1) /* (R20) GPMC0_AD10.VOUT0_DATA18 */ 289 AM62AX_IOPAD(0x068, PIN_OUTPUT, 1) /* (R22) GPMC0_AD11.VOUT0_DATA19 */ 290 AM62AX_IOPAD(0x06c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */ 291 AM62AX_IOPAD(0x070, PIN_OUTPUT, 1) /* (R21) GPMC0_AD13.VOUT0_DATA21 */ 292 AM62AX_IOPAD(0x074, PIN_OUTPUT, 1) /* (T20) GPMC0_AD14.VOUT0_DATA22 */ 293 AM62AX_IOPAD(0x078, PIN_OUTPUT, 1) /* (T21) GPMC0_AD15.VOUT0_DATA23 */ 294 >; 295 }; 296 297 main_uart0_pins_default: main-uart0-default-pins { 298 pinctrl-single,pins = < 299 AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (E14) UART0_RXD */ 300 AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */ 301 >; 302 bootph-all; 303 }; 304 305 main_uart1_pins_default: main-uart1-default-pins { 306 pinctrl-single,pins = < 307 AM62AX_IOPAD(0x01ac, PIN_INPUT, 2) /* (B21) MCASP0_AFSR.UART1_RXD */ 308 AM62AX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (A21) MCASP0_ACLKR.UART1_TXD */ 309 AM62AX_IOPAD(0x0194, PIN_INPUT, 2) /* (C19) MCASP0_AXR3.UART1_CTSn */ 310 AM62AX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (B19) MCASP0_AXR2.UART1_RTSn */ 311 >; 312 }; 313 314 main_i2c0_pins_default: main-i2c0-default-pins { 315 pinctrl-single,pins = < 316 AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */ 317 AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */ 318 >; 319 }; 320 321 main_i2c1_pins_default: main-i2c1-default-pins { 322 pinctrl-single,pins = < 323 AM62AX_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ 324 AM62AX_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ 325 >; 326 bootph-all; 327 }; 328 329 main_i2c2_pins_default: main-i2c2-default-pins { 330 pinctrl-single,pins = < 331 AM62AX_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ 332 AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ 333 >; 334 }; 335 336 main_mmc0_pins_default: main-mmc0-default-pins { 337 pinctrl-single,pins = < 338 AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ 339 AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLKLB */ 340 AM62AX_IOPAD(0x21c, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ 341 AM62AX_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ 342 AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ 343 AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ 344 AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */ 345 AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */ 346 AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ 347 AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ 348 AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ 349 >; 350 bootph-all; 351 }; 352 353 main_mmc1_pins_default: main-mmc1-default-pins { 354 pinctrl-single,pins = < 355 AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ 356 AM62AX_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ 357 AM62AX_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ 358 AM62AX_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ 359 AM62AX_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ 360 AM62AX_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ 361 AM62AX_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */ 362 >; 363 bootph-all; 364 }; 365 366 usr_led_pins_default: usr-led-default-pins { 367 pinctrl-single,pins = < 368 AM62AX_IOPAD(0x244, PIN_OUTPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */ 369 >; 370 }; 371 372 main_usb1_pins_default: main-usb1-default-pins { 373 pinctrl-single,pins = < 374 AM62AX_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */ 375 >; 376 }; 377 378 main_mdio1_pins_default: main-mdio1-default-pins { 379 pinctrl-single,pins = < 380 AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */ 381 AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */ 382 >; 383 bootph-all; 384 }; 385 386 main_rgmii1_pins_default: main-rgmii1-default-pins { 387 pinctrl-single,pins = < 388 AM62AX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */ 389 AM62AX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */ 390 AM62AX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */ 391 AM62AX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */ 392 AM62AX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */ 393 AM62AX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */ 394 AM62AX_IOPAD(0x134, PIN_INPUT, 0) /* (Y17) RGMII1_TD0 */ 395 AM62AX_IOPAD(0x138, PIN_INPUT, 0) /* (V16) RGMII1_TD1 */ 396 AM62AX_IOPAD(0x13c, PIN_INPUT, 0) /* (Y16) RGMII1_TD2 */ 397 AM62AX_IOPAD(0x140, PIN_INPUT, 0) /* (AA17) RGMII1_TD3 */ 398 AM62AX_IOPAD(0x130, PIN_INPUT, 0) /* (AB17) RGMII1_TXC */ 399 AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */ 400 >; 401 bootph-all; 402 }; 403 404 main_mcasp1_pins_default: main-mcasp1-default-pins { 405 pinctrl-single,pins = < 406 AM62AX_IOPAD(0x090, PIN_INPUT, 2) /* (L19) GPMC0_BE0n_CLE.MCASP1_ACLKX */ 407 AM62AX_IOPAD(0x098, PIN_INPUT, 2) /* (R18) GPMC0_WAIT0.MCASP1_AFSX */ 408 AM62AX_IOPAD(0x08c, PIN_OUTPUT, 2) /* (K19) GPMC0_WEn.MCASP1_AXR0 */ 409 AM62AX_IOPAD(0x084, PIN_INPUT, 2) /* (L18) GPMC0_ADVn_ALE.MCASP1_AXR2 */ 410 >; 411 }; 412 413 main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { 414 pinctrl-single,pins = < 415 AM62AX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */ 416 >; 417 }; 418 419 vddshv_sdio_pins_default: vddshv-sdio-default-pins { 420 pinctrl-single,pins = < 421 AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */ 422 >; 423 }; 424 425 main_ecap0_pins_default: main-ecap0-default-pins { 426 pinctrl-single,pins = < 427 AM62AX_IOPAD(0x01b8, PIN_OUTPUT, 3) /* (C16) SPI0_CS1.ECAP0_IN_APWM_OUT */ 428 >; 429 }; 430 431 main_ecap2_pins_default: main-ecap2-default-pins { 432 pinctrl-single,pins = < 433 AM62AX_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (A19) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */ 434 >; 435 }; 436 437 main_epwm1_pins_default: main-epwm1-default-pins { 438 pinctrl-single,pins = < 439 AM62AX_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */ 440 AM62AX_IOPAD(0x01a0, PIN_OUTPUT, 6) /* (B20) MCASP0_AXR0.EHRPWM1_B */ 441 >; 442 }; 443}; 444 445&mcu_pmx0 { 446 status = "okay"; 447 448 pmic_irq_pins_default: pmic-irq-default-pins { 449 pinctrl-single,pins = < 450 AM62AX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */ 451 >; 452 }; 453}; 454 455&mcu_gpio0 { 456 status = "okay"; 457}; 458 459&main_i2c0 { 460 status = "okay"; 461 pinctrl-names = "default"; 462 pinctrl-0 = <&main_i2c0_pins_default>; 463 clock-frequency = <400000>; 464 465 typec_pd0: usb-power-controller@3f { 466 compatible = "ti,tps6598x"; 467 reg = <0x3f>; 468 469 connector { 470 compatible = "usb-c-connector"; 471 label = "USB-C"; 472 self-powered; 473 data-role = "dual"; 474 power-role = "sink"; 475 port { 476 usb_con_hs: endpoint { 477 remote-endpoint = <&usb0_hs_ep>; 478 }; 479 }; 480 }; 481 }; 482 483 tps659312: pmic@48 { 484 compatible = "ti,tps6593-q1"; 485 reg = <0x48>; 486 ti,primary-pmic; 487 system-power-controller; 488 489 gpio-controller; 490 #gpio-cells = <2>; 491 492 pinctrl-names = "default"; 493 pinctrl-0 = <&pmic_irq_pins_default>; 494 interrupt-parent = <&mcu_gpio0>; 495 interrupts = <0 IRQ_TYPE_EDGE_FALLING>; 496 497 buck123-supply = <&vcc_3v3_sys>; 498 buck4-supply = <&vcc_3v3_sys>; 499 buck5-supply = <&vcc_3v3_sys>; 500 ldo1-supply = <&vcc_3v3_sys>; 501 ldo2-supply = <&vcc_3v3_sys>; 502 ldo3-supply = <&buck5>; 503 ldo4-supply = <&vcc_3v3_sys>; 504 505 regulators { 506 buck123: buck123 { 507 regulator-name = "vcc_core"; 508 regulator-min-microvolt = <715000>; 509 regulator-max-microvolt = <895000>; 510 regulator-boot-on; 511 regulator-always-on; 512 }; 513 514 buck4: buck4 { 515 regulator-name = "vcc_1v1"; 516 regulator-min-microvolt = <1100000>; 517 regulator-max-microvolt = <1100000>; 518 regulator-boot-on; 519 regulator-always-on; 520 }; 521 522 buck5: buck5 { 523 regulator-name = "vcc_1v8_sys"; 524 regulator-min-microvolt = <1800000>; 525 regulator-max-microvolt = <1800000>; 526 regulator-boot-on; 527 regulator-always-on; 528 }; 529 530 ldo1: ldo1 { 531 regulator-name = "vddshv5_sdio"; 532 regulator-min-microvolt = <3300000>; 533 regulator-max-microvolt = <3300000>; 534 regulator-boot-on; 535 regulator-always-on; 536 }; 537 538 ldo2: ldo2 { 539 regulator-name = "vpp_1v8"; 540 regulator-min-microvolt = <1800000>; 541 regulator-max-microvolt = <1800000>; 542 regulator-boot-on; 543 regulator-always-on; 544 }; 545 546 ldo3: ldo3 { 547 regulator-name = "vcc_0v85"; 548 regulator-min-microvolt = <850000>; 549 regulator-max-microvolt = <850000>; 550 regulator-boot-on; 551 regulator-always-on; 552 }; 553 554 ldo4: ldo4 { 555 regulator-name = "vdda_1v8"; 556 regulator-min-microvolt = <1800000>; 557 regulator-max-microvolt = <1800000>; 558 regulator-boot-on; 559 regulator-always-on; 560 }; 561 }; 562 }; 563}; 564 565&main_i2c1 { 566 status = "okay"; 567 pinctrl-names = "default"; 568 pinctrl-0 = <&main_i2c1_pins_default>; 569 clock-frequency = <100000>; 570 571 exp1: gpio@22 { 572 compatible = "ti,tca6424"; 573 reg = <0x22>; 574 gpio-controller; 575 #gpio-cells = <2>; 576 interrupt-parent = <&main_gpio1>; 577 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; 578 interrupt-controller; 579 #interrupt-cells = <2>; 580 pinctrl-names = "default"; 581 pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; 582 bootph-all; 583 584 gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", 585 "BT_EN_SOC", "MMC1_SD_EN", 586 "VPP_EN", "EXP_PS_3V3_En", 587 "EXP_PS_5V0_En", "EXP_HAT_DETECT", 588 "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn", 589 "UART1_FET_BUF_EN", "BT_UART_WAKE_SOC", 590 "GPIO_HDMI_RSTn", "CSI_GPIO0", 591 "CSI_GPIO1", "WLAN_ALERTn", 592 "HDMI_INTn", "TEST_GPIO2", 593 "MCASP1_FET_EN", "MCASP1_BUF_BT_EN", 594 "MCASP1_FET_SEL", "UART1_FET_SEL", 595 "PD_I2C_IRQ", "IO_EXP_TEST_LED"; 596 }; 597 598 tlv320aic3106: audio-codec@1b { 599 #sound-dai-cells = <0>; 600 compatible = "ti,tlv320aic3106"; 601 reg = <0x1b>; 602 ai3x-micbias-vg = <1>; /* 2.0V */ 603 604 /* Regulators */ 605 AVDD-supply = <&vcc_3v3_sys>; 606 IOVDD-supply = <&vcc_3v3_sys>; 607 DRVDD-supply = <&vcc_3v3_sys>; 608 DVDD-supply = <&buck5>; 609 }; 610 611 exp2: gpio@23 { 612 compatible = "ti,tca6424"; 613 reg = <0x23>; 614 gpio-controller; 615 #gpio-cells = <2>; 616 617 gpio-line-names = "", "", 618 "", "", 619 "", "", 620 "", "", 621 "WL_LT_EN", "CSI_RSTz", 622 "", "", 623 "", "", 624 "", "", 625 "SPI0_FET_SEL", "SPI0_FET_OE", 626 "RGMII2_BRD_CONN_DET", "CSI_SEL2", 627 "CSI_EN", "AUTO_100M_1000M_CONFIG", 628 "CSI_VLDO_SEL", "SoC_WLAN_SDIO_RST"; 629 }; 630 631 sii9022: bridge-hdmi@3b { 632 compatible = "sil,sii9022"; 633 reg = <0x3b>; 634 interrupt-parent = <&exp1>; 635 interrupts = <16 IRQ_TYPE_EDGE_FALLING>; 636 #sound-dai-cells = <0>; 637 sil,i2s-data-lanes = < 0 >; 638 639 ports { 640 #address-cells = <1>; 641 #size-cells = <0>; 642 643 port@0 { 644 reg = <0>; 645 646 sii9022_in: endpoint { 647 remote-endpoint = <&dpi1_out>; 648 }; 649 }; 650 651 port@1 { 652 reg = <1>; 653 654 sii9022_out: endpoint { 655 remote-endpoint = <&hdmi_connector_in>; 656 }; 657 }; 658 }; 659 }; 660}; 661 662&main_i2c2 { 663 status = "okay"; 664 pinctrl-names = "default"; 665 pinctrl-0 = <&main_i2c2_pins_default>; 666 clock-frequency = <400000>; 667}; 668 669&sdhci0 { 670 /* eMMC */ 671 status = "okay"; 672 non-removable; 673 pinctrl-names = "default"; 674 pinctrl-0 = <&main_mmc0_pins_default>; 675 bootph-all; 676}; 677 678&sdhci1 { 679 /* SD/MMC */ 680 status = "okay"; 681 vmmc-supply = <&vdd_mmc1>; 682 vqmmc-supply = <&vddshv_sdio>; 683 pinctrl-names = "default"; 684 pinctrl-0 = <&main_mmc1_pins_default>; 685 disable-wp; 686 bootph-all; 687}; 688 689&main_gpio0 { 690 status = "okay"; 691 bootph-all; 692}; 693 694&main_gpio1 { 695 status = "okay"; 696}; 697 698&main_gpio_intr { 699 status = "okay"; 700}; 701 702&main_uart0 { 703 status = "okay"; 704 pinctrl-names = "default"; 705 pinctrl-0 = <&main_uart0_pins_default>; 706 bootph-all; 707}; 708 709/* Main UART1 is used for TIFS firmware logs */ 710&main_uart1 { 711 pinctrl-names = "default"; 712 pinctrl-0 = <&main_uart1_pins_default>; 713 status = "reserved"; 714}; 715 716/* main_timer2 is used by C7x DSP */ 717&main_timer2 { 718 status = "reserved"; 719}; 720 721&usbss0 { 722 status = "okay"; 723 ti,vbus-divider; 724}; 725 726&usb0 { 727 bootph-all; 728 usb-role-switch; 729 730 port { 731 usb0_hs_ep: endpoint { 732 remote-endpoint = <&usb_con_hs>; 733 }; 734 }; 735}; 736 737&usbss1 { 738 status = "okay"; 739}; 740 741&usb1 { 742 dr_mode = "host"; 743 pinctrl-names = "default"; 744 pinctrl-0 = <&main_usb1_pins_default>; 745}; 746 747&cpsw3g { 748 status = "okay"; 749 pinctrl-names = "default"; 750 pinctrl-0 = <&main_rgmii1_pins_default>; 751}; 752 753&phy_gmii_sel { 754 bootph-all; 755}; 756 757&cpsw_port1 { 758 status = "okay"; 759 phy-mode = "rgmii-rxid"; 760 phy-handle = <&cpsw3g_phy0>; 761 bootph-all; 762}; 763 764&cpsw_port2 { 765 status = "disabled"; 766}; 767 768&cpsw3g_mdio { 769 status = "okay"; 770 pinctrl-names = "default"; 771 pinctrl-0 = <&main_mdio1_pins_default>; 772 773 cpsw3g_phy0: ethernet-phy@0 { 774 reg = <0>; 775 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 776 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 777 ti,min-output-impedance; 778 bootph-all; 779 }; 780}; 781 782&mcasp1 { 783 status = "okay"; 784 #sound-dai-cells = <0>; 785 786 pinctrl-names = "default"; 787 pinctrl-0 = <&main_mcasp1_pins_default>; 788 789 op-mode = <0>; /* MCASP_IIS_MODE */ 790 tdm-slots = <2>; 791 792 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 793 1 0 2 0 794 0 0 0 0 795 0 0 0 0 796 0 0 0 0 797 >; 798}; 799 800&dss { 801 status = "okay"; 802 pinctrl-names = "default"; 803 pinctrl-0 = <&main_dss0_pins_default>; 804}; 805 806&dss_ports { 807 /* VP2: DPI Output */ 808 port@1 { 809 reg = <1>; 810 811 dpi1_out: endpoint { 812 remote-endpoint = <&sii9022_in>; 813 }; 814 }; 815}; 816 817&ecap0 { 818 /* P26 of J3 */ 819 pinctrl-names = "default"; 820 pinctrl-0 = <&main_ecap0_pins_default>; 821 status = "okay"; 822}; 823 824&ecap2 { 825 /* P11 of J3 */ 826 pinctrl-names = "default"; 827 pinctrl-0 = <&main_ecap2_pins_default>; 828 status = "okay"; 829}; 830 831&epwm1 { 832 /* P36/P33 of J3 */ 833 pinctrl-names = "default"; 834 pinctrl-0 = <&main_epwm1_pins_default>; 835 status = "okay"; 836}; 837 838&mailbox0_cluster0 { 839 status = "okay"; 840 841 mbox_r5_0: mbox-r5-0 { 842 ti,mbox-rx = <0 0 0>; 843 ti,mbox-tx = <1 0 0>; 844 }; 845}; 846 847&mailbox0_cluster1 { 848 status = "okay"; 849 850 mbox_c7x_0: mbox-c7x-0 { 851 ti,mbox-rx = <0 0 0>; 852 ti,mbox-tx = <1 0 0>; 853 }; 854}; 855 856&mailbox0_cluster2 { 857 status = "okay"; 858 859 mbox_mcu_r5_0: mbox-mcu-r5-0 { 860 ti,mbox-rx = <0 0 0>; 861 ti,mbox-tx = <1 0 0>; 862 }; 863}; 864 865&wkup_r5fss0 { 866 status = "okay"; 867}; 868 869&wkup_r5fss0_core0 { 870 mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>; 871 memory-region = <&wkup_r5fss0_core0_dma_memory_region>, 872 <&wkup_r5fss0_core0_memory_region>; 873}; 874 875&mcu_r5fss0 { 876 status = "okay"; 877}; 878 879&mcu_r5fss0_core0 { 880 mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>; 881 memory-region = <&mcu_r5fss0_core0_dma_memory_region>, 882 <&mcu_r5fss0_core0_memory_region>; 883}; 884 885&c7x_0 { 886 mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>; 887 memory-region = <&c7x_0_dma_memory_region>, 888 <&c7x_0_memory_region>; 889 status = "okay"; 890}; 891 892/* main_rti4 is used by C7x DSP */ 893&main_rti4 { 894 status = "reserved"; 895}; 896 897&fss { 898 status = "okay"; 899}; 900 901&ospi0 { 902 pinctrl-names = "default"; 903 pinctrl-0 = <&ospi0_pins_default>; 904 905 flash@0 { 906 compatible = "spi-nand"; 907 reg = <0>; 908 spi-tx-bus-width = <8>; 909 spi-rx-bus-width = <8>; 910 spi-max-frequency = <25000000>; 911 cdns,tshsl-ns = <60>; 912 cdns,tsd2d-ns = <60>; 913 cdns,tchsh-ns = <60>; 914 cdns,tslch-ns = <60>; 915 cdns,read-delay = <2>; 916 bootph-all; 917 }; 918}; 919 920&main_pmx0 { 921 ospi0_pins_default: ospi0-default-pins { 922 bootph-all; 923 pinctrl-single,pins = < 924 AM62AX_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ 925 AM62AX_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ 926 AM62AX_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */ 927 AM62AX_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */ 928 AM62AX_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */ 929 AM62AX_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */ 930 AM62AX_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */ 931 AM62AX_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */ 932 AM62AX_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */ 933 AM62AX_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ 934 AM62AX_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */ 935 >; 936 }; 937}; 938