1f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 2f126890aSEmmanuel Vadot/* 3f126890aSEmmanuel Vadot * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 4f126890aSEmmanuel Vadot * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. 5f126890aSEmmanuel Vadot */ 6f126890aSEmmanuel Vadot#include "stm32mp251.dtsi" 7f126890aSEmmanuel Vadot 8f126890aSEmmanuel Vadot/ { 9f126890aSEmmanuel Vadot cpus { 10f126890aSEmmanuel Vadot cpu1: cpu@1 { 11f126890aSEmmanuel Vadot compatible = "arm,cortex-a35"; 12f126890aSEmmanuel Vadot device_type = "cpu"; 13f126890aSEmmanuel Vadot reg = <1>; 14f126890aSEmmanuel Vadot enable-method = "psci"; 15f126890aSEmmanuel Vadot }; 16f126890aSEmmanuel Vadot }; 17f126890aSEmmanuel Vadot 18f126890aSEmmanuel Vadot arm-pmu { 19f126890aSEmmanuel Vadot interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 20f126890aSEmmanuel Vadot <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>; 21f126890aSEmmanuel Vadot interrupt-affinity = <&cpu0>, <&cpu1>; 22f126890aSEmmanuel Vadot }; 23*7d0873ebSEmmanuel Vadot 24*7d0873ebSEmmanuel Vadot timer { 25*7d0873ebSEmmanuel Vadot interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 26*7d0873ebSEmmanuel Vadot <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 27*7d0873ebSEmmanuel Vadot <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 28*7d0873ebSEmmanuel Vadot <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 29*7d0873ebSEmmanuel Vadot }; 30f126890aSEmmanuel Vadot}; 31