1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/input/input.h> 7#include <dt-bindings/pinctrl/rockchip.h> 8#include <dt-bindings/leds/common.h> 9#include <dt-bindings/soc/rockchip,vop2.h> 10#include "rk3588s.dtsi" 11 12/ { 13 model = "Khadas Edge2"; 14 compatible = "khadas,edge2", "rockchip,rk3588s"; 15 16 aliases { 17 mmc0 = &sdhci; 18 mmc1 = &sdmmc; 19 }; 20 21 chosen { 22 stdout-path = "serial2:1500000n8"; 23 }; 24 25 adc-keys { 26 compatible = "adc-keys"; 27 io-channels = <&saradc 1>; 28 io-channel-names = "buttons"; 29 keyup-threshold-microvolt = <1800000>; 30 poll-interval = <100>; 31 32 button-function { 33 label = "Function"; 34 linux,code = <KEY_FN>; 35 press-threshold-microvolt = <17000>; 36 }; 37 }; 38 39 ir-receiver { 40 compatible = "gpio-ir-receiver"; 41 gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; 42 pinctrl-names = "default"; 43 pinctrl-0 = <&ir_receiver_pin>; 44 }; 45 46 hdmi0-con { 47 compatible = "hdmi-connector"; 48 type = "a"; 49 50 port { 51 hdmi0_con_in: endpoint { 52 remote-endpoint = <&hdmi0_out_con>; 53 }; 54 }; 55 }; 56 57 leds { 58 compatible = "pwm-leds"; 59 60 red_led: led-0 { 61 label = "red_led"; 62 color = <LED_COLOR_ID_RED>; 63 default-state = "off"; 64 function = LED_FUNCTION_INDICATOR; 65 linux,default-trigger = "none"; 66 max-brightness = <255>; 67 pwms = <&pwm11 0 25000 0>; 68 }; 69 70 green_led: led-1 { 71 label = "green_led"; 72 color = <LED_COLOR_ID_GREEN>; 73 default-state = "on"; 74 function = LED_FUNCTION_POWER; 75 linux,default-trigger = "default-on"; 76 max-brightness = <255>; 77 pwms = <&pwm14 0 25000 0>; 78 }; 79 80 blue_led: led-2 { 81 label = "blue_led"; 82 color = <LED_COLOR_ID_BLUE>; 83 default-state = "off"; 84 function = LED_FUNCTION_INDICATOR; 85 linux,default-trigger = "none"; 86 max-brightness = <255>; 87 pwms = <&pwm15 0 25000 0>; 88 }; 89 }; 90 91 vcc3v3_pcie_wl: regulator-vcc3v3-pcie-wl { 92 compatible = "regulator-fixed"; 93 enable-active-high; 94 gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 95 pinctrl-names = "default"; 96 pinctrl-0 = <&pcie2_2_vcc3v3_en>; 97 regulator-name = "vcc3v3_pcie_wl"; 98 regulator-min-microvolt = <3300000>; 99 regulator-max-microvolt = <3300000>; 100 startup-delay-us = <5000>; 101 vin-supply = <&vcc5v0_sys>; 102 }; 103 104 vcc5v0_host: regulator-vcc5v0-host { 105 compatible = "regulator-fixed"; 106 regulator-name = "vcc5v0_host"; 107 regulator-boot-on; 108 regulator-always-on; 109 regulator-min-microvolt = <5000000>; 110 regulator-max-microvolt = <5000000>; 111 enable-active-high; 112 gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; 113 pinctrl-names = "default"; 114 pinctrl-0 = <&vcc5v0_host_en>; 115 vin-supply = <&vcc5v0_sys>; 116 }; 117 118 vcc5v0_sys: regulator-vcc5v0-sys { 119 compatible = "regulator-fixed"; 120 regulator-name = "vcc5v0_sys"; 121 regulator-always-on; 122 regulator-boot-on; 123 regulator-min-microvolt = <5000000>; 124 regulator-max-microvolt = <5000000>; 125 }; 126 127 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 128 compatible = "regulator-fixed"; 129 regulator-name = "vcc_1v1_nldo_s3"; 130 regulator-always-on; 131 regulator-boot-on; 132 regulator-min-microvolt = <1100000>; 133 regulator-max-microvolt = <1100000>; 134 vin-supply = <&vcc5v0_sys>; 135 }; 136 137 vdd_3v3_sd: regulator-vdd-3v3-sd { 138 compatible = "regulator-fixed"; 139 regulator-name = "vdd_3v3_sd"; 140 gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 141 regulator-boot-on; 142 enable-active-high; 143 regulator-min-microvolt = <3300000>; 144 regulator-max-microvolt = <3300000>; 145 vin-supply = <&vcc_3v3_s3>; 146 pinctrl-names = "default"; 147 pinctrl-0 = <&vdd_sd_en>; 148 }; 149}; 150 151&cpu_b0 { 152 cpu-supply = <&vdd_cpu_big0_s0>; 153}; 154 155&cpu_b1 { 156 cpu-supply = <&vdd_cpu_big0_s0>; 157}; 158 159&cpu_b2 { 160 cpu-supply = <&vdd_cpu_big1_s0>; 161}; 162 163&cpu_b3 { 164 cpu-supply = <&vdd_cpu_big1_s0>; 165}; 166 167&cpu_l0 { 168 cpu-supply = <&vdd_cpu_lit_s0>; 169}; 170 171&cpu_l1 { 172 cpu-supply = <&vdd_cpu_lit_s0>; 173}; 174 175&cpu_l2 { 176 cpu-supply = <&vdd_cpu_lit_s0>; 177}; 178 179&cpu_l3 { 180 cpu-supply = <&vdd_cpu_lit_s0>; 181}; 182 183&combphy0_ps { 184 status = "okay"; 185}; 186 187&combphy2_psu { 188 status = "okay"; 189}; 190 191&gpu { 192 mali-supply = <&vdd_gpu_s0>; 193 status = "okay"; 194}; 195 196&hdmi0 { 197 status = "okay"; 198}; 199 200&hdmi0_in { 201 hdmi0_in_vp0: endpoint { 202 remote-endpoint = <&vp0_out_hdmi0>; 203 }; 204}; 205 206&hdmi0_out { 207 hdmi0_out_con: endpoint { 208 remote-endpoint = <&hdmi0_con_in>; 209 }; 210}; 211 212&hdmi0_sound { 213 status = "okay"; 214}; 215 216&hdptxphy0 { 217 status = "okay"; 218}; 219 220&hdmi0_sound { 221 status = "okay"; 222}; 223 224&i2c0 { 225 pinctrl-names = "default"; 226 pinctrl-0 = <&i2c0m2_xfer>; 227 status = "okay"; 228 229 vdd_cpu_big0_s0: regulator@42 { 230 compatible = "rockchip,rk8602"; 231 reg = <0x42>; 232 fcs,suspend-voltage-selector = <1>; 233 regulator-name = "vdd_cpu_big0_s0"; 234 regulator-always-on; 235 regulator-boot-on; 236 regulator-min-microvolt = <550000>; 237 regulator-max-microvolt = <1050000>; 238 regulator-ramp-delay = <2300>; 239 vin-supply = <&vcc5v0_sys>; 240 241 regulator-state-mem { 242 regulator-off-in-suspend; 243 }; 244 }; 245 246 vdd_cpu_big1_s0: regulator@43 { 247 compatible = "rockchip,rk8603", "rockchip,rk8602"; 248 reg = <0x43>; 249 fcs,suspend-voltage-selector = <1>; 250 regulator-name = "vdd_cpu_big1_s0"; 251 regulator-always-on; 252 regulator-boot-on; 253 regulator-min-microvolt = <550000>; 254 regulator-max-microvolt = <1050000>; 255 regulator-ramp-delay = <2300>; 256 vin-supply = <&vcc5v0_sys>; 257 258 regulator-state-mem { 259 regulator-off-in-suspend; 260 }; 261 }; 262}; 263 264&i2c2 { 265 status = "okay"; 266 267 hym8563: rtc@51 { 268 compatible = "haoyu,hym8563"; 269 reg = <0x51>; 270 #clock-cells = <0>; 271 clock-output-names = "hym8563"; 272 wakeup-source; 273 }; 274}; 275 276&i2s5_8ch { 277 status = "okay"; 278}; 279 280&pd_gpu { 281 domain-supply = <&vdd_gpu_s0>; 282}; 283 284&pinctrl { 285 vdd_sd { 286 vdd_sd_en: vdd-sd-en { 287 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; 288 }; 289 }; 290 291 pcie2 { 292 pcie2_2_rst: pcie2-2-rst { 293 rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 294 }; 295 296 pcie2_2_vcc3v3_en: pcie2-2-vcc-en { 297 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 298 }; 299 }; 300 301 usb { 302 vcc5v0_host_en: vcc5v0-host-en { 303 rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 304 }; 305 }; 306 307 ir-receiver { 308 ir_receiver_pin: ir-receiver-pin { 309 rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; 310 }; 311 }; 312 313 wireless-bluetooth { 314 bt_reset_pin: bt-reset-pin { 315 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 316 }; 317 318 bt_wake_pin: bt-wake-pin { 319 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 320 }; 321 322 bt_wake_host_irq: bt-wake-host-irq { 323 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>; 324 }; 325 }; 326}; 327 328&pcie2x1l2 { 329 pinctrl-names = "default"; 330 pinctrl-0 = <&pcie2_2_rst>; 331 reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; 332 vpcie3v3-supply = <&vcc3v3_pcie_wl>; 333 status = "okay"; 334 335 pcie@0,0 { 336 reg = <0x400000 0 0 0 0>; 337 #address-cells = <3>; 338 #size-cells = <2>; 339 ranges; 340 device_type = "pci"; 341 bus-range = <0x40 0x4f>; 342 343 wifi: wifi@0,0 { 344 compatible = "pci14e4,449d"; 345 reg = <0x410000 0 0 0 0>; 346 clocks = <&hym8563>; 347 clock-names = "lpo"; 348 }; 349 }; 350}; 351 352&pwm11 { 353 pinctrl-names = "default"; 354 pinctrl-0 = <&pwm11m1_pins>; 355 status = "okay"; 356}; 357 358&pwm14 { 359 pinctrl-names = "default"; 360 pinctrl-0 = <&pwm14m1_pins>; 361 status = "okay"; 362}; 363 364&pwm15 { 365 pinctrl-names = "default"; 366 pinctrl-0 = <&pwm15m1_pins>; 367 status = "okay"; 368}; 369 370&saradc { 371 vref-supply = <&avcc_1v8_s0>; 372 status = "okay"; 373}; 374 375&sdhci { 376 bus-width = <8>; 377 no-sdio; 378 no-sd; 379 non-removable; 380 mmc-hs400-1_8v; 381 mmc-hs400-enhanced-strobe; 382 status = "okay"; 383}; 384 385&sdmmc { 386 bus-width = <4>; 387 cap-sd-highspeed; 388 disable-wp; 389 no-mmc; 390 no-sdio; 391 sd-uhs-sdr104; 392 vmmc-supply = <&vdd_3v3_sd>; 393 vqmmc-supply = <&vccio_sd_s0>; 394 status = "okay"; 395}; 396 397&sfc { 398 pinctrl-names = "default"; 399 pinctrl-0 = <&fspim2_pins>; 400 status = "okay"; 401 402 flash@0 { 403 compatible = "jedec,spi-nor"; 404 reg = <0x0>; 405 spi-max-frequency = <100000000>; 406 spi-rx-bus-width = <4>; 407 spi-tx-bus-width = <1>; 408 }; 409}; 410 411&spi2 { 412 assigned-clocks = <&cru CLK_SPI2>; 413 assigned-clock-rates = <200000000>; 414 num-cs = <1>; 415 pinctrl-names = "default"; 416 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 417 status = "okay"; 418 419 pmic@0 { 420 compatible = "rockchip,rk806"; 421 reg = <0x0>; 422 interrupt-parent = <&gpio0>; 423 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 424 pinctrl-names = "default"; 425 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 426 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 427 spi-max-frequency = <1000000>; 428 system-power-controller; 429 430 vcc1-supply = <&vcc5v0_sys>; 431 vcc2-supply = <&vcc5v0_sys>; 432 vcc3-supply = <&vcc5v0_sys>; 433 vcc4-supply = <&vcc5v0_sys>; 434 vcc5-supply = <&vcc5v0_sys>; 435 vcc6-supply = <&vcc5v0_sys>; 436 vcc7-supply = <&vcc5v0_sys>; 437 vcc8-supply = <&vcc5v0_sys>; 438 vcc9-supply = <&vcc5v0_sys>; 439 vcc10-supply = <&vcc5v0_sys>; 440 vcc11-supply = <&vcc_2v0_pldo_s3>; 441 vcc12-supply = <&vcc5v0_sys>; 442 vcc13-supply = <&vcc_1v1_nldo_s3>; 443 vcc14-supply = <&vcc_1v1_nldo_s3>; 444 vcca-supply = <&vcc5v0_sys>; 445 446 gpio-controller; 447 #gpio-cells = <2>; 448 449 rk806_dvs1_null: dvs1-null-pins { 450 pins = "gpio_pwrctrl1"; 451 function = "pin_fun0"; 452 }; 453 454 rk806_dvs2_null: dvs2-null-pins { 455 pins = "gpio_pwrctrl2"; 456 function = "pin_fun0"; 457 }; 458 459 rk806_dvs3_null: dvs3-null-pins { 460 pins = "gpio_pwrctrl3"; 461 function = "pin_fun0"; 462 }; 463 464 regulators { 465 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 466 regulator-boot-on; 467 regulator-enable-ramp-delay = <400>; 468 regulator-min-microvolt = <550000>; 469 regulator-max-microvolt = <950000>; 470 regulator-name = "vdd_gpu_s0"; 471 regulator-ramp-delay = <12500>; 472 473 regulator-state-mem { 474 regulator-off-in-suspend; 475 }; 476 }; 477 478 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 479 regulator-always-on; 480 regulator-boot-on; 481 regulator-min-microvolt = <550000>; 482 regulator-max-microvolt = <950000>; 483 regulator-name = "vdd_cpu_lit_s0"; 484 regulator-ramp-delay = <12500>; 485 486 regulator-state-mem { 487 regulator-off-in-suspend; 488 }; 489 }; 490 491 vdd_log_s0: dcdc-reg3 { 492 regulator-always-on; 493 regulator-boot-on; 494 regulator-min-microvolt = <675000>; 495 regulator-max-microvolt = <750000>; 496 regulator-name = "vdd_log_s0"; 497 regulator-ramp-delay = <12500>; 498 499 regulator-state-mem { 500 regulator-off-in-suspend; 501 regulator-suspend-microvolt = <750000>; 502 }; 503 }; 504 505 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 506 regulator-always-on; 507 regulator-boot-on; 508 regulator-min-microvolt = <550000>; 509 regulator-max-microvolt = <950000>; 510 regulator-name = "vdd_vdenc_s0"; 511 regulator-ramp-delay = <12500>; 512 513 regulator-state-mem { 514 regulator-off-in-suspend; 515 }; 516 }; 517 518 vdd_ddr_s0: dcdc-reg5 { 519 regulator-always-on; 520 regulator-boot-on; 521 regulator-min-microvolt = <675000>; 522 regulator-max-microvolt = <900000>; 523 regulator-name = "vdd_ddr_s0"; 524 regulator-ramp-delay = <12500>; 525 526 regulator-state-mem { 527 regulator-off-in-suspend; 528 regulator-suspend-microvolt = <850000>; 529 }; 530 }; 531 532 vdd2_ddr_s3: dcdc-reg6 { 533 regulator-always-on; 534 regulator-boot-on; 535 regulator-name = "vdd2_ddr_s3"; 536 537 regulator-state-mem { 538 regulator-on-in-suspend; 539 }; 540 }; 541 542 vcc_2v0_pldo_s3: dcdc-reg7 { 543 regulator-always-on; 544 regulator-boot-on; 545 regulator-min-microvolt = <2000000>; 546 regulator-max-microvolt = <2000000>; 547 regulator-name = "vdd_2v0_pldo_s3"; 548 regulator-ramp-delay = <12500>; 549 550 regulator-state-mem { 551 regulator-on-in-suspend; 552 regulator-suspend-microvolt = <2000000>; 553 }; 554 }; 555 556 vcc_3v3_s3: dcdc-reg8 { 557 regulator-always-on; 558 regulator-boot-on; 559 regulator-min-microvolt = <3300000>; 560 regulator-max-microvolt = <3300000>; 561 regulator-name = "vcc_3v3_s3"; 562 563 regulator-state-mem { 564 regulator-on-in-suspend; 565 regulator-suspend-microvolt = <3300000>; 566 }; 567 }; 568 569 vddq_ddr_s0: dcdc-reg9 { 570 regulator-always-on; 571 regulator-boot-on; 572 regulator-name = "vddq_ddr_s0"; 573 574 regulator-state-mem { 575 regulator-off-in-suspend; 576 }; 577 }; 578 579 vcc_1v8_s3: dcdc-reg10 { 580 regulator-always-on; 581 regulator-boot-on; 582 regulator-min-microvolt = <1800000>; 583 regulator-max-microvolt = <1800000>; 584 regulator-name = "vcc_1v8_s3"; 585 586 regulator-state-mem { 587 regulator-on-in-suspend; 588 regulator-suspend-microvolt = <1800000>; 589 }; 590 }; 591 592 avcc_1v8_s0: pldo-reg1 { 593 regulator-always-on; 594 regulator-boot-on; 595 regulator-min-microvolt = <1800000>; 596 regulator-max-microvolt = <1800000>; 597 regulator-name = "avcc_1v8_s0"; 598 599 regulator-state-mem { 600 regulator-off-in-suspend; 601 }; 602 }; 603 604 vcc_1v8_s0: pldo-reg2 { 605 regulator-always-on; 606 regulator-boot-on; 607 regulator-min-microvolt = <1800000>; 608 regulator-max-microvolt = <1800000>; 609 regulator-name = "vcc_1v8_s0"; 610 611 regulator-state-mem { 612 regulator-off-in-suspend; 613 regulator-suspend-microvolt = <1800000>; 614 }; 615 }; 616 617 avdd_1v2_s0: pldo-reg3 { 618 regulator-always-on; 619 regulator-boot-on; 620 regulator-min-microvolt = <1200000>; 621 regulator-max-microvolt = <1200000>; 622 regulator-name = "avdd_1v2_s0"; 623 624 regulator-state-mem { 625 regulator-off-in-suspend; 626 }; 627 }; 628 629 vcc_3v3_s0: pldo-reg4 { 630 regulator-always-on; 631 regulator-boot-on; 632 regulator-min-microvolt = <3300000>; 633 regulator-max-microvolt = <3300000>; 634 regulator-ramp-delay = <12500>; 635 regulator-name = "vcc_3v3_s0"; 636 637 regulator-state-mem { 638 regulator-off-in-suspend; 639 }; 640 }; 641 642 vccio_sd_s0: pldo-reg5 { 643 regulator-always-on; 644 regulator-boot-on; 645 regulator-min-microvolt = <1800000>; 646 regulator-max-microvolt = <3300000>; 647 regulator-ramp-delay = <12500>; 648 regulator-name = "vccio_sd_s0"; 649 650 regulator-state-mem { 651 regulator-off-in-suspend; 652 }; 653 }; 654 655 pldo6_s3: pldo-reg6 { 656 regulator-always-on; 657 regulator-boot-on; 658 regulator-min-microvolt = <1800000>; 659 regulator-max-microvolt = <1800000>; 660 regulator-name = "pldo6_s3"; 661 662 regulator-state-mem { 663 regulator-on-in-suspend; 664 regulator-suspend-microvolt = <1800000>; 665 }; 666 }; 667 668 vdd_0v75_s3: nldo-reg1 { 669 regulator-always-on; 670 regulator-boot-on; 671 regulator-min-microvolt = <750000>; 672 regulator-max-microvolt = <750000>; 673 regulator-name = "vdd_0v75_s3"; 674 675 regulator-state-mem { 676 regulator-on-in-suspend; 677 regulator-suspend-microvolt = <750000>; 678 }; 679 }; 680 681 vdd_ddr_pll_s0: nldo-reg2 { 682 regulator-always-on; 683 regulator-boot-on; 684 regulator-min-microvolt = <850000>; 685 regulator-max-microvolt = <850000>; 686 regulator-name = "vdd_ddr_pll_s0"; 687 688 regulator-state-mem { 689 regulator-off-in-suspend; 690 regulator-suspend-microvolt = <850000>; 691 }; 692 }; 693 694 avdd_0v75_s0: nldo-reg3 { 695 regulator-always-on; 696 regulator-boot-on; 697 regulator-min-microvolt = <750000>; 698 regulator-max-microvolt = <750000>; 699 regulator-name = "avdd_0v75_s0"; 700 701 regulator-state-mem { 702 regulator-off-in-suspend; 703 }; 704 }; 705 706 vdd_0v85_s0: nldo-reg4 { 707 regulator-always-on; 708 regulator-boot-on; 709 regulator-min-microvolt = <850000>; 710 regulator-max-microvolt = <850000>; 711 regulator-name = "vdd_0v85_s0"; 712 713 regulator-state-mem { 714 regulator-off-in-suspend; 715 }; 716 }; 717 718 vdd_0v75_s0: nldo-reg5 { 719 regulator-always-on; 720 regulator-boot-on; 721 regulator-min-microvolt = <750000>; 722 regulator-max-microvolt = <750000>; 723 regulator-name = "vdd_0v75_s0"; 724 725 regulator-state-mem { 726 regulator-off-in-suspend; 727 }; 728 }; 729 }; 730 }; 731}; 732 733&tsadc { 734 status = "okay"; 735}; 736 737&uart2 { 738 pinctrl-0 = <&uart2m0_xfer>; 739 status = "okay"; 740}; 741 742&uart9 { 743 pinctrl-names = "default"; 744 pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn &uart9m2_rtsn>; 745 status = "okay"; 746 747 bluetooth { 748 compatible = "brcm,bcm43438-bt"; 749 clocks = <&hym8563>; 750 clock-names = "lpo"; 751 interrupt-parent = <&gpio0>; 752 interrupts = <RK_PD5 IRQ_TYPE_LEVEL_HIGH>; 753 interrupt-names = "host-wakeup"; 754 device-wakeup-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; 755 shutdown-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; 756 max-speed = <1500000>; 757 pinctrl-names = "default"; 758 pinctrl-0 = <&bt_wake_host_irq &bt_wake_pin &bt_reset_pin>; 759 vbat-supply = <&vcc_3v3_s3>; 760 vddio-supply = <&vcc_1v8_s3>; 761 }; 762}; 763 764&u2phy2 { 765 status = "okay"; 766}; 767 768&u2phy2_host { 769 phy-supply = <&vcc5v0_host>; 770 status = "okay"; 771}; 772 773&u2phy3 { 774 status = "okay"; 775}; 776 777&u2phy3_host { 778 phy-supply = <&vcc5v0_host>; 779 status = "okay"; 780}; 781 782&usb_host0_ehci { 783 status = "okay"; 784}; 785 786&usb_host0_ohci { 787 status = "okay"; 788}; 789 790&usb_host1_ehci { 791 status = "okay"; 792}; 793 794&usb_host1_ohci { 795 status = "okay"; 796}; 797 798&usb_host2_xhci { 799 status = "okay"; 800}; 801 802&vop { 803 status = "okay"; 804}; 805 806&vop_mmu { 807 status = "okay"; 808}; 809 810&vp0 { 811 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 812 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 813 remote-endpoint = <&hdmi0_in_vp0>; 814 }; 815}; 816