1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. 4 */ 5 6/dts-v1/; 7#include "rk3588j.dtsi" 8#include "rk3588-edgeble-neu6b.dtsi" 9 10/ { 11 model = "Edgeble Neu6B IO Board"; 12 compatible = "edgeble,neural-compute-module-6a-io", 13 "edgeble,neural-compute-module-6b", "rockchip,rk3588"; 14 15 chosen { 16 stdout-path = "serial2:1500000n8"; 17 }; 18}; 19 20&combphy0_ps { 21 status = "okay"; 22}; 23 24&i2c6 { 25 status = "okay"; 26 27 hym8563: rtc@51 { 28 compatible = "haoyu,hym8563"; 29 reg = <0x51>; 30 interrupt-parent = <&gpio0>; 31 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 32 #clock-cells = <0>; 33 clock-output-names = "hym8563"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&hym8563_int>; 36 wakeup-source; 37 }; 38}; 39 40&pinctrl { 41 hym8563 { 42 hym8563_int: hym8563-int { 43 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 44 }; 45 }; 46}; 47 48/* FAN */ 49&pwm2 { 50 pinctrl-0 = <&pwm2m1_pins>; 51 pinctrl-names = "default"; 52 status = "okay"; 53}; 54 55&sata0 { 56 status = "okay"; 57}; 58 59&sdmmc { 60 bus-width = <4>; 61 cap-mmc-highspeed; 62 cap-sd-highspeed; 63 disable-wp; 64 no-sdio; 65 no-mmc; 66 sd-uhs-sdr104; 67 vmmc-supply = <&vcc_3v3_s3>; 68 vqmmc-supply = <&vccio_sd_s0>; 69 status = "okay"; 70}; 71 72&uart2 { 73 pinctrl-0 = <&uart2m0_xfer>; 74 status = "okay"; 75}; 76 77/* RS232 */ 78&uart6 { 79 pinctrl-0 = <&uart6m0_xfer>; 80 pinctrl-names = "default"; 81 status = "okay"; 82}; 83 84/* RS485 */ 85&uart7 { 86 pinctrl-0 = <&uart7m2_xfer>; 87 pinctrl-names = "default"; 88 status = "okay"; 89}; 90