xref: /freebsd/sys/contrib/device-tree/src/arm64/rockchip/rk3588-coolpi-cm5.dtsi (revision 9978553d0199e7ec0bdd1c44fc7f6c7b0c11e43b)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/pwm/pwm.h>
11#include <dt-bindings/pinctrl/rockchip.h>
12#include "rk3588.dtsi"
13
14/ {
15	compatible = "coolpi,pi-cm5", "rockchip,rk3588";
16
17	aliases {
18		mmc0 = &sdhci;
19		mmc1 = &sdmmc;
20		mmc2 = &sdio;
21		serial2 = &uart2;
22	};
23
24	analog-sound {
25		compatible = "audio-graph-card";
26		dais = <&i2s0_8ch_p0>;
27		label = "rk3588-es8316";
28		routing = "MIC2", "Mic Jack",
29			  "Headphones", "HPOL",
30			  "Headphones", "HPOR";
31		widgets = "Microphone", "Mic Jack",
32			  "Headphone", "Headphones";
33	};
34
35	chosen {
36		stdout-path = "serial2:1500000n8";
37	};
38
39	avdd0v85_pcie20: regulator-avdd0v85-pcie20 {
40		compatible = "regulator-fixed";
41		regulator-name = "avdd0v85_pcie20";
42		regulator-boot-on;
43		regulator-always-on;
44		regulator-min-microvolt = <850000>;
45		regulator-max-microvolt = <850000>;
46		vin-supply = <&vdd_0v85_s0>;
47	};
48
49	avdd1v8_pcie20: regulator-avdd1v8-pcie20 {
50		compatible = "regulator-fixed";
51		regulator-name = "avdd1v8_pcie20";
52		regulator-boot-on;
53		regulator-always-on;
54		regulator-min-microvolt = <1800000>;
55		regulator-max-microvolt = <1800000>;
56		vin-supply = <&avcc_1v8_s0>;
57	};
58
59	avdd0v75_pcie30: regulator-avdd0v75-pcie30 {
60		compatible = "regulator-fixed";
61		regulator-name = "avdd0v75_pcie30";
62		regulator-boot-on;
63		regulator-always-on;
64		regulator-min-microvolt = <750000>;
65		regulator-max-microvolt = <750000>;
66		vin-supply = <&avdd_0v75_s0>;
67	};
68
69	pcie30_avdd1v8: regulator-avdd1v8-pcie30 {
70		compatible = "regulator-fixed";
71		regulator-name = "pcie30_avdd1v8";
72		regulator-boot-on;
73		regulator-always-on;
74		regulator-min-microvolt = <1800000>;
75		regulator-max-microvolt = <1800000>;
76		vin-supply = <&avcc_1v8_s0>;
77	};
78};
79
80&combphy0_ps {
81	status = "okay";
82};
83
84&combphy1_ps {
85	status = "okay";
86};
87
88&combphy2_psu {
89	status = "okay";
90};
91
92&cpu_b0 {
93	cpu-supply = <&vdd_cpu_big0_s0>;
94};
95
96&cpu_b1 {
97	cpu-supply = <&vdd_cpu_big0_s0>;
98};
99
100&cpu_b2 {
101	cpu-supply = <&vdd_cpu_big1_s0>;
102};
103
104&cpu_b3 {
105	cpu-supply = <&vdd_cpu_big1_s0>;
106};
107
108&cpu_l0 {
109	cpu-supply = <&vdd_cpu_lit_s0>;
110};
111
112&cpu_l1 {
113	cpu-supply = <&vdd_cpu_lit_s0>;
114};
115
116&cpu_l2 {
117	cpu-supply = <&vdd_cpu_lit_s0>;
118};
119
120&cpu_l3 {
121	cpu-supply = <&vdd_cpu_lit_s0>;
122};
123
124&gmac0 {
125	clock_in_out = "output";
126	phy-handle = <&rgmii_phy>;
127	phy-mode = "rgmii-rxid";
128	pinctrl-0 = <&gmac0_miim
129		     &gmac0_tx_bus2
130		     &gmac0_rx_bus2
131		     &gmac0_rgmii_clk
132		     &gmac0_rgmii_bus>;
133	pinctrl-names = "default";
134	rx_delay = <0x00>;
135	tx_delay = <0x43>;
136	status = "okay";
137};
138
139&gpu {
140	mali-supply = <&vdd_gpu_s0>;
141	status = "okay";
142};
143
144&i2c0 {
145	pinctrl-0 = <&i2c0m2_xfer>;
146	status = "okay";
147
148	vdd_cpu_big0_s0: regulator@42 {
149		compatible = "rockchip,rk8602";
150		reg = <0x42>;
151		fcs,suspend-voltage-selector = <1>;
152		regulator-name = "vdd_cpu_big0_s0";
153		regulator-always-on;
154		regulator-boot-on;
155		regulator-min-microvolt = <550000>;
156		regulator-max-microvolt = <1050000>;
157		regulator-ramp-delay = <2300>;
158		vin-supply = <&vcc5v0_sys>;
159
160		regulator-state-mem {
161			regulator-off-in-suspend;
162		};
163	};
164
165	vdd_cpu_big1_s0: regulator@43 {
166		compatible = "rockchip,rk8603", "rockchip,rk8602";
167		reg = <0x43>;
168		fcs,suspend-voltage-selector = <1>;
169		regulator-name = "vdd_cpu_big1_s0";
170		regulator-always-on;
171		regulator-boot-on;
172		regulator-min-microvolt = <550000>;
173		regulator-max-microvolt = <1050000>;
174		regulator-ramp-delay = <2300>;
175		vin-supply = <&vcc5v0_sys>;
176
177		regulator-state-mem {
178			regulator-off-in-suspend;
179		};
180	};
181};
182
183&i2c2 {
184	status = "okay";
185
186	vdd_npu_s0: regulator@42 {
187		compatible = "rockchip,rk8602";
188		reg = <0x42>;
189		fcs,suspend-voltage-selector = <1>;
190		regulator-name = "vdd_npu_s0";
191		regulator-always-on;
192		regulator-boot-on;
193		regulator-min-microvolt = <550000>;
194		regulator-max-microvolt = <950000>;
195		regulator-ramp-delay = <2300>;
196		vin-supply = <&vcc5v0_sys>;
197
198		regulator-state-mem {
199			regulator-off-in-suspend;
200		};
201	};
202};
203
204&i2c6 {
205	status = "okay";
206
207	hym8563: rtc@51 {
208		compatible = "haoyu,hym8563";
209		reg = <0x51>;
210		interrupt-parent = <&gpio0>;
211		interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>;
212		#clock-cells = <0>;
213		clock-output-names = "hym8563";
214		pinctrl-names = "default";
215		pinctrl-0 = <&hym8563_int>;
216		wakeup-source;
217	};
218};
219
220&i2c7 {
221	pinctrl-0 = <&i2c7m0_xfer>;
222	status = "okay";
223
224	es8316: audio-codec@10 {
225		compatible = "everest,es8316";
226		reg = <0x10>;
227		assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
228		assigned-clock-rates = <12288000>;
229		clocks = <&cru I2S0_8CH_MCLKOUT>;
230		clock-names = "mclk";
231		#sound-dai-cells = <0>;
232
233		port {
234			es8316_p0_0: endpoint {
235				remote-endpoint = <&i2s0_8ch_p0_0>;
236			};
237		};
238	};
239};
240
241&i2s0_8ch {
242	pinctrl-0 = <&i2s0_lrck
243		     &i2s0_mclk
244		     &i2s0_sclk
245		     &i2s0_sdi0
246		     &i2s0_sdo0>;
247	status = "okay";
248
249	i2s0_8ch_p0: port {
250		i2s0_8ch_p0_0: endpoint {
251			dai-format = "i2s";
252			mclk-fs = <256>;
253			remote-endpoint = <&es8316_p0_0>;
254		};
255	};
256};
257
258&mdio0 {
259	rgmii_phy: ethernet-phy@1 {
260		/* YT8531C/H */
261		compatible = "ethernet-phy-ieee802.3-c22";
262		reg = <0x1>;
263		pinctrl-names = "default";
264		pinctrl-0 = <&yt8531_rst>;
265		reset-assert-us = <20000>;
266		reset-deassert-us = <100000>;
267		reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
268	};
269};
270
271/* ethernet */
272&pcie2x1l2 {
273	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
274	vpcie3v3-supply = <&vcc3v3_sys>;
275	pinctrl-names = "default";
276	pinctrl-0 = <&yt6801_isolate>;
277	status = "okay";
278};
279
280&pd_gpu {
281	domain-supply = <&vdd_gpu_s0>;
282};
283
284&pinctrl {
285	hym8563 {
286		hym8563_int: hym8563-int {
287			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
288		};
289	};
290
291	yt6801 {
292		yt6801_isolate: yt6801-isolate {
293			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
294		};
295	};
296
297	yt8531 {
298		yt8531_rst: yt8531-rst {
299			rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
300		};
301	};
302};
303
304&saradc {
305	vref-supply = <&vcc_1v8_s0>;
306	status = "okay";
307};
308
309&sdhci {
310	bus-width = <8>;
311	max-frequency = <200000000>;
312	mmc-hs400-1_8v;
313	mmc-hs400-enhanced-strobe;
314	no-sdio;
315	no-sd;
316	non-removable;
317	status = "okay";
318};
319
320&sdmmc {
321	bus-width = <4>;
322	cap-mmc-highspeed;
323	cap-sd-highspeed;
324	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
325	disable-wp;
326	max-frequency = <150000000>;
327	no-sdio;
328	no-mmc;
329	sd-uhs-sdr104;
330	vqmmc-supply = <&vccio_sd_s0>;
331	status = "okay";
332};
333
334&spi2 {
335	assigned-clocks = <&cru CLK_SPI2>;
336	assigned-clock-rates = <200000000>;
337	num-cs = <1>;
338	pinctrl-names = "default";
339	pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
340	status = "okay";
341
342	pmic@0 {
343		compatible = "rockchip,rk806";
344		reg = <0x0>;
345		interrupt-parent = <&gpio0>;
346		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
347		gpio-controller;
348		#gpio-cells = <2>;
349		pinctrl-names = "default";
350		pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
351			    <&rk806_dvs2_null>, <&rk806_dvs3_null>;
352		spi-max-frequency = <1000000>;
353		vcc1-supply = <&vcc5v0_sys>;
354		vcc2-supply = <&vcc5v0_sys>;
355		vcc3-supply = <&vcc5v0_sys>;
356		vcc4-supply = <&vcc5v0_sys>;
357		vcc5-supply = <&vcc5v0_sys>;
358		vcc6-supply = <&vcc5v0_sys>;
359		vcc7-supply = <&vcc5v0_sys>;
360		vcc8-supply = <&vcc5v0_sys>;
361		vcc9-supply = <&vcc5v0_sys>;
362		vcc10-supply = <&vcc5v0_sys>;
363		vcc11-supply = <&vcc_2v0_pldo_s3>;
364		vcc12-supply = <&vcc5v0_sys>;
365		vcc13-supply = <&vcc_2v0_pldo_s3>;
366		vcc14-supply = <&vcc_2v0_pldo_s3>;
367		vcca-supply = <&vcc5v0_sys>;
368
369		rk806_dvs1_null: dvs1-null-pins {
370			pins = "gpio_pwrctrl1";
371			function = "pin_fun0";
372		};
373
374		rk806_dvs2_null: dvs2-null-pins {
375			pins = "gpio_pwrctrl2";
376			function = "pin_fun0";
377		};
378
379		rk806_dvs3_null: dvs3-null-pins {
380			pins = "gpio_pwrctrl3";
381			function = "pin_fun0";
382		};
383
384		regulators {
385			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
386				regulator-boot-on;
387				regulator-min-microvolt = <550000>;
388				regulator-max-microvolt = <950000>;
389				regulator-ramp-delay = <12500>;
390				regulator-name = "vdd_gpu_s0";
391				regulator-enable-ramp-delay = <400>;
392
393				regulator-state-mem {
394					regulator-off-in-suspend;
395				};
396			};
397
398			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
399				regulator-always-on;
400				regulator-boot-on;
401				regulator-min-microvolt = <550000>;
402				regulator-max-microvolt = <950000>;
403				regulator-ramp-delay = <12500>;
404				regulator-name = "vdd_cpu_lit_s0";
405
406				regulator-state-mem {
407					regulator-off-in-suspend;
408				};
409			};
410
411			vdd_log_s0: dcdc-reg3 {
412				regulator-always-on;
413				regulator-boot-on;
414				regulator-min-microvolt = <675000>;
415				regulator-max-microvolt = <750000>;
416				regulator-ramp-delay = <12500>;
417				regulator-name = "vdd_log_s0";
418
419				regulator-state-mem {
420					regulator-off-in-suspend;
421					regulator-suspend-microvolt = <750000>;
422				};
423			};
424
425			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
426				regulator-always-on;
427				regulator-boot-on;
428				regulator-min-microvolt = <550000>;
429				regulator-max-microvolt = <950000>;
430				regulator-ramp-delay = <12500>;
431				regulator-name = "vdd_vdenc_s0";
432
433				regulator-state-mem {
434					regulator-off-in-suspend;
435				};
436			};
437
438			vdd_ddr_s0: dcdc-reg5 {
439				regulator-always-on;
440				regulator-boot-on;
441				regulator-min-microvolt = <675000>;
442				regulator-max-microvolt = <900000>;
443				regulator-ramp-delay = <12500>;
444				regulator-name = "vdd_ddr_s0";
445
446				regulator-state-mem {
447					regulator-off-in-suspend;
448					regulator-suspend-microvolt = <850000>;
449				};
450			};
451
452			vdd2_ddr_s3: dcdc-reg6 {
453				regulator-always-on;
454				regulator-boot-on;
455				regulator-name = "vdd2_ddr_s3";
456
457				regulator-state-mem {
458					regulator-on-in-suspend;
459				};
460			};
461
462			vcc_2v0_pldo_s3: dcdc-reg7 {
463				regulator-always-on;
464				regulator-boot-on;
465				regulator-min-microvolt = <2000000>;
466				regulator-max-microvolt = <2000000>;
467				regulator-ramp-delay = <12500>;
468				regulator-name = "vdd_2v0_pldo_s3";
469
470				regulator-state-mem {
471					regulator-on-in-suspend;
472					regulator-suspend-microvolt = <2000000>;
473				};
474			};
475
476			vcc_3v3_s3: dcdc-reg8 {
477				regulator-always-on;
478				regulator-boot-on;
479				regulator-min-microvolt = <3300000>;
480				regulator-max-microvolt = <3300000>;
481				regulator-name = "vcc_3v3_s3";
482
483				regulator-state-mem {
484					regulator-on-in-suspend;
485					regulator-suspend-microvolt = <3300000>;
486				};
487			};
488
489			vddq_ddr_s0: dcdc-reg9 {
490				regulator-always-on;
491				regulator-boot-on;
492				regulator-name = "vddq_ddr_s0";
493
494				regulator-state-mem {
495					regulator-off-in-suspend;
496				};
497			};
498
499			vcc_1v8_s3: dcdc-reg10 {
500				regulator-always-on;
501				regulator-boot-on;
502				regulator-min-microvolt = <1800000>;
503				regulator-max-microvolt = <1800000>;
504				regulator-name = "vcc_1v8_s3";
505
506				regulator-state-mem {
507					regulator-on-in-suspend;
508					regulator-suspend-microvolt = <1800000>;
509				};
510			};
511
512			avcc_1v8_s0: pldo-reg1 {
513				regulator-always-on;
514				regulator-boot-on;
515				regulator-min-microvolt = <1800000>;
516				regulator-max-microvolt = <1800000>;
517				regulator-name = "avcc_1v8_s0";
518
519				regulator-state-mem {
520					regulator-off-in-suspend;
521				};
522			};
523
524			vcc_1v8_s0: pldo-reg2 {
525				regulator-always-on;
526				regulator-boot-on;
527				regulator-min-microvolt = <1800000>;
528				regulator-max-microvolt = <1800000>;
529				regulator-name = "vcc_1v8_s0";
530
531				regulator-state-mem {
532					regulator-off-in-suspend;
533					regulator-suspend-microvolt = <1800000>;
534				};
535			};
536
537			avdd_1v2_s0: pldo-reg3 {
538				regulator-always-on;
539				regulator-boot-on;
540				regulator-min-microvolt = <1200000>;
541				regulator-max-microvolt = <1200000>;
542				regulator-name = "avdd_1v2_s0";
543
544				regulator-state-mem {
545					regulator-off-in-suspend;
546				};
547			};
548
549			vcc_3v3_s0: pldo-reg4 {
550				regulator-always-on;
551				regulator-boot-on;
552				regulator-min-microvolt = <3300000>;
553				regulator-max-microvolt = <3300000>;
554				regulator-ramp-delay = <12500>;
555				regulator-name = "vcc_3v3_s0";
556
557				regulator-state-mem {
558					regulator-off-in-suspend;
559				};
560			};
561
562			vccio_sd_s0: pldo-reg5 {
563				regulator-always-on;
564				regulator-boot-on;
565				regulator-min-microvolt = <1800000>;
566				regulator-max-microvolt = <3300000>;
567				regulator-ramp-delay = <12500>;
568				regulator-name = "vccio_sd_s0";
569
570				regulator-state-mem {
571					regulator-off-in-suspend;
572				};
573			};
574
575			pldo6_s3: pldo-reg6 {
576				regulator-always-on;
577				regulator-boot-on;
578				regulator-min-microvolt = <1800000>;
579				regulator-max-microvolt = <1800000>;
580				regulator-name = "pldo6_s3";
581
582				regulator-state-mem {
583					regulator-on-in-suspend;
584					regulator-suspend-microvolt = <1800000>;
585				};
586			};
587
588			vdd_0v75_s3: nldo-reg1 {
589				regulator-always-on;
590				regulator-boot-on;
591				regulator-min-microvolt = <750000>;
592				regulator-max-microvolt = <750000>;
593				regulator-name = "vdd_0v75_s3";
594
595				regulator-state-mem {
596					regulator-on-in-suspend;
597					regulator-suspend-microvolt = <750000>;
598				};
599			};
600
601			vdd_ddr_pll_s0: nldo-reg2 {
602				regulator-always-on;
603				regulator-boot-on;
604				regulator-min-microvolt = <850000>;
605				regulator-max-microvolt = <850000>;
606				regulator-name = "vdd_ddr_pll_s0";
607
608				regulator-state-mem {
609					regulator-off-in-suspend;
610					regulator-suspend-microvolt = <850000>;
611				};
612			};
613
614			avdd_0v75_s0: nldo-reg3 {
615				regulator-always-on;
616				regulator-boot-on;
617				regulator-min-microvolt = <750000>;
618				regulator-max-microvolt = <750000>;
619				regulator-name = "avdd_0v75_s0";
620
621				regulator-state-mem {
622					regulator-off-in-suspend;
623				};
624			};
625
626			vdd_0v85_s0: nldo-reg4 {
627				regulator-always-on;
628				regulator-boot-on;
629				regulator-min-microvolt = <850000>;
630				regulator-max-microvolt = <850000>;
631				regulator-name = "vdd_0v85_s0";
632
633				regulator-state-mem {
634					regulator-off-in-suspend;
635				};
636			};
637
638			vdd_0v75_s0: nldo-reg5 {
639				regulator-always-on;
640				regulator-boot-on;
641				regulator-min-microvolt = <750000>;
642				regulator-max-microvolt = <750000>;
643				regulator-name = "vdd_0v75_s0";
644
645				regulator-state-mem {
646					regulator-off-in-suspend;
647				};
648			};
649		};
650	};
651};
652
653&tsadc {
654	status = "okay";
655};
656
657&uart2 {
658	pinctrl-0 = <&uart2m0_xfer>;
659	status = "okay";
660};
661