1*b2d2a78aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 2*b2d2a78aSEmmanuel Vadot/* 3*b2d2a78aSEmmanuel Vadot * Device tree overlay base for the WolfVision PF5 displays. 4*b2d2a78aSEmmanuel Vadot * 5*b2d2a78aSEmmanuel Vadot * Copyright (C) 2024 WolfVision GmbH. 6*b2d2a78aSEmmanuel Vadot */ 7*b2d2a78aSEmmanuel Vadot 8*b2d2a78aSEmmanuel Vadot/dts-v1/; 9*b2d2a78aSEmmanuel Vadot/plugin/; 10*b2d2a78aSEmmanuel Vadot 11*b2d2a78aSEmmanuel Vadot#include <dt-bindings/clock/rk3568-cru.h> 12*b2d2a78aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 13*b2d2a78aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h> 14*b2d2a78aSEmmanuel Vadot#include <dt-bindings/pinctrl/rockchip.h> 15*b2d2a78aSEmmanuel Vadot#include <dt-bindings/soc/rockchip,vop2.h> 16*b2d2a78aSEmmanuel Vadot 17*b2d2a78aSEmmanuel Vadot&{/} { 18*b2d2a78aSEmmanuel Vadot display_backlight: backlight { 19*b2d2a78aSEmmanuel Vadot compatible = "pwm-backlight"; 20*b2d2a78aSEmmanuel Vadot brightness-levels = <0 255>; 21*b2d2a78aSEmmanuel Vadot default-brightness-level = <255>; 22*b2d2a78aSEmmanuel Vadot num-interpolated-steps = <255>; 23*b2d2a78aSEmmanuel Vadot power-supply = <&vcc3v3_sd>; 24*b2d2a78aSEmmanuel Vadot pwms = <&pwm10 0 1000000 0>; 25*b2d2a78aSEmmanuel Vadot }; 26*b2d2a78aSEmmanuel Vadot 27*b2d2a78aSEmmanuel Vadot display_spi: spi { 28*b2d2a78aSEmmanuel Vadot compatible = "spi-gpio"; 29*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 30*b2d2a78aSEmmanuel Vadot #size-cells = <0>; 31*b2d2a78aSEmmanuel Vadot cs-gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; 32*b2d2a78aSEmmanuel Vadot miso-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; 33*b2d2a78aSEmmanuel Vadot mosi-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; 34*b2d2a78aSEmmanuel Vadot num-chipselects = <1>; 35*b2d2a78aSEmmanuel Vadot pinctrl-names = "default"; 36*b2d2a78aSEmmanuel Vadot pinctrl-0 = <&lcd_spi>; 37*b2d2a78aSEmmanuel Vadot sck-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; 38*b2d2a78aSEmmanuel Vadot 39*b2d2a78aSEmmanuel Vadot st7789: panel@0 { 40*b2d2a78aSEmmanuel Vadot compatible = "sitronix,st7789v"; 41*b2d2a78aSEmmanuel Vadot reg = <0>; 42*b2d2a78aSEmmanuel Vadot assigned-clocks = <&cru PLL_VPLL>; 43*b2d2a78aSEmmanuel Vadot assigned-clock-rates = <700000000>; 44*b2d2a78aSEmmanuel Vadot backlight = <&display_backlight>; 45*b2d2a78aSEmmanuel Vadot pinctrl-names = "default"; 46*b2d2a78aSEmmanuel Vadot pinctrl-0 = <&lcdc_clock &lcdc_data18 &lcd_rstn>; 47*b2d2a78aSEmmanuel Vadot power-supply = <&vcc3v3_sw>; 48*b2d2a78aSEmmanuel Vadot reset-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>; 49*b2d2a78aSEmmanuel Vadot spi-max-frequency = <100000>; 50*b2d2a78aSEmmanuel Vadot 51*b2d2a78aSEmmanuel Vadot port { 52*b2d2a78aSEmmanuel Vadot panel_in_vp2: endpoint { 53*b2d2a78aSEmmanuel Vadot remote-endpoint = <&vp2_out_rgb>; 54*b2d2a78aSEmmanuel Vadot }; 55*b2d2a78aSEmmanuel Vadot }; 56*b2d2a78aSEmmanuel Vadot }; 57*b2d2a78aSEmmanuel Vadot }; 58*b2d2a78aSEmmanuel Vadot}; 59*b2d2a78aSEmmanuel Vadot 60*b2d2a78aSEmmanuel Vadot&i2c1 { 61*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 62*b2d2a78aSEmmanuel Vadot #size-cells = <0>; 63*b2d2a78aSEmmanuel Vadot status = "okay"; 64*b2d2a78aSEmmanuel Vadot 65*b2d2a78aSEmmanuel Vadot st1624: touchscreen@55 { 66*b2d2a78aSEmmanuel Vadot compatible = "sitronix,st1624", "sitronix,st1633"; 67*b2d2a78aSEmmanuel Vadot reg = <0x55>; 68*b2d2a78aSEmmanuel Vadot interrupt-parent = <&gpio0>; 69*b2d2a78aSEmmanuel Vadot interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>; 70*b2d2a78aSEmmanuel Vadot gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 71*b2d2a78aSEmmanuel Vadot pinctrl-names = "default"; 72*b2d2a78aSEmmanuel Vadot pinctrl-0 = <&touch_int &touch_rstn>; 73*b2d2a78aSEmmanuel Vadot wakeup-source; 74*b2d2a78aSEmmanuel Vadot }; 75*b2d2a78aSEmmanuel Vadot}; 76*b2d2a78aSEmmanuel Vadot 77*b2d2a78aSEmmanuel Vadot&pinctrl { 78*b2d2a78aSEmmanuel Vadot display: display-pinctrl { 79*b2d2a78aSEmmanuel Vadot lcd_rstn: lcd-rstn-pinctrl { 80*b2d2a78aSEmmanuel Vadot rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 81*b2d2a78aSEmmanuel Vadot }; 82*b2d2a78aSEmmanuel Vadot 83*b2d2a78aSEmmanuel Vadot lcd_spi: lcd-spi-pinctrl { 84*b2d2a78aSEmmanuel Vadot rockchip,pins = 85*b2d2a78aSEmmanuel Vadot /* lcd_sdo */ 86*b2d2a78aSEmmanuel Vadot <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, 87*b2d2a78aSEmmanuel Vadot /* lcd_csn */ 88*b2d2a78aSEmmanuel Vadot <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, 89*b2d2a78aSEmmanuel Vadot /* lcd_scl */ 90*b2d2a78aSEmmanuel Vadot <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, 91*b2d2a78aSEmmanuel Vadot /* lcd_sdi */ 92*b2d2a78aSEmmanuel Vadot <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 93*b2d2a78aSEmmanuel Vadot }; 94*b2d2a78aSEmmanuel Vadot }; 95*b2d2a78aSEmmanuel Vadot 96*b2d2a78aSEmmanuel Vadot touchscreen: touchscreen-pinctrl { 97*b2d2a78aSEmmanuel Vadot touch_int: touch-int-pinctrl { 98*b2d2a78aSEmmanuel Vadot rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; 99*b2d2a78aSEmmanuel Vadot }; 100*b2d2a78aSEmmanuel Vadot 101*b2d2a78aSEmmanuel Vadot touch_rstn: touch-rstn-pinctrl { 102*b2d2a78aSEmmanuel Vadot rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 103*b2d2a78aSEmmanuel Vadot }; 104*b2d2a78aSEmmanuel Vadot }; 105*b2d2a78aSEmmanuel Vadot}; 106*b2d2a78aSEmmanuel Vadot 107*b2d2a78aSEmmanuel Vadot&pwm10 { 108*b2d2a78aSEmmanuel Vadot pinctrl-names = "default"; 109*b2d2a78aSEmmanuel Vadot pinctrl-0 = <&pwm10m1_pins>; 110*b2d2a78aSEmmanuel Vadot status = "okay"; 111*b2d2a78aSEmmanuel Vadot}; 112*b2d2a78aSEmmanuel Vadot 113*b2d2a78aSEmmanuel Vadot&vp2 { 114*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 115*b2d2a78aSEmmanuel Vadot #size-cells = <0>; 116*b2d2a78aSEmmanuel Vadot 117*b2d2a78aSEmmanuel Vadot vp2_out_rgb: endpoint@ROCKCHIP_VOP2_EP_RGB0 { 118*b2d2a78aSEmmanuel Vadot reg = <ROCKCHIP_VOP2_EP_RGB0>; 119*b2d2a78aSEmmanuel Vadot remote-endpoint = <&panel_in_vp2>; 120*b2d2a78aSEmmanuel Vadot }; 121*b2d2a78aSEmmanuel Vadot}; 122