1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Author: Frank Wunderlich <frank-w@public-files.de> 4 * 5 */ 6 7/dts-v1/; 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/soc/rockchip,vop2.h> 12#include "rk3568.dtsi" 13 14/ { 15 model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; 16 compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; 17 18 aliases { 19 ethernet0 = &gmac0; 20 ethernet1 = &gmac1; 21 mmc0 = &sdmmc0; 22 mmc1 = &sdhci; 23 }; 24 25 chosen: chosen { 26 stdout-path = "serial2:1500000n8"; 27 }; 28 29 leds { 30 compatible = "gpio-leds"; 31 pinctrl-names = "default"; 32 pinctrl-0 = <&blue_led_pin &green_led_pin>; 33 34 blue_led: led-0 { 35 color = <LED_COLOR_ID_BLUE>; 36 default-state = "off"; 37 function = LED_FUNCTION_STATUS; 38 gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; 39 }; 40 41 green_led: led-1 { 42 color = <LED_COLOR_ID_GREEN>; 43 default-state = "on"; 44 function = LED_FUNCTION_POWER; 45 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; 46 }; 47 }; 48 49 dc_12v: dc-12v-regulator { 50 compatible = "regulator-fixed"; 51 regulator-name = "dc_12v"; 52 regulator-always-on; 53 regulator-boot-on; 54 regulator-min-microvolt = <12000000>; 55 regulator-max-microvolt = <12000000>; 56 }; 57 58 hdmi-con { 59 compatible = "hdmi-connector"; 60 type = "a"; 61 62 port { 63 hdmi_con_in: endpoint { 64 remote-endpoint = <&hdmi_out_con>; 65 }; 66 }; 67 }; 68 69 ir-receiver { 70 compatible = "gpio-ir-receiver"; 71 gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; 72 pinctrl-names = "default"; 73 pinctrl-0 = <&ir_receiver_pin>; 74 }; 75 76 vcc3v3_sys: vcc3v3-sys-regulator { 77 compatible = "regulator-fixed"; 78 regulator-name = "vcc3v3_sys"; 79 regulator-always-on; 80 regulator-boot-on; 81 regulator-min-microvolt = <3300000>; 82 regulator-max-microvolt = <3300000>; 83 vin-supply = <&dc_12v>; 84 }; 85 86 vcc5v0_sys: vcc5v0-sys-regulator { 87 compatible = "regulator-fixed"; 88 regulator-name = "vcc5v0_sys"; 89 regulator-always-on; 90 regulator-boot-on; 91 regulator-min-microvolt = <5000000>; 92 regulator-max-microvolt = <5000000>; 93 vin-supply = <&dc_12v>; 94 }; 95 96 pcie30_avdd0v9: pcie30-avdd0v9-regulator { 97 compatible = "regulator-fixed"; 98 regulator-name = "pcie30_avdd0v9"; 99 regulator-always-on; 100 regulator-boot-on; 101 regulator-min-microvolt = <900000>; 102 regulator-max-microvolt = <900000>; 103 vin-supply = <&vcc3v3_sys>; 104 }; 105 106 pcie30_avdd1v8: pcie30-avdd1v8-regulator { 107 compatible = "regulator-fixed"; 108 regulator-name = "pcie30_avdd1v8"; 109 regulator-always-on; 110 regulator-boot-on; 111 regulator-min-microvolt = <1800000>; 112 regulator-max-microvolt = <1800000>; 113 vin-supply = <&vcc3v3_sys>; 114 }; 115 116 /* pi6c pcie clock generator feeds both ports */ 117 vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator { 118 compatible = "regulator-fixed"; 119 regulator-name = "vcc3v3_pcie"; 120 regulator-min-microvolt = <3300000>; 121 regulator-max-microvolt = <3300000>; 122 enable-active-high; 123 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; 124 startup-delay-us = <200000>; 125 vin-supply = <&vcc5v0_sys>; 126 }; 127 128 /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */ 129 vcc3v3_minipcie: vcc3v3-minipcie-regulator { 130 compatible = "regulator-fixed"; 131 regulator-name = "vcc3v3_minipcie"; 132 regulator-min-microvolt = <3300000>; 133 regulator-max-microvolt = <3300000>; 134 enable-active-high; 135 gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 136 pinctrl-names = "default"; 137 pinctrl-0 = <&minipcie_enable_h>; 138 startup-delay-us = <50000>; 139 vin-supply = <&vcc3v3_pi6c_05>; 140 }; 141 142 /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */ 143 vcc3v3_ngff: vcc3v3-ngff-regulator { 144 compatible = "regulator-fixed"; 145 regulator-name = "vcc3v3_ngff"; 146 regulator-min-microvolt = <3300000>; 147 regulator-max-microvolt = <3300000>; 148 enable-active-high; 149 gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 150 pinctrl-names = "default"; 151 pinctrl-0 = <&ngffpcie_enable_h>; 152 startup-delay-us = <50000>; 153 vin-supply = <&vcc3v3_pi6c_05>; 154 }; 155 156 vcc5v0_usb: vcc5v0-usb-regulator { 157 compatible = "regulator-fixed"; 158 regulator-name = "vcc5v0_usb"; 159 regulator-always-on; 160 regulator-boot-on; 161 regulator-min-microvolt = <5000000>; 162 regulator-max-microvolt = <5000000>; 163 vin-supply = <&dc_12v>; 164 }; 165 166 vcc5v0_usb_host: vcc5v0-usb-host-regulator { 167 compatible = "regulator-fixed"; 168 enable-active-high; 169 gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 170 pinctrl-names = "default"; 171 pinctrl-0 = <&vcc5v0_usb_host_en>; 172 regulator-name = "vcc5v0_usb_host"; 173 regulator-min-microvolt = <5000000>; 174 regulator-max-microvolt = <5000000>; 175 vin-supply = <&vcc5v0_usb>; 176 }; 177 178 vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { 179 compatible = "regulator-fixed"; 180 enable-active-high; 181 gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 182 pinctrl-names = "default"; 183 pinctrl-0 = <&vcc5v0_usb_otg_en>; 184 regulator-name = "vcc5v0_usb_otg"; 185 regulator-min-microvolt = <5000000>; 186 regulator-max-microvolt = <5000000>; 187 vin-supply = <&vcc5v0_usb>; 188 }; 189}; 190 191&combphy0 { 192 /* used for USB3 */ 193 status = "okay"; 194}; 195 196&combphy1 { 197 /* used for USB3 */ 198 status = "okay"; 199}; 200 201&combphy2 { 202 /* used for SATA */ 203 status = "okay"; 204}; 205 206&gmac0 { 207 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 208 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; 209 clock_in_out = "input"; 210 phy-mode = "rgmii"; 211 pinctrl-names = "default"; 212 pinctrl-0 = <&gmac0_miim 213 &gmac0_tx_bus2 214 &gmac0_rx_bus2 215 &gmac0_rgmii_clk 216 &gmac0_rgmii_bus>; 217 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 218 snps,reset-active-low; 219 /* Reset time is 20ms, 100ms for rtl8211f */ 220 snps,reset-delays-us = <0 20000 100000>; 221 tx_delay = <0x4f>; 222 rx_delay = <0x0f>; 223 status = "okay"; 224 225 fixed-link { 226 speed = <1000>; 227 full-duplex; 228 pause; 229 }; 230}; 231 232&gmac1 { 233 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 234 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; 235 clock_in_out = "output"; 236 phy-handle = <&rgmii_phy1>; 237 phy-mode = "rgmii"; 238 pinctrl-names = "default"; 239 pinctrl-0 = <&gmac1m1_miim 240 &gmac1m1_tx_bus2 241 &gmac1m1_rx_bus2 242 &gmac1m1_rgmii_clk 243 &gmac1m1_rgmii_bus>; 244 245 snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; 246 snps,reset-active-low; 247 /* Reset time is 20ms, 100ms for rtl8211f */ 248 snps,reset-delays-us = <0 20000 100000>; 249 250 tx_delay = <0x3c>; 251 rx_delay = <0x2f>; 252 253 status = "okay"; 254}; 255 256&gpu { 257 mali-supply = <&vdd_gpu>; 258 status = "okay"; 259}; 260 261&hdmi { 262 avdd-0v9-supply = <&vdda0v9_image>; 263 avdd-1v8-supply = <&vcca1v8_image>; 264 status = "okay"; 265}; 266 267&hdmi_in { 268 hdmi_in_vp0: endpoint { 269 remote-endpoint = <&vp0_out_hdmi>; 270 }; 271}; 272 273&hdmi_out { 274 hdmi_out_con: endpoint { 275 remote-endpoint = <&hdmi_con_in>; 276 }; 277}; 278 279&hdmi_sound { 280 status = "okay"; 281}; 282 283&i2c0 { 284 status = "okay"; 285 286 rk809: pmic@20 { 287 compatible = "rockchip,rk809"; 288 reg = <0x20>; 289 interrupt-parent = <&gpio0>; 290 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 291 #clock-cells = <1>; 292 pinctrl-names = "default"; 293 pinctrl-0 = <&pmic_int>; 294 rockchip,system-power-controller; 295 vcc1-supply = <&vcc3v3_sys>; 296 vcc2-supply = <&vcc3v3_sys>; 297 vcc3-supply = <&vcc3v3_sys>; 298 vcc4-supply = <&vcc3v3_sys>; 299 vcc5-supply = <&vcc3v3_sys>; 300 vcc6-supply = <&vcc3v3_sys>; 301 vcc7-supply = <&vcc3v3_sys>; 302 vcc8-supply = <&vcc3v3_sys>; 303 vcc9-supply = <&vcc3v3_sys>; 304 wakeup-source; 305 306 regulators { 307 vdd_logic: DCDC_REG1 { 308 regulator-name = "vdd_logic"; 309 regulator-always-on; 310 regulator-boot-on; 311 regulator-init-microvolt = <900000>; 312 regulator-initial-mode = <0x2>; 313 regulator-min-microvolt = <500000>; 314 regulator-max-microvolt = <1350000>; 315 regulator-ramp-delay = <6001>; 316 317 regulator-state-mem { 318 regulator-off-in-suspend; 319 }; 320 }; 321 322 vdd_gpu: DCDC_REG2 { 323 regulator-name = "vdd_gpu"; 324 regulator-always-on; 325 regulator-init-microvolt = <900000>; 326 regulator-initial-mode = <0x2>; 327 regulator-min-microvolt = <500000>; 328 regulator-max-microvolt = <1350000>; 329 regulator-ramp-delay = <6001>; 330 331 regulator-state-mem { 332 regulator-off-in-suspend; 333 }; 334 }; 335 336 vcc_ddr: DCDC_REG3 { 337 regulator-name = "vcc_ddr"; 338 regulator-always-on; 339 regulator-boot-on; 340 regulator-initial-mode = <0x2>; 341 342 regulator-state-mem { 343 regulator-on-in-suspend; 344 }; 345 }; 346 347 vdd_npu: DCDC_REG4 { 348 regulator-name = "vdd_npu"; 349 regulator-init-microvolt = <900000>; 350 regulator-initial-mode = <0x2>; 351 regulator-min-microvolt = <500000>; 352 regulator-max-microvolt = <1350000>; 353 regulator-ramp-delay = <6001>; 354 355 regulator-state-mem { 356 regulator-off-in-suspend; 357 }; 358 }; 359 360 vcc_1v8: DCDC_REG5 { 361 regulator-name = "vcc_1v8"; 362 regulator-always-on; 363 regulator-boot-on; 364 regulator-min-microvolt = <1800000>; 365 regulator-max-microvolt = <1800000>; 366 367 regulator-state-mem { 368 regulator-off-in-suspend; 369 }; 370 }; 371 372 vdda0v9_image: LDO_REG1 { 373 regulator-name = "vdda0v9_image"; 374 regulator-always-on; 375 regulator-min-microvolt = <900000>; 376 regulator-max-microvolt = <900000>; 377 378 regulator-state-mem { 379 regulator-off-in-suspend; 380 }; 381 }; 382 383 vdda_0v9: LDO_REG2 { 384 regulator-name = "vdda_0v9"; 385 regulator-always-on; 386 regulator-boot-on; 387 regulator-min-microvolt = <900000>; 388 regulator-max-microvolt = <900000>; 389 390 regulator-state-mem { 391 regulator-off-in-suspend; 392 }; 393 }; 394 395 vdda0v9_pmu: LDO_REG3 { 396 regulator-name = "vdda0v9_pmu"; 397 regulator-always-on; 398 regulator-boot-on; 399 regulator-min-microvolt = <900000>; 400 regulator-max-microvolt = <900000>; 401 402 regulator-state-mem { 403 regulator-on-in-suspend; 404 regulator-suspend-microvolt = <900000>; 405 }; 406 }; 407 408 vccio_acodec: LDO_REG4 { 409 regulator-name = "vccio_acodec"; 410 regulator-always-on; 411 regulator-boot-on; 412 regulator-min-microvolt = <3300000>; 413 regulator-max-microvolt = <3300000>; 414 415 regulator-state-mem { 416 regulator-off-in-suspend; 417 }; 418 }; 419 420 vccio_sd: LDO_REG5 { 421 regulator-name = "vccio_sd"; 422 regulator-min-microvolt = <1800000>; 423 regulator-max-microvolt = <3300000>; 424 425 regulator-state-mem { 426 regulator-off-in-suspend; 427 }; 428 }; 429 430 vcc3v3_pmu: LDO_REG6 { 431 regulator-name = "vcc3v3_pmu"; 432 regulator-always-on; 433 regulator-boot-on; 434 regulator-min-microvolt = <3300000>; 435 regulator-max-microvolt = <3300000>; 436 437 regulator-state-mem { 438 regulator-on-in-suspend; 439 regulator-suspend-microvolt = <3300000>; 440 }; 441 }; 442 443 vcca_1v8: LDO_REG7 { 444 regulator-name = "vcca_1v8"; 445 regulator-always-on; 446 regulator-boot-on; 447 regulator-min-microvolt = <1800000>; 448 regulator-max-microvolt = <1800000>; 449 450 regulator-state-mem { 451 regulator-off-in-suspend; 452 }; 453 }; 454 455 vcca1v8_pmu: LDO_REG8 { 456 regulator-name = "vcca1v8_pmu"; 457 regulator-always-on; 458 regulator-boot-on; 459 regulator-min-microvolt = <1800000>; 460 regulator-max-microvolt = <1800000>; 461 462 regulator-state-mem { 463 regulator-on-in-suspend; 464 regulator-suspend-microvolt = <1800000>; 465 }; 466 }; 467 468 vcca1v8_image: LDO_REG9 { 469 regulator-name = "vcca1v8_image"; 470 regulator-always-on; 471 regulator-min-microvolt = <1800000>; 472 regulator-max-microvolt = <1800000>; 473 474 regulator-state-mem { 475 regulator-off-in-suspend; 476 }; 477 }; 478 479 vcc_3v3: SWITCH_REG1 { 480 regulator-name = "vcc_3v3"; 481 regulator-always-on; 482 regulator-boot-on; 483 484 regulator-state-mem { 485 regulator-off-in-suspend; 486 }; 487 }; 488 489 vcc3v3_sd: SWITCH_REG2 { 490 regulator-name = "vcc3v3_sd"; 491 regulator-always-on; 492 493 regulator-state-mem { 494 regulator-off-in-suspend; 495 }; 496 }; 497 }; 498 }; 499}; 500 501&i2c3 { 502 status = "okay"; 503 504 hym8563: rtc@51 { 505 compatible = "haoyu,hym8563"; 506 reg = <0x51>; 507 interrupt-parent = <&gpio0>; 508 interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>; 509 #clock-cells = <0>; 510 clock-output-names = "rtcic_32kout"; 511 pinctrl-names = "default"; 512 pinctrl-0 = <&hym8563_int>; 513 wakeup-source; 514 }; 515}; 516 517&i2c5 { 518 /* pin 3 (SDA) + 4 (SCL) of header con2 */ 519 status = "disabled"; 520}; 521 522&i2s0_8ch { 523 /* hdmi sound */ 524 status = "okay"; 525}; 526 527&mdio0 { 528 #address-cells = <1>; 529 #size-cells = <0>; 530 531 switch@0 { 532 compatible = "mediatek,mt7531"; 533 reg = <0>; 534 535 ports { 536 #address-cells = <1>; 537 #size-cells = <0>; 538 539 port@1 { 540 reg = <1>; 541 label = "lan0"; 542 }; 543 544 port@2 { 545 reg = <2>; 546 label = "lan1"; 547 }; 548 549 port@3 { 550 reg = <3>; 551 label = "lan2"; 552 }; 553 554 port@4 { 555 reg = <4>; 556 label = "lan3"; 557 }; 558 559 port@5 { 560 reg = <5>; 561 label = "cpu"; 562 ethernet = <&gmac0>; 563 phy-mode = "rgmii"; 564 565 fixed-link { 566 speed = <1000>; 567 full-duplex; 568 pause; 569 }; 570 }; 571 }; 572 }; 573}; 574 575&mdio1 { 576 rgmii_phy1: ethernet-phy@0 { 577 compatible = "ethernet-phy-ieee802.3-c22"; 578 reg = <0x0>; 579 }; 580}; 581 582&pcie30phy { 583 data-lanes = <1 2>; 584 phy-supply = <&vcc3v3_pi6c_05>; 585 status = "okay"; 586}; 587 588&pcie3x1 { 589 /* M.2 slot */ 590 num-lanes = <1>; 591 pinctrl-names = "default"; 592 pinctrl-0 = <&ngffpcie_reset_h>; 593 reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; 594 vpcie3v3-supply = <&vcc3v3_ngff>; 595 status = "okay"; 596}; 597 598&pcie3x2 { 599 /* mPCIe slot */ 600 num-lanes = <1>; 601 pinctrl-names = "default"; 602 pinctrl-0 = <&minipcie_reset_h>; 603 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; 604 vpcie3v3-supply = <&vcc3v3_minipcie>; 605 status = "okay"; 606}; 607 608&pinctrl { 609 leds { 610 blue_led_pin: blue-led-pin { 611 rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 612 }; 613 green_led_pin: green-led-pin { 614 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 615 }; 616 }; 617 618 hym8563 { 619 hym8563_int: hym8563-int { 620 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 621 }; 622 }; 623 624 ir-receiver { 625 ir_receiver_pin: ir-receiver-pin { 626 rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 627 }; 628 }; 629 630 pcie { 631 minipcie_enable_h: minipcie-enable-h { 632 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; 633 }; 634 635 ngffpcie_enable_h: ngffpcie-enable-h { 636 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; 637 }; 638 639 minipcie_reset_h: minipcie-reset-h { 640 rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; 641 }; 642 643 ngffpcie_reset_h: ngffpcie-reset-h { 644 rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; 645 }; 646 }; 647 648 pmic { 649 pmic_int: pmic_int { 650 rockchip,pins = 651 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 652 }; 653 }; 654 655 usb { 656 vcc5v0_usb_host_en: vcc5v0_usb_host_en { 657 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 658 }; 659 660 vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { 661 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 662 }; 663 }; 664}; 665 666&pmu_io_domains { 667 pmuio1-supply = <&vcc3v3_pmu>; 668 pmuio2-supply = <&vcc3v3_pmu>; 669 vccio1-supply = <&vccio_acodec>; 670 vccio3-supply = <&vccio_sd>; 671 vccio4-supply = <&vcc_3v3>; 672 vccio5-supply = <&vcc_3v3>; 673 vccio6-supply = <&vcc_1v8>; 674 vccio7-supply = <&vcc_3v3>; 675 status = "okay"; 676}; 677 678&pwm8 { 679 /* fan 5v - gnd - pwm */ 680 status = "okay"; 681}; 682 683&pwm10 { 684 /* pin 7 of header con2 */ 685 status = "disabled"; 686}; 687 688&pwm11 { 689 /* pin 15 of header con2 */ 690 status = "disabled"; 691}; 692 693&pwm12 { 694 /* pin 21 of header con2 */ 695 /* shared with uart9 + spi3 */ 696 pinctrl-0 = <&pwm12m1_pins>; 697 status = "disabled"; 698}; 699 700&pwm13 { 701 /* pin 24 of header con2 */ 702 /* shared with uart9 */ 703 pinctrl-0 = <&pwm13m1_pins>; 704 status = "disabled"; 705}; 706 707&pwm14 { 708 /* pin 23 of header con2 */ 709 /* shared with spi3 */ 710 pinctrl-0 = <&pwm14m1_pins>; 711 status = "disabled"; 712}; 713 714&pwm15 { 715 /* pin 19 of header con2 */ 716 /* shared with spi3 */ 717 pinctrl-0 = <&pwm15m1_pins>; 718 status = "disabled"; 719}; 720 721&saradc { 722 vref-supply = <&vcca_1v8>; 723 status = "okay"; 724}; 725 726&sata2 { 727 status = "okay"; 728}; 729 730&sdhci { 731 bus-width = <8>; 732 max-frequency = <200000000>; 733 non-removable; 734 pinctrl-names = "default"; 735 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; 736 status = "okay"; 737}; 738 739&sdmmc0 { 740 bus-width = <4>; 741 cap-sd-highspeed; 742 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 743 disable-wp; 744 pinctrl-names = "default"; 745 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 746 sd-uhs-sdr104; 747 vmmc-supply = <&vcc3v3_sd>; 748 vqmmc-supply = <&vccio_sd>; 749 status = "okay"; 750}; 751 752&spi3 { 753 /* pin 19 (MO) + 21 (MI) + 23 (CK) of header con2 */ 754 /* shared with pwm12/14/15 and uart9 */ 755 pinctrl-0 = <&spi3m1_pins>; 756 status = "disabled"; 757}; 758 759&tsadc { 760 rockchip,hw-tshut-mode = <1>; 761 rockchip,hw-tshut-polarity = <0>; 762 status = "okay"; 763}; 764 765&uart0 { 766 /* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */ 767 status = "disabled"; 768}; 769 770&uart2 { 771 /* debug-uart */ 772 status = "okay"; 773}; 774 775&uart7 { 776 /* pin 11 (TX) + 13 (RX) of header con2 */ 777 pinctrl-0 = <&uart7m1_xfer>; 778 status = "disabled"; 779}; 780 781&uart9 { 782 /* pin 21 (TX) + 24 (RX) of header con2 */ 783 /* shared with pwm13 and pwm12/spi3 */ 784 pinctrl-0 = <&uart9m1_xfer>; 785 status = "disabled"; 786}; 787 788&usb_host0_ehci { 789 status = "okay"; 790}; 791 792&usb_host0_ohci { 793 status = "okay"; 794}; 795 796&usb_host0_xhci { 797 dr_mode = "host"; 798 status = "okay"; 799}; 800 801&usb_host1_ehci { 802 status = "okay"; 803}; 804 805&usb_host1_ohci { 806 status = "okay"; 807}; 808 809&usb_host1_xhci { 810 status = "okay"; 811}; 812 813&usb2phy0 { 814 status = "okay"; 815}; 816 817&usb2phy0_host { 818 phy-supply = <&vcc5v0_usb_host>; 819 status = "okay"; 820}; 821 822&usb2phy0_otg { 823 phy-supply = <&vcc5v0_usb_otg>; 824 status = "okay"; 825}; 826 827&usb2phy1 { 828 /* USB for PCIe/M2 */ 829 status = "okay"; 830}; 831 832&usb2phy1_host { 833 status = "okay"; 834}; 835 836&usb2phy1_otg { 837 status = "okay"; 838}; 839 840&vop { 841 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 842 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 843 status = "okay"; 844}; 845 846&vop_mmu { 847 status = "okay"; 848}; 849 850&vp0 { 851 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 852 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 853 remote-endpoint = <&hdmi_in_vp0>; 854 }; 855}; 856