1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Author: Frank Wunderlich <frank-w@public-files.de> 4 * 5 */ 6 7/dts-v1/; 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include "rk3568.dtsi" 12 13/ { 14 model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; 15 compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; 16 17 aliases { 18 ethernet0 = &gmac0; 19 ethernet1 = &gmac1; 20 mmc0 = &sdmmc0; 21 mmc1 = &sdhci; 22 }; 23 24 chosen: chosen { 25 stdout-path = "serial2:1500000n8"; 26 }; 27 28 leds { 29 compatible = "gpio-leds"; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&blue_led_pin &green_led_pin>; 32 33 blue_led: led-0 { 34 color = <LED_COLOR_ID_BLUE>; 35 default-state = "off"; 36 function = LED_FUNCTION_STATUS; 37 gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; 38 }; 39 40 green_led: led-1 { 41 color = <LED_COLOR_ID_GREEN>; 42 default-state = "on"; 43 function = LED_FUNCTION_POWER; 44 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; 45 }; 46 }; 47 48 dc_12v: dc-12v { 49 compatible = "regulator-fixed"; 50 regulator-name = "dc_12v"; 51 regulator-always-on; 52 regulator-boot-on; 53 regulator-min-microvolt = <12000000>; 54 regulator-max-microvolt = <12000000>; 55 }; 56 57 vcc3v3_sys: vcc3v3-sys { 58 compatible = "regulator-fixed"; 59 regulator-name = "vcc3v3_sys"; 60 regulator-always-on; 61 regulator-boot-on; 62 regulator-min-microvolt = <3300000>; 63 regulator-max-microvolt = <3300000>; 64 vin-supply = <&dc_12v>; 65 }; 66 67 vcc5v0_sys: vcc5v0-sys { 68 compatible = "regulator-fixed"; 69 regulator-name = "vcc5v0_sys"; 70 regulator-always-on; 71 regulator-boot-on; 72 regulator-min-microvolt = <5000000>; 73 regulator-max-microvolt = <5000000>; 74 vin-supply = <&dc_12v>; 75 }; 76}; 77 78&gmac0 { 79 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 80 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; 81 clock_in_out = "input"; 82 phy-mode = "rgmii"; 83 pinctrl-names = "default"; 84 pinctrl-0 = <&gmac0_miim 85 &gmac0_tx_bus2 86 &gmac0_rx_bus2 87 &gmac0_rgmii_clk 88 &gmac0_rgmii_bus>; 89 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 90 snps,reset-active-low; 91 /* Reset time is 20ms, 100ms for rtl8211f */ 92 snps,reset-delays-us = <0 20000 100000>; 93 tx_delay = <0x4f>; 94 rx_delay = <0x0f>; 95 status = "okay"; 96 97 fixed-link { 98 speed = <1000>; 99 full-duplex; 100 pause; 101 }; 102}; 103 104&gmac1 { 105 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 106 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; 107 clock_in_out = "output"; 108 phy-handle = <&rgmii_phy1>; 109 phy-mode = "rgmii"; 110 pinctrl-names = "default"; 111 pinctrl-0 = <&gmac1m1_miim 112 &gmac1m1_tx_bus2 113 &gmac1m1_rx_bus2 114 &gmac1m1_rgmii_clk 115 &gmac1m1_rgmii_bus>; 116 117 snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; 118 snps,reset-active-low; 119 /* Reset time is 20ms, 100ms for rtl8211f */ 120 snps,reset-delays-us = <0 20000 100000>; 121 122 tx_delay = <0x3c>; 123 rx_delay = <0x2f>; 124 125 status = "okay"; 126}; 127 128&i2c0 { 129 status = "okay"; 130 131 rk809: pmic@20 { 132 compatible = "rockchip,rk809"; 133 reg = <0x20>; 134 interrupt-parent = <&gpio0>; 135 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 136 #clock-cells = <1>; 137 pinctrl-names = "default"; 138 pinctrl-0 = <&pmic_int>; 139 rockchip,system-power-controller; 140 vcc1-supply = <&vcc3v3_sys>; 141 vcc2-supply = <&vcc3v3_sys>; 142 vcc3-supply = <&vcc3v3_sys>; 143 vcc4-supply = <&vcc3v3_sys>; 144 vcc5-supply = <&vcc3v3_sys>; 145 vcc6-supply = <&vcc3v3_sys>; 146 vcc7-supply = <&vcc3v3_sys>; 147 vcc8-supply = <&vcc3v3_sys>; 148 vcc9-supply = <&vcc3v3_sys>; 149 wakeup-source; 150 151 regulators { 152 vdd_logic: DCDC_REG1 { 153 regulator-name = "vdd_logic"; 154 regulator-always-on; 155 regulator-boot-on; 156 regulator-init-microvolt = <900000>; 157 regulator-initial-mode = <0x2>; 158 regulator-min-microvolt = <500000>; 159 regulator-max-microvolt = <1350000>; 160 regulator-ramp-delay = <6001>; 161 162 regulator-state-mem { 163 regulator-off-in-suspend; 164 }; 165 }; 166 167 vdd_gpu: DCDC_REG2 { 168 regulator-name = "vdd_gpu"; 169 regulator-init-microvolt = <900000>; 170 regulator-initial-mode = <0x2>; 171 regulator-min-microvolt = <500000>; 172 regulator-max-microvolt = <1350000>; 173 regulator-ramp-delay = <6001>; 174 175 regulator-state-mem { 176 regulator-off-in-suspend; 177 }; 178 }; 179 180 vcc_ddr: DCDC_REG3 { 181 regulator-name = "vcc_ddr"; 182 regulator-always-on; 183 regulator-boot-on; 184 regulator-initial-mode = <0x2>; 185 186 regulator-state-mem { 187 regulator-on-in-suspend; 188 }; 189 }; 190 191 vdd_npu: DCDC_REG4 { 192 regulator-name = "vdd_npu"; 193 regulator-init-microvolt = <900000>; 194 regulator-initial-mode = <0x2>; 195 regulator-min-microvolt = <500000>; 196 regulator-max-microvolt = <1350000>; 197 regulator-ramp-delay = <6001>; 198 199 regulator-state-mem { 200 regulator-off-in-suspend; 201 }; 202 }; 203 204 vcc_1v8: DCDC_REG5 { 205 regulator-name = "vcc_1v8"; 206 regulator-always-on; 207 regulator-boot-on; 208 regulator-min-microvolt = <1800000>; 209 regulator-max-microvolt = <1800000>; 210 211 regulator-state-mem { 212 regulator-off-in-suspend; 213 }; 214 }; 215 216 vdda0v9_image: LDO_REG1 { 217 regulator-name = "vdda0v9_image"; 218 regulator-min-microvolt = <900000>; 219 regulator-max-microvolt = <900000>; 220 221 regulator-state-mem { 222 regulator-off-in-suspend; 223 }; 224 }; 225 226 vdda_0v9: LDO_REG2 { 227 regulator-name = "vdda_0v9"; 228 regulator-always-on; 229 regulator-boot-on; 230 regulator-min-microvolt = <900000>; 231 regulator-max-microvolt = <900000>; 232 233 regulator-state-mem { 234 regulator-off-in-suspend; 235 }; 236 }; 237 238 vdda0v9_pmu: LDO_REG3 { 239 regulator-name = "vdda0v9_pmu"; 240 regulator-always-on; 241 regulator-boot-on; 242 regulator-min-microvolt = <900000>; 243 regulator-max-microvolt = <900000>; 244 245 regulator-state-mem { 246 regulator-on-in-suspend; 247 regulator-suspend-microvolt = <900000>; 248 }; 249 }; 250 251 vccio_acodec: LDO_REG4 { 252 regulator-name = "vccio_acodec"; 253 regulator-always-on; 254 regulator-boot-on; 255 regulator-min-microvolt = <3300000>; 256 regulator-max-microvolt = <3300000>; 257 258 regulator-state-mem { 259 regulator-off-in-suspend; 260 }; 261 }; 262 263 vccio_sd: LDO_REG5 { 264 regulator-name = "vccio_sd"; 265 regulator-min-microvolt = <1800000>; 266 regulator-max-microvolt = <3300000>; 267 268 regulator-state-mem { 269 regulator-off-in-suspend; 270 }; 271 }; 272 273 vcc3v3_pmu: LDO_REG6 { 274 regulator-name = "vcc3v3_pmu"; 275 regulator-always-on; 276 regulator-boot-on; 277 regulator-min-microvolt = <3300000>; 278 regulator-max-microvolt = <3300000>; 279 280 regulator-state-mem { 281 regulator-on-in-suspend; 282 regulator-suspend-microvolt = <3300000>; 283 }; 284 }; 285 286 vcca_1v8: LDO_REG7 { 287 regulator-name = "vcca_1v8"; 288 regulator-always-on; 289 regulator-boot-on; 290 regulator-min-microvolt = <1800000>; 291 regulator-max-microvolt = <1800000>; 292 293 regulator-state-mem { 294 regulator-off-in-suspend; 295 }; 296 }; 297 298 vcca1v8_pmu: LDO_REG8 { 299 regulator-name = "vcca1v8_pmu"; 300 regulator-always-on; 301 regulator-boot-on; 302 regulator-min-microvolt = <1800000>; 303 regulator-max-microvolt = <1800000>; 304 305 regulator-state-mem { 306 regulator-on-in-suspend; 307 regulator-suspend-microvolt = <1800000>; 308 }; 309 }; 310 311 vcca1v8_image: LDO_REG9 { 312 regulator-name = "vcca1v8_image"; 313 regulator-min-microvolt = <1800000>; 314 regulator-max-microvolt = <1800000>; 315 316 regulator-state-mem { 317 regulator-off-in-suspend; 318 }; 319 }; 320 321 vcc_3v3: SWITCH_REG1 { 322 regulator-name = "vcc_3v3"; 323 regulator-always-on; 324 regulator-boot-on; 325 326 regulator-state-mem { 327 regulator-off-in-suspend; 328 }; 329 }; 330 331 vcc3v3_sd: SWITCH_REG2 { 332 regulator-name = "vcc3v3_sd"; 333 regulator-always-on; 334 335 regulator-state-mem { 336 regulator-off-in-suspend; 337 }; 338 }; 339 }; 340 }; 341}; 342 343&i2c5 { 344 /* pin 3 (SDA) + 4 (SCL) of header con2 */ 345 status = "disabled"; 346}; 347 348&mdio1 { 349 rgmii_phy1: ethernet-phy@0 { 350 compatible = "ethernet-phy-ieee802.3-c22"; 351 reg = <0x0>; 352 }; 353}; 354 355&pinctrl { 356 leds { 357 blue_led_pin: blue-led-pin { 358 rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 359 }; 360 green_led_pin: green-led-pin { 361 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 362 }; 363 }; 364 365 pmic { 366 pmic_int: pmic_int { 367 rockchip,pins = 368 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 369 }; 370 }; 371}; 372 373&pmu_io_domains { 374 pmuio1-supply = <&vcc3v3_pmu>; 375 pmuio2-supply = <&vcc3v3_pmu>; 376 vccio1-supply = <&vccio_acodec>; 377 vccio3-supply = <&vccio_sd>; 378 vccio4-supply = <&vcc_3v3>; 379 vccio5-supply = <&vcc_3v3>; 380 vccio6-supply = <&vcc_1v8>; 381 vccio7-supply = <&vcc_3v3>; 382 status = "okay"; 383}; 384 385&pwm8 { 386 /* fan 5v - gnd - pwm */ 387 status = "okay"; 388}; 389 390&pwm10 { 391 /* pin 7 of header con2 */ 392 status = "disabled"; 393}; 394 395&pwm11 { 396 /* pin 15 of header con2 */ 397 status = "disabled"; 398}; 399 400&pwm12 { 401 /* pin 21 of header con2 */ 402 /* shared with uart9 + spi3 */ 403 pinctrl-0 = <&pwm12m1_pins>; 404 status = "disabled"; 405}; 406 407&pwm13 { 408 /* pin 24 of header con2 */ 409 /* shared with uart9 */ 410 pinctrl-0 = <&pwm13m1_pins>; 411 status = "disabled"; 412}; 413 414&pwm14 { 415 /* pin 23 of header con2 */ 416 /* shared with spi3 */ 417 pinctrl-0 = <&pwm14m1_pins>; 418 status = "disabled"; 419}; 420 421&pwm15 { 422 /* pin 19 of header con2 */ 423 /* shared with spi3 */ 424 pinctrl-0 = <&pwm15m1_pins>; 425 status = "disabled"; 426}; 427 428&saradc { 429 vref-supply = <&vcca_1v8>; 430 status = "okay"; 431}; 432 433&sdhci { 434 bus-width = <8>; 435 max-frequency = <200000000>; 436 non-removable; 437 pinctrl-names = "default"; 438 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; 439 status = "okay"; 440}; 441 442&sdmmc0 { 443 bus-width = <4>; 444 cap-sd-highspeed; 445 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 446 disable-wp; 447 pinctrl-names = "default"; 448 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 449 sd-uhs-sdr104; 450 vmmc-supply = <&vcc3v3_sd>; 451 vqmmc-supply = <&vccio_sd>; 452 status = "okay"; 453}; 454 455&spi3 { 456 /* pin 19 (MO) + 21 (MI) + 23 (CK) of header con2 */ 457 /* shared with pwm12/14/15 and uart9 */ 458 pinctrl-0 = <&spi3m1_pins>; 459 status = "disabled"; 460}; 461 462&tsadc { 463 status = "okay"; 464}; 465 466&uart0 { 467 /* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */ 468 status = "disabled"; 469}; 470 471&uart2 { 472 /* debug-uart */ 473 status = "okay"; 474}; 475 476&uart7 { 477 /* pin 11 (TX) + 13 (RX) of header con2 */ 478 pinctrl-0 = <&uart7m1_xfer>; 479 status = "disabled"; 480}; 481 482&uart9 { 483 /* pin 21 (TX) + 24 (RX) of header con2 */ 484 /* shared with pwm13 and pwm12/spi3 */ 485 pinctrl-0 = <&uart9m1_xfer>; 486 status = "disabled"; 487}; 488