1*5f62a964SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*5f62a964SEmmanuel Vadot/* 3*5f62a964SEmmanuel Vadot * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd 4*5f62a964SEmmanuel Vadot */ 5*5f62a964SEmmanuel Vadot 6*5f62a964SEmmanuel Vadot#include "rk3399-base.dtsi" 7*5f62a964SEmmanuel Vadot 8*5f62a964SEmmanuel Vadot/ { 9*5f62a964SEmmanuel Vadot cluster0_opp: opp-table-0 { 10*5f62a964SEmmanuel Vadot compatible = "operating-points-v2"; 11*5f62a964SEmmanuel Vadot opp-shared; 12*5f62a964SEmmanuel Vadot 13*5f62a964SEmmanuel Vadot opp00 { 14*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <408000000>; 15*5f62a964SEmmanuel Vadot opp-microvolt = <825000 825000 1250000>; 16*5f62a964SEmmanuel Vadot clock-latency-ns = <40000>; 17*5f62a964SEmmanuel Vadot }; 18*5f62a964SEmmanuel Vadot opp01 { 19*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <600000000>; 20*5f62a964SEmmanuel Vadot opp-microvolt = <825000 825000 1250000>; 21*5f62a964SEmmanuel Vadot }; 22*5f62a964SEmmanuel Vadot opp02 { 23*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <816000000>; 24*5f62a964SEmmanuel Vadot opp-microvolt = <850000 850000 1250000>; 25*5f62a964SEmmanuel Vadot }; 26*5f62a964SEmmanuel Vadot opp03 { 27*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <1008000000>; 28*5f62a964SEmmanuel Vadot opp-microvolt = <925000 925000 1250000>; 29*5f62a964SEmmanuel Vadot }; 30*5f62a964SEmmanuel Vadot }; 31*5f62a964SEmmanuel Vadot 32*5f62a964SEmmanuel Vadot cluster1_opp: opp-table-1 { 33*5f62a964SEmmanuel Vadot compatible = "operating-points-v2"; 34*5f62a964SEmmanuel Vadot opp-shared; 35*5f62a964SEmmanuel Vadot 36*5f62a964SEmmanuel Vadot opp00 { 37*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <408000000>; 38*5f62a964SEmmanuel Vadot opp-microvolt = <825000 825000 1250000>; 39*5f62a964SEmmanuel Vadot clock-latency-ns = <40000>; 40*5f62a964SEmmanuel Vadot }; 41*5f62a964SEmmanuel Vadot opp01 { 42*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <600000000>; 43*5f62a964SEmmanuel Vadot opp-microvolt = <825000 825000 1250000>; 44*5f62a964SEmmanuel Vadot }; 45*5f62a964SEmmanuel Vadot opp02 { 46*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <816000000>; 47*5f62a964SEmmanuel Vadot opp-microvolt = <825000 825000 1250000>; 48*5f62a964SEmmanuel Vadot }; 49*5f62a964SEmmanuel Vadot opp03 { 50*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <1008000000>; 51*5f62a964SEmmanuel Vadot opp-microvolt = <875000 875000 1250000>; 52*5f62a964SEmmanuel Vadot }; 53*5f62a964SEmmanuel Vadot opp04 { 54*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <1200000000>; 55*5f62a964SEmmanuel Vadot opp-microvolt = <950000 950000 1250000>; 56*5f62a964SEmmanuel Vadot }; 57*5f62a964SEmmanuel Vadot opp05 { 58*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <1416000000>; 59*5f62a964SEmmanuel Vadot opp-microvolt = <1025000 1025000 1250000>; 60*5f62a964SEmmanuel Vadot }; 61*5f62a964SEmmanuel Vadot opp06 { 62*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <1500000000>; 63*5f62a964SEmmanuel Vadot opp-microvolt = <1100000 1100000 1150000>; 64*5f62a964SEmmanuel Vadot }; 65*5f62a964SEmmanuel Vadot }; 66*5f62a964SEmmanuel Vadot 67*5f62a964SEmmanuel Vadot gpu_opp_table: opp-table-2 { 68*5f62a964SEmmanuel Vadot compatible = "operating-points-v2"; 69*5f62a964SEmmanuel Vadot 70*5f62a964SEmmanuel Vadot opp00 { 71*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <200000000>; 72*5f62a964SEmmanuel Vadot opp-microvolt = <825000 825000 1150000>; 73*5f62a964SEmmanuel Vadot }; 74*5f62a964SEmmanuel Vadot opp01 { 75*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <297000000>; 76*5f62a964SEmmanuel Vadot opp-microvolt = <825000 825000 1150000>; 77*5f62a964SEmmanuel Vadot }; 78*5f62a964SEmmanuel Vadot opp02 { 79*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <400000000>; 80*5f62a964SEmmanuel Vadot opp-microvolt = <825000 825000 1150000>; 81*5f62a964SEmmanuel Vadot }; 82*5f62a964SEmmanuel Vadot opp03 { 83*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <500000000>; 84*5f62a964SEmmanuel Vadot opp-microvolt = <875000 875000 1150000>; 85*5f62a964SEmmanuel Vadot }; 86*5f62a964SEmmanuel Vadot opp04 { 87*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <600000000>; 88*5f62a964SEmmanuel Vadot opp-microvolt = <925000 925000 1150000>; 89*5f62a964SEmmanuel Vadot }; 90*5f62a964SEmmanuel Vadot opp05 { 91*5f62a964SEmmanuel Vadot opp-hz = /bits/ 64 <800000000>; 92*5f62a964SEmmanuel Vadot opp-microvolt = <1100000 1100000 1150000>; 93*5f62a964SEmmanuel Vadot }; 94*5f62a964SEmmanuel Vadot }; 95*5f62a964SEmmanuel Vadot}; 96*5f62a964SEmmanuel Vadot 97*5f62a964SEmmanuel Vadot&cpu_l0 { 98*5f62a964SEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 99*5f62a964SEmmanuel Vadot}; 100*5f62a964SEmmanuel Vadot 101*5f62a964SEmmanuel Vadot&cpu_l1 { 102*5f62a964SEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 103*5f62a964SEmmanuel Vadot}; 104*5f62a964SEmmanuel Vadot 105*5f62a964SEmmanuel Vadot&cpu_l2 { 106*5f62a964SEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 107*5f62a964SEmmanuel Vadot}; 108*5f62a964SEmmanuel Vadot 109*5f62a964SEmmanuel Vadot&cpu_l3 { 110*5f62a964SEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 111*5f62a964SEmmanuel Vadot}; 112*5f62a964SEmmanuel Vadot 113*5f62a964SEmmanuel Vadot&cpu_b0 { 114*5f62a964SEmmanuel Vadot operating-points-v2 = <&cluster1_opp>; 115*5f62a964SEmmanuel Vadot}; 116*5f62a964SEmmanuel Vadot 117*5f62a964SEmmanuel Vadot&cpu_b1 { 118*5f62a964SEmmanuel Vadot operating-points-v2 = <&cluster1_opp>; 119*5f62a964SEmmanuel Vadot}; 120*5f62a964SEmmanuel Vadot 121*5f62a964SEmmanuel Vadot&gpu { 122*5f62a964SEmmanuel Vadot operating-points-v2 = <&gpu_opp_table>; 123*5f62a964SEmmanuel Vadot}; 124