1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH 4 */ 5 6#include <dt-bindings/pwm/pwm.h> 7#include "rk3399.dtsi" 8#include "rk3399-opp.dtsi" 9 10/ { 11 aliases { 12 mmc0 = &sdhci; 13 }; 14 15 leds { 16 compatible = "gpio-leds"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&module_led_pin>; 19 20 module_led: led-0 { 21 label = "module_led"; 22 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; 23 linux,default-trigger = "heartbeat"; 24 panic-indicator; 25 }; 26 }; 27 28 extcon_usb3: extcon-usb3 { 29 compatible = "linux,extcon-usb-gpio"; 30 id-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; 31 pinctrl-names = "default"; 32 pinctrl-0 = <&usb3_id>; 33 }; 34 35 clkin_gmac: external-gmac-clock { 36 compatible = "fixed-clock"; 37 clock-frequency = <125000000>; 38 clock-output-names = "clkin_gmac"; 39 #clock-cells = <0>; 40 }; 41 42 vcc1v2_phy: vcc1v2-phy { 43 compatible = "regulator-fixed"; 44 regulator-name = "vcc1v2_phy"; 45 regulator-always-on; 46 regulator-boot-on; 47 regulator-min-microvolt = <1200000>; 48 regulator-max-microvolt = <1200000>; 49 vin-supply = <&vcc5v0_sys>; 50 }; 51 52 vcc3v3_sys: vcc3v3-sys { 53 compatible = "regulator-fixed"; 54 regulator-name = "vcc3v3_sys"; 55 regulator-always-on; 56 regulator-boot-on; 57 regulator-min-microvolt = <3300000>; 58 regulator-max-microvolt = <3300000>; 59 vin-supply = <&vcc5v0_sys>; 60 }; 61 62 vcc5v0_host: vcc5v0-host-regulator { 63 compatible = "regulator-fixed"; 64 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; 65 enable-active-low; 66 pinctrl-names = "default"; 67 pinctrl-0 = <&vcc5v0_host_en>; 68 regulator-name = "vcc5v0_host"; 69 regulator-always-on; 70 vin-supply = <&vcc5v0_sys>; 71 }; 72 73 vcc5v0_sys: vcc5v0-sys { 74 compatible = "regulator-fixed"; 75 regulator-name = "vcc5v0_sys"; 76 regulator-always-on; 77 regulator-boot-on; 78 regulator-min-microvolt = <5000000>; 79 regulator-max-microvolt = <5000000>; 80 }; 81}; 82 83&cpu_b0 { 84 cpu-supply = <&vdd_cpu_b>; 85}; 86 87&cpu_b1 { 88 cpu-supply = <&vdd_cpu_b>; 89}; 90 91&cpu_l0 { 92 cpu-supply = <&vdd_cpu_l>; 93}; 94 95&cpu_l1 { 96 cpu-supply = <&vdd_cpu_l>; 97}; 98 99&cpu_l2 { 100 cpu-supply = <&vdd_cpu_l>; 101}; 102 103&cpu_l3 { 104 cpu-supply = <&vdd_cpu_l>; 105}; 106 107&emmc_phy { 108 status = "okay"; 109 drive-impedance-ohm = <33>; 110}; 111 112&gmac { 113 assigned-clocks = <&cru SCLK_RMII_SRC>; 114 assigned-clock-parents = <&clkin_gmac>; 115 clock_in_out = "input"; 116 phy-supply = <&vcc1v2_phy>; 117 phy-mode = "rgmii"; 118 pinctrl-names = "default"; 119 pinctrl-0 = <&rgmii_pins>; 120 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 121 snps,reset-active-low; 122 snps,reset-delays-us = <0 10000 50000>; 123 tx_delay = <0x10>; 124 rx_delay = <0x10>; 125 status = "okay"; 126}; 127 128&gpu { 129 mali-supply = <&vdd_gpu>; 130 status = "okay"; 131}; 132 133&i2c0 { 134 status = "okay"; 135 i2c-scl-rising-time-ns = <168>; 136 i2c-scl-falling-time-ns = <4>; 137 clock-frequency = <400000>; 138 139 rk808: pmic@1b { 140 compatible = "rockchip,rk808"; 141 reg = <0x1b>; 142 interrupt-parent = <&gpio1>; 143 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; 144 #clock-cells = <1>; 145 clock-output-names = "xin32k", "rk808-clkout2"; 146 pinctrl-names = "default"; 147 pinctrl-0 = <&pmic_int_l>; 148 rockchip,system-power-controller; 149 wakeup-source; 150 151 vcc1-supply = <&vcc5v0_sys>; 152 vcc2-supply = <&vcc5v0_sys>; 153 vcc3-supply = <&vcc5v0_sys>; 154 vcc4-supply = <&vcc5v0_sys>; 155 vcc6-supply = <&vcc5v0_sys>; 156 vcc7-supply = <&vcc5v0_sys>; 157 vcc8-supply = <&vcc3v3_sys>; 158 vcc9-supply = <&vcc5v0_sys>; 159 vcc10-supply = <&vcc5v0_sys>; 160 vcc11-supply = <&vcc5v0_sys>; 161 vcc12-supply = <&vcc3v3_sys>; 162 vddio-supply = <&vcc1v8_pmu>; 163 164 regulators { 165 vdd_center: DCDC_REG1 { 166 regulator-name = "vdd_center"; 167 regulator-min-microvolt = <750000>; 168 regulator-max-microvolt = <1350000>; 169 regulator-ramp-delay = <6001>; 170 regulator-always-on; 171 regulator-boot-on; 172 regulator-state-mem { 173 regulator-off-in-suspend; 174 }; 175 }; 176 177 vdd_cpu_l: DCDC_REG2 { 178 regulator-name = "vdd_cpu_l"; 179 regulator-min-microvolt = <750000>; 180 regulator-max-microvolt = <1350000>; 181 regulator-ramp-delay = <6001>; 182 regulator-always-on; 183 regulator-boot-on; 184 regulator-state-mem { 185 regulator-off-in-suspend; 186 }; 187 }; 188 189 vcc_ddr: DCDC_REG3 { 190 regulator-name = "vcc_ddr"; 191 regulator-always-on; 192 regulator-boot-on; 193 regulator-state-mem { 194 regulator-on-in-suspend; 195 }; 196 }; 197 198 vcc_1v8: DCDC_REG4 { 199 regulator-name = "vcc_1v8"; 200 regulator-min-microvolt = <1800000>; 201 regulator-max-microvolt = <1800000>; 202 regulator-always-on; 203 regulator-boot-on; 204 regulator-state-mem { 205 regulator-on-in-suspend; 206 regulator-suspend-microvolt = <1800000>; 207 }; 208 }; 209 210 vcc_ldo1: LDO_REG1 { 211 regulator-name = "vcc_ldo1"; 212 regulator-min-microvolt = <1800000>; 213 regulator-max-microvolt = <1800000>; 214 regulator-boot-on; 215 regulator-state-mem { 216 regulator-off-in-suspend; 217 }; 218 }; 219 220 vcc1v8_hdmi: LDO_REG2 { 221 regulator-name = "vcc1v8_hdmi"; 222 regulator-min-microvolt = <1800000>; 223 regulator-max-microvolt = <1800000>; 224 regulator-always-on; 225 regulator-boot-on; 226 regulator-state-mem { 227 regulator-off-in-suspend; 228 }; 229 }; 230 231 vcc1v8_pmu: LDO_REG3 { 232 regulator-name = "vcc1v8_pmu"; 233 regulator-min-microvolt = <1800000>; 234 regulator-max-microvolt = <1800000>; 235 regulator-always-on; 236 regulator-boot-on; 237 regulator-state-mem { 238 regulator-on-in-suspend; 239 regulator-suspend-microvolt = <1800000>; 240 }; 241 }; 242 243 vcc_sd: LDO_REG4 { 244 regulator-name = "vcc_sd"; 245 regulator-min-microvolt = <1800000>; 246 regulator-max-microvolt = <3000000>; 247 regulator-always-on; 248 regulator-boot-on; 249 regulator-state-mem { 250 regulator-on-in-suspend; 251 regulator-suspend-microvolt = <3000000>; 252 }; 253 }; 254 255 vcc_ldo5: LDO_REG5 { 256 regulator-name = "vcc_ldo5"; 257 regulator-min-microvolt = <3000000>; 258 regulator-max-microvolt = <3000000>; 259 regulator-boot-on; 260 regulator-state-mem { 261 regulator-off-in-suspend; 262 }; 263 }; 264 265 vcc_ldo6: LDO_REG6 { 266 regulator-name = "vcc_ldo6"; 267 regulator-min-microvolt = <1500000>; 268 regulator-max-microvolt = <1500000>; 269 regulator-boot-on; 270 regulator-state-mem { 271 regulator-off-in-suspend; 272 }; 273 }; 274 275 vcc0v9_hdmi: LDO_REG7 { 276 regulator-name = "vcc0v9_hdmi"; 277 regulator-min-microvolt = <900000>; 278 regulator-max-microvolt = <900000>; 279 regulator-always-on; 280 regulator-boot-on; 281 regulator-state-mem { 282 regulator-off-in-suspend; 283 }; 284 }; 285 286 vcc_efuse: LDO_REG8 { 287 regulator-name = "vcc_efuse"; 288 regulator-min-microvolt = <1800000>; 289 regulator-max-microvolt = <1800000>; 290 regulator-always-on; 291 regulator-boot-on; 292 regulator-state-mem { 293 regulator-off-in-suspend; 294 }; 295 }; 296 297 vcc3v3_s3: SWITCH_REG1 { 298 regulator-name = "vcc3v3_s3"; 299 regulator-always-on; 300 regulator-boot-on; 301 regulator-state-mem { 302 regulator-off-in-suspend; 303 }; 304 }; 305 306 vcc3v3_s0: SWITCH_REG2 { 307 regulator-name = "vcc3v3_s0"; 308 regulator-always-on; 309 regulator-boot-on; 310 regulator-state-mem { 311 regulator-off-in-suspend; 312 }; 313 }; 314 }; 315 }; 316 317 vdd_gpu: regulator@60 { 318 compatible = "fcs,fan53555"; 319 reg = <0x60>; 320 fcs,suspend-voltage-selector = <1>; 321 regulator-name = "vdd_gpu"; 322 regulator-min-microvolt = <600000>; 323 regulator-max-microvolt = <1230000>; 324 regulator-ramp-delay = <1000>; 325 regulator-always-on; 326 regulator-boot-on; 327 vin-supply = <&vcc5v0_sys>; 328 }; 329}; 330 331&i2c7 { 332 status = "okay"; 333 clock-frequency = <400000>; 334 335 fan: fan@18 { 336 compatible = "ti,amc6821"; 337 reg = <0x18>; 338 #cooling-cells = <2>; 339 }; 340 341 rtc_twi: rtc@6f { 342 compatible = "isil,isl1208"; 343 reg = <0x6f>; 344 }; 345}; 346 347&i2c8 { 348 status = "okay"; 349 clock-frequency = <400000>; 350 351 vdd_cpu_b: regulator@60 { 352 compatible = "fcs,fan53555"; 353 reg = <0x60>; 354 vin-supply = <&vcc5v0_sys>; 355 regulator-name = "vdd_cpu_b"; 356 regulator-min-microvolt = <600000>; 357 regulator-max-microvolt = <1230000>; 358 regulator-ramp-delay = <1000>; 359 fcs,suspend-voltage-selector = <1>; 360 regulator-always-on; 361 regulator-boot-on; 362 }; 363}; 364 365&i2s0 { 366 pinctrl-0 = <&i2s0_2ch_bus>; 367 rockchip,playback-channels = <2>; 368 rockchip,capture-channels = <2>; 369 status = "okay"; 370}; 371 372/* 373 * As Q7 does not specify neither a global nor a RX clock for I2S these 374 * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO. 375 * Therefore we have to redefine the i2s0_2ch_bus definition to prevent 376 * conflicts. 377 */ 378&i2s0_2ch_bus { 379 rockchip,pins = 380 <3 RK_PD0 1 &pcfg_pull_none>, 381 <3 RK_PD2 1 &pcfg_pull_none>, 382 <3 RK_PD3 1 &pcfg_pull_none>, 383 <3 RK_PD7 1 &pcfg_pull_none>; 384}; 385 386&io_domains { 387 status = "okay"; 388 bt656-supply = <&vcc_1v8>; 389 audio-supply = <&vcc_1v8>; 390 sdmmc-supply = <&vcc_sd>; 391 gpio1830-supply = <&vcc_1v8>; 392}; 393 394&pmu_io_domains { 395 status = "okay"; 396 pmu1830-supply = <&vcc_1v8>; 397}; 398 399&pwm2 { 400 status = "okay"; 401}; 402 403&pinctrl { 404 i2c8 { 405 i2c8_xfer_a: i2c8-xfer { 406 rockchip,pins = 407 <1 RK_PC4 1 &pcfg_pull_up>, 408 <1 RK_PC5 1 &pcfg_pull_up>; 409 }; 410 }; 411 412 leds { 413 module_led_pin: module-led-pin { 414 rockchip,pins = 415 <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 416 }; 417 }; 418 419 pmic { 420 pmic_int_l: pmic-int-l { 421 rockchip,pins = 422 <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; 423 }; 424 }; 425 426 usb2 { 427 vcc5v0_host_en: vcc5v0-host-en { 428 rockchip,pins = 429 <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 430 }; 431 }; 432 433 usb3 { 434 usb3_id: usb3-id { 435 rockchip,pins = 436 <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 437 }; 438 }; 439}; 440 441&sdhci { 442 /* 443 * Signal integrity isn't great at 200MHz but 100MHz has proven stable 444 * enough. 445 */ 446 max-frequency = <100000000>; 447 448 bus-width = <8>; 449 mmc-hs400-1_8v; 450 mmc-hs400-enhanced-strobe; 451 non-removable; 452 status = "okay"; 453}; 454 455&sdmmc { 456 vqmmc-supply = <&vcc_sd>; 457}; 458 459&spi1 { 460 status = "okay"; 461 462 norflash: flash@0 { 463 compatible = "jedec,spi-nor"; 464 reg = <0>; 465 spi-max-frequency = <50000000>; 466 }; 467}; 468 469&tcphy1 { 470 status = "okay"; 471}; 472 473&tsadc { 474 rockchip,hw-tshut-mode = <1>; 475 rockchip,hw-tshut-polarity = <1>; 476 status = "okay"; 477}; 478 479&u2phy1 { 480 status = "okay"; 481 482 u2phy1_otg: otg-port { 483 status = "okay"; 484 }; 485 486 u2phy1_host: host-port { 487 phy-supply = <&vcc5v0_host>; 488 status = "okay"; 489 }; 490}; 491 492&usbdrd3_1 { 493 status = "okay"; 494}; 495 496&usbdrd_dwc3_1 { 497 status = "okay"; 498 dr_mode = "host"; 499}; 500 501&usb_host1_ehci { 502 status = "okay"; 503}; 504 505&usb_host1_ohci { 506 status = "okay"; 507}; 508