1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * RK3399-based FriendlyElec boards device tree source 4 * 5 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd 6 * 7 * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. 8 * (http://www.friendlyarm.com) 9 * 10 * Copyright (c) 2018 Collabora Ltd. 11 * Copyright (c) 2019 Arm Ltd. 12 */ 13 14/dts-v1/; 15#include <dt-bindings/input/linux-event-codes.h> 16#include "rk3399.dtsi" 17#include "rk3399-opp.dtsi" 18 19/ { 20 aliases { 21 mmc0 = &sdio0; 22 mmc1 = &sdmmc; 23 mmc2 = &sdhci; 24 }; 25 26 chosen { 27 stdout-path = "serial2:1500000n8"; 28 }; 29 30 clkin_gmac: external-gmac-clock { 31 compatible = "fixed-clock"; 32 clock-frequency = <125000000>; 33 clock-output-names = "clkin_gmac"; 34 #clock-cells = <0>; 35 }; 36 37 vcc3v3_sys: vcc3v3-sys { 38 compatible = "regulator-fixed"; 39 regulator-always-on; 40 regulator-boot-on; 41 regulator-min-microvolt = <3300000>; 42 regulator-max-microvolt = <3300000>; 43 regulator-name = "vcc3v3_sys"; 44 }; 45 46 vcc5v0_sys: vcc5v0-sys { 47 compatible = "regulator-fixed"; 48 regulator-always-on; 49 regulator-boot-on; 50 regulator-min-microvolt = <5000000>; 51 regulator-max-microvolt = <5000000>; 52 regulator-name = "vcc5v0_sys"; 53 vin-supply = <&vdd_5v>; 54 }; 55 56 /* switched by pmic_sleep */ 57 vcc1v8_s3: vcc1v8-s3 { 58 compatible = "regulator-fixed"; 59 regulator-always-on; 60 regulator-boot-on; 61 regulator-min-microvolt = <1800000>; 62 regulator-max-microvolt = <1800000>; 63 regulator-name = "vcc1v8_s3"; 64 vin-supply = <&vcc_1v8>; 65 }; 66 67 vcc3v0_sd: vcc3v0-sd { 68 compatible = "regulator-fixed"; 69 enable-active-high; 70 gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; 71 pinctrl-names = "default"; 72 pinctrl-0 = <&sdmmc0_pwr_h>; 73 regulator-always-on; 74 regulator-min-microvolt = <3000000>; 75 regulator-max-microvolt = <3000000>; 76 regulator-name = "vcc3v0_sd"; 77 vin-supply = <&vcc3v3_sys>; 78 }; 79 80 /* 81 * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only 82 * drives the enable pin, but we can't quite model that. 83 */ 84 vcca0v9_s3: vcca0v9-s3 { 85 compatible = "regulator-fixed"; 86 regulator-min-microvolt = <900000>; 87 regulator-max-microvolt = <900000>; 88 regulator-name = "vcca0v9_s3"; 89 vin-supply = <&vcc1v8_s3>; 90 }; 91 92 /* As above, actually supplied by vcc3v3_sys */ 93 vcca1v8_s3: vcca1v8-s3 { 94 compatible = "regulator-fixed"; 95 regulator-min-microvolt = <1800000>; 96 regulator-max-microvolt = <1800000>; 97 regulator-name = "vcca1v8_s3"; 98 vin-supply = <&vcc1v8_s3>; 99 }; 100 101 vbus_typec: vbus-typec { 102 compatible = "regulator-fixed"; 103 regulator-min-microvolt = <5000000>; 104 regulator-max-microvolt = <5000000>; 105 regulator-name = "vbus_typec"; 106 }; 107 108 gpio-keys { 109 compatible = "gpio-keys"; 110 autorepeat; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&power_key>; 113 114 key-power { 115 debounce-interval = <100>; 116 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 117 label = "GPIO Key Power"; 118 linux,code = <KEY_POWER>; 119 wakeup-source; 120 }; 121 }; 122 123 leds: gpio-leds { 124 compatible = "gpio-leds"; 125 pinctrl-names = "default"; 126 pinctrl-0 = <&status_led_pin>; 127 128 status_led: led-0 { 129 gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 130 label = "status_led"; 131 linux,default-trigger = "heartbeat"; 132 }; 133 }; 134 135 sdio_pwrseq: sdio-pwrseq { 136 compatible = "mmc-pwrseq-simple"; 137 clocks = <&rk808 1>; 138 clock-names = "ext_clock"; 139 pinctrl-names = "default"; 140 pinctrl-0 = <&wifi_reg_on_h>; 141 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 142 }; 143}; 144 145&cpu_b0 { 146 cpu-supply = <&vdd_cpu_b>; 147}; 148 149&cpu_b1 { 150 cpu-supply = <&vdd_cpu_b>; 151}; 152 153&cpu_l0 { 154 cpu-supply = <&vdd_cpu_l>; 155}; 156 157&cpu_l1 { 158 cpu-supply = <&vdd_cpu_l>; 159}; 160 161&cpu_l2 { 162 cpu-supply = <&vdd_cpu_l>; 163}; 164 165&cpu_l3 { 166 cpu-supply = <&vdd_cpu_l>; 167}; 168 169&emmc_phy { 170 rockchip,enable-strobe-pulldown; 171 status = "okay"; 172}; 173 174&gmac { 175 assigned-clock-parents = <&clkin_gmac>; 176 assigned-clocks = <&cru SCLK_RMII_SRC>; 177 clock_in_out = "input"; 178 pinctrl-names = "default"; 179 pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>; 180 phy-handle = <&rtl8211e>; 181 phy-mode = "rgmii"; 182 phy-supply = <&vcc3v3_s3>; 183 tx_delay = <0x28>; 184 rx_delay = <0x11>; 185 status = "okay"; 186 187 mdio { 188 compatible = "snps,dwmac-mdio"; 189 #address-cells = <1>; 190 #size-cells = <0>; 191 192 rtl8211e: ethernet-phy@1 { 193 reg = <1>; 194 interrupt-parent = <&gpio3>; 195 interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; 196 reset-assert-us = <10000>; 197 reset-deassert-us = <30000>; 198 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 199 }; 200 }; 201}; 202 203&gpu { 204 mali-supply = <&vdd_gpu>; 205 status = "okay"; 206}; 207 208&hdmi { 209 ddc-i2c-bus = <&i2c7>; 210 pinctrl-names = "default"; 211 pinctrl-0 = <&hdmi_cec>; 212 status = "okay"; 213}; 214 215&hdmi_sound { 216 status = "okay"; 217}; 218 219&i2c0 { 220 clock-frequency = <400000>; 221 i2c-scl-rising-time-ns = <160>; 222 i2c-scl-falling-time-ns = <30>; 223 status = "okay"; 224 225 vdd_cpu_b: regulator@40 { 226 compatible = "silergy,syr827"; 227 reg = <0x40>; 228 fcs,suspend-voltage-selector = <1>; 229 pinctrl-names = "default"; 230 pinctrl-0 = <&cpu_b_sleep>; 231 regulator-always-on; 232 regulator-boot-on; 233 regulator-min-microvolt = <712500>; 234 regulator-max-microvolt = <1500000>; 235 regulator-name = "vdd_cpu_b"; 236 regulator-ramp-delay = <1000>; 237 vin-supply = <&vcc3v3_sys>; 238 239 regulator-state-mem { 240 regulator-off-in-suspend; 241 }; 242 }; 243 244 vdd_gpu: regulator@41 { 245 compatible = "silergy,syr828"; 246 reg = <0x41>; 247 fcs,suspend-voltage-selector = <1>; 248 pinctrl-names = "default"; 249 pinctrl-0 = <&gpu_sleep>; 250 regulator-always-on; 251 regulator-boot-on; 252 regulator-min-microvolt = <712500>; 253 regulator-max-microvolt = <1500000>; 254 regulator-name = "vdd_gpu"; 255 regulator-ramp-delay = <1000>; 256 vin-supply = <&vcc3v3_sys>; 257 258 regulator-state-mem { 259 regulator-off-in-suspend; 260 }; 261 }; 262 263 rk808: pmic@1b { 264 compatible = "rockchip,rk808"; 265 reg = <0x1b>; 266 clock-output-names = "xin32k", "rtc_clko_wifi"; 267 #clock-cells = <1>; 268 interrupt-parent = <&gpio1>; 269 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 270 pinctrl-names = "default"; 271 pinctrl-0 = <&pmic_int_l>, <&ap_pwroff>, <&clk_32k>; 272 rockchip,system-power-controller; 273 wakeup-source; 274 275 vcc1-supply = <&vcc3v3_sys>; 276 vcc2-supply = <&vcc3v3_sys>; 277 vcc3-supply = <&vcc3v3_sys>; 278 vcc4-supply = <&vcc3v3_sys>; 279 vcc6-supply = <&vcc3v3_sys>; 280 vcc7-supply = <&vcc3v3_sys>; 281 vcc8-supply = <&vcc3v3_sys>; 282 vcc9-supply = <&vcc3v3_sys>; 283 vcc10-supply = <&vcc3v3_sys>; 284 vcc11-supply = <&vcc3v3_sys>; 285 vcc12-supply = <&vcc3v3_sys>; 286 vddio-supply = <&vcc_3v0>; 287 288 regulators { 289 vdd_center: DCDC_REG1 { 290 regulator-always-on; 291 regulator-boot-on; 292 regulator-min-microvolt = <750000>; 293 regulator-max-microvolt = <1350000>; 294 regulator-name = "vdd_center"; 295 regulator-ramp-delay = <6001>; 296 297 regulator-state-mem { 298 regulator-off-in-suspend; 299 }; 300 }; 301 302 vdd_cpu_l: DCDC_REG2 { 303 regulator-always-on; 304 regulator-boot-on; 305 regulator-min-microvolt = <750000>; 306 regulator-max-microvolt = <1350000>; 307 regulator-name = "vdd_cpu_l"; 308 regulator-ramp-delay = <6001>; 309 310 regulator-state-mem { 311 regulator-off-in-suspend; 312 }; 313 }; 314 315 vcc_ddr: DCDC_REG3 { 316 regulator-always-on; 317 regulator-boot-on; 318 regulator-name = "vcc_ddr"; 319 320 regulator-state-mem { 321 regulator-on-in-suspend; 322 }; 323 }; 324 325 vcc_1v8: DCDC_REG4 { 326 regulator-always-on; 327 regulator-boot-on; 328 regulator-min-microvolt = <1800000>; 329 regulator-max-microvolt = <1800000>; 330 regulator-name = "vcc_1v8"; 331 332 regulator-state-mem { 333 regulator-on-in-suspend; 334 regulator-suspend-microvolt = <1800000>; 335 }; 336 }; 337 338 vcc1v8_cam: LDO_REG1 { 339 regulator-always-on; 340 regulator-boot-on; 341 regulator-min-microvolt = <1800000>; 342 regulator-max-microvolt = <1800000>; 343 regulator-name = "vcc1v8_cam"; 344 345 regulator-state-mem { 346 regulator-off-in-suspend; 347 }; 348 }; 349 350 vcc3v0_touch: LDO_REG2 { 351 regulator-always-on; 352 regulator-boot-on; 353 regulator-min-microvolt = <3000000>; 354 regulator-max-microvolt = <3000000>; 355 regulator-name = "vcc3v0_touch"; 356 357 regulator-state-mem { 358 regulator-off-in-suspend; 359 }; 360 }; 361 362 vcc1v8_pmupll: LDO_REG3 { 363 regulator-always-on; 364 regulator-boot-on; 365 regulator-min-microvolt = <1800000>; 366 regulator-max-microvolt = <1800000>; 367 regulator-name = "vcc1v8_pmupll"; 368 369 regulator-state-mem { 370 regulator-on-in-suspend; 371 regulator-suspend-microvolt = <1800000>; 372 }; 373 }; 374 375 vcc_sdio: LDO_REG4 { 376 regulator-always-on; 377 regulator-boot-on; 378 regulator-init-microvolt = <3000000>; 379 regulator-min-microvolt = <1800000>; 380 regulator-max-microvolt = <3300000>; 381 regulator-name = "vcc_sdio"; 382 383 regulator-state-mem { 384 regulator-on-in-suspend; 385 regulator-suspend-microvolt = <3000000>; 386 }; 387 }; 388 389 vcca3v0_codec: LDO_REG5 { 390 regulator-always-on; 391 regulator-boot-on; 392 regulator-min-microvolt = <3000000>; 393 regulator-max-microvolt = <3000000>; 394 regulator-name = "vcca3v0_codec"; 395 396 regulator-state-mem { 397 regulator-off-in-suspend; 398 }; 399 }; 400 401 vcc_1v5: LDO_REG6 { 402 regulator-always-on; 403 regulator-boot-on; 404 regulator-min-microvolt = <1500000>; 405 regulator-max-microvolt = <1500000>; 406 regulator-name = "vcc_1v5"; 407 408 regulator-state-mem { 409 regulator-on-in-suspend; 410 regulator-suspend-microvolt = <1500000>; 411 }; 412 }; 413 414 vcca1v8_codec: LDO_REG7 { 415 regulator-always-on; 416 regulator-boot-on; 417 regulator-min-microvolt = <1800000>; 418 regulator-max-microvolt = <1800000>; 419 regulator-name = "vcca1v8_codec"; 420 421 regulator-state-mem { 422 regulator-off-in-suspend; 423 }; 424 }; 425 426 vcc_3v0: LDO_REG8 { 427 regulator-always-on; 428 regulator-boot-on; 429 regulator-min-microvolt = <3000000>; 430 regulator-max-microvolt = <3000000>; 431 regulator-name = "vcc_3v0"; 432 433 regulator-state-mem { 434 regulator-on-in-suspend; 435 regulator-suspend-microvolt = <3000000>; 436 }; 437 }; 438 439 vcc3v3_s3: SWITCH_REG1 { 440 regulator-always-on; 441 regulator-boot-on; 442 regulator-name = "vcc3v3_s3"; 443 444 regulator-state-mem { 445 regulator-off-in-suspend; 446 }; 447 }; 448 449 vcc3v3_s0: SWITCH_REG2 { 450 regulator-always-on; 451 regulator-boot-on; 452 regulator-name = "vcc3v3_s0"; 453 454 regulator-state-mem { 455 regulator-off-in-suspend; 456 }; 457 }; 458 }; 459 }; 460}; 461 462&i2c1 { 463 clock-frequency = <200000>; 464 i2c-scl-rising-time-ns = <150>; 465 i2c-scl-falling-time-ns = <30>; 466 status = "okay"; 467}; 468 469&i2c2 { 470 status = "okay"; 471}; 472 473&i2c4 { 474 clock-frequency = <400000>; 475 i2c-scl-rising-time-ns = <160>; 476 i2c-scl-falling-time-ns = <30>; 477 status = "okay"; 478 479 fusb0: typec-portc@22 { 480 compatible = "fcs,fusb302"; 481 reg = <0x22>; 482 interrupt-parent = <&gpio1>; 483 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 484 pinctrl-names = "default"; 485 pinctrl-0 = <&fusb0_int>; 486 vbus-supply = <&vbus_typec>; 487 }; 488}; 489 490&i2c7 { 491 status = "okay"; 492}; 493 494&i2s2 { 495 status = "okay"; 496}; 497 498&io_domains { 499 bt656-supply = <&vcc_1v8>; 500 audio-supply = <&vcca1v8_codec>; 501 sdmmc-supply = <&vcc_sdio>; 502 gpio1830-supply = <&vcc_3v0>; 503 status = "okay"; 504}; 505 506&pcie_phy { 507 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; 508 assigned-clock-rates = <100000000>; 509 assigned-clocks = <&cru SCLK_PCIEPHY_REF>; 510 status = "okay"; 511}; 512 513&pcie0 { 514 num-lanes = <2>; 515 vpcie0v9-supply = <&vcca0v9_s3>; 516 vpcie1v8-supply = <&vcca1v8_s3>; 517 status = "okay"; 518}; 519 520&pinctrl { 521 fusb30x { 522 fusb0_int: fusb0-int { 523 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 524 }; 525 }; 526 527 gpio-leds { 528 status_led_pin: status-led-pin { 529 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 530 }; 531 }; 532 533 gmac { 534 phy_intb: phy-intb { 535 rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; 536 }; 537 538 phy_rstb: phy-rstb { 539 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 540 }; 541 }; 542 543 pmic { 544 cpu_b_sleep: cpu-b-sleep { 545 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 546 }; 547 548 gpu_sleep: gpu-sleep { 549 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 550 }; 551 552 pmic_int_l: pmic-int-l { 553 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 554 }; 555 }; 556 557 rockchip-key { 558 power_key: power-key { 559 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 560 }; 561 }; 562 563 sdio { 564 bt_host_wake_l: bt-host-wake-l { 565 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 566 }; 567 568 bt_reg_on_h: bt-reg-on-h { 569 /* external pullup to VCC1V8_PMUPLL */ 570 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 571 }; 572 573 bt_wake_l: bt-wake-l { 574 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 575 }; 576 577 wifi_reg_on_h: wifi-reg_on-h { 578 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 579 }; 580 }; 581 582 sdmmc { 583 sdmmc0_det_l: sdmmc0-det-l { 584 rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 585 }; 586 587 sdmmc0_pwr_h: sdmmc0-pwr-h { 588 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 589 }; 590 }; 591}; 592 593&pmu_io_domains { 594 pmu1830-supply = <&vcc_3v0>; 595 status = "okay"; 596}; 597 598&pwm0 { 599 status = "okay"; 600}; 601 602&pwm1 { 603 status = "okay"; 604}; 605 606&pwm2 { 607 pinctrl-names = "active"; 608 pinctrl-0 = <&pwm2_pin_pull_down>; 609 status = "okay"; 610}; 611 612&saradc { 613 vref-supply = <&vcca1v8_s3>; 614 status = "okay"; 615}; 616 617&sdhci { 618 bus-width = <8>; 619 mmc-hs200-1_8v; 620 non-removable; 621 status = "okay"; 622}; 623 624&sdio0 { 625 bus-width = <4>; 626 cap-sd-highspeed; 627 cap-sdio-irq; 628 keep-power-in-suspend; 629 mmc-pwrseq = <&sdio_pwrseq>; 630 non-removable; 631 pinctrl-names = "default"; 632 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 633 sd-uhs-sdr104; 634 status = "okay"; 635}; 636 637&sdmmc { 638 bus-width = <4>; 639 cap-sd-highspeed; 640 cap-mmc-highspeed; 641 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 642 disable-wp; 643 pinctrl-names = "default"; 644 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>; 645 sd-uhs-sdr104; 646 vmmc-supply = <&vcc3v0_sd>; 647 vqmmc-supply = <&vcc_sdio>; 648 status = "okay"; 649}; 650 651&tcphy0 { 652 status = "okay"; 653}; 654 655&tcphy1 { 656 status = "okay"; 657}; 658 659&tsadc { 660 /* tshut mode 0:CRU 1:GPIO */ 661 rockchip,hw-tshut-mode = <1>; 662 /* tshut polarity 0:LOW 1:HIGH */ 663 rockchip,hw-tshut-polarity = <1>; 664 status = "okay"; 665}; 666 667&u2phy0 { 668 status = "okay"; 669}; 670 671&u2phy0_host { 672 status = "okay"; 673}; 674 675&u2phy0_otg { 676 status = "okay"; 677}; 678 679&u2phy1 { 680 status = "okay"; 681}; 682 683&u2phy1_host { 684 status = "okay"; 685}; 686 687&u2phy1_otg { 688 status = "okay"; 689}; 690 691&uart0 { 692 pinctrl-names = "default"; 693 pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>; 694 status = "okay"; 695 696 bluetooth { 697 compatible = "brcm,bcm43438-bt"; 698 clocks = <&rk808 1>; 699 clock-names = "lpo"; 700 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 701 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 702 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 703 max-speed = <4000000>; 704 pinctrl-names = "default"; 705 pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>; 706 vbat-supply = <&vcc3v3_sys>; 707 vddio-supply = <&vcc_1v8>; 708 }; 709}; 710 711&uart2 { 712 status = "okay"; 713}; 714 715&usbdrd3_0 { 716 status = "okay"; 717}; 718 719&usbdrd3_1 { 720 status = "okay"; 721}; 722 723&usbdrd_dwc3_0 { 724 status = "okay"; 725}; 726 727&usbdrd_dwc3_1 { 728 dr_mode = "host"; 729 status = "okay"; 730}; 731 732&usb_host0_ehci { 733 status = "okay"; 734}; 735 736&usb_host0_ohci { 737 status = "okay"; 738}; 739 740&usb_host1_ehci { 741 status = "okay"; 742}; 743 744&usb_host1_ohci { 745 status = "okay"; 746}; 747 748&vopb { 749 status = "okay"; 750}; 751 752&vopb_mmu { 753 status = "okay"; 754}; 755 756&vopl { 757 status = "okay"; 758}; 759 760&vopl_mmu { 761 status = "okay"; 762}; 763