1c9ccf3a3SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c9ccf3a3SEmmanuel Vadot/* 3c9ccf3a3SEmmanuel Vadot * Device Tree Source for the RZ/{G2L,V2L} SMARC pincontrol parts 4c9ccf3a3SEmmanuel Vadot * 5c9ccf3a3SEmmanuel Vadot * Copyright (C) 2021 Renesas Electronics Corp. 6c9ccf3a3SEmmanuel Vadot */ 7c9ccf3a3SEmmanuel Vadot 8c9ccf3a3SEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 9c9ccf3a3SEmmanuel Vadot#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 10c9ccf3a3SEmmanuel Vadot 11c9ccf3a3SEmmanuel Vadot&pinctrl { 12c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&sound_clk_pins>; 13c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 14c9ccf3a3SEmmanuel Vadot 15c9ccf3a3SEmmanuel Vadot can0_pins: can0 { 16c9ccf3a3SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */ 17c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */ 18c9ccf3a3SEmmanuel Vadot }; 19c9ccf3a3SEmmanuel Vadot 20c9ccf3a3SEmmanuel Vadot /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */ 21c9ccf3a3SEmmanuel Vadot can0-stb-hog { 22c9ccf3a3SEmmanuel Vadot gpio-hog; 23c9ccf3a3SEmmanuel Vadot gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>; 24c9ccf3a3SEmmanuel Vadot output-low; 25c9ccf3a3SEmmanuel Vadot line-name = "can0_stb"; 26c9ccf3a3SEmmanuel Vadot }; 27c9ccf3a3SEmmanuel Vadot 28c9ccf3a3SEmmanuel Vadot can1_pins: can1 { 29c9ccf3a3SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */ 30c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */ 31c9ccf3a3SEmmanuel Vadot }; 32c9ccf3a3SEmmanuel Vadot 33c9ccf3a3SEmmanuel Vadot /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */ 34c9ccf3a3SEmmanuel Vadot can1-stb-hog { 35c9ccf3a3SEmmanuel Vadot gpio-hog; 36c9ccf3a3SEmmanuel Vadot gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_HIGH>; 37c9ccf3a3SEmmanuel Vadot output-low; 38c9ccf3a3SEmmanuel Vadot line-name = "can1_stb"; 39c9ccf3a3SEmmanuel Vadot }; 40c9ccf3a3SEmmanuel Vadot 41c9ccf3a3SEmmanuel Vadot i2c0_pins: i2c0 { 42c9ccf3a3SEmmanuel Vadot pins = "RIIC0_SDA", "RIIC0_SCL"; 43c9ccf3a3SEmmanuel Vadot input-enable; 44c9ccf3a3SEmmanuel Vadot }; 45c9ccf3a3SEmmanuel Vadot 46c9ccf3a3SEmmanuel Vadot i2c1_pins: i2c1 { 47c9ccf3a3SEmmanuel Vadot pins = "RIIC1_SDA", "RIIC1_SCL"; 48c9ccf3a3SEmmanuel Vadot input-enable; 49c9ccf3a3SEmmanuel Vadot }; 50c9ccf3a3SEmmanuel Vadot 51c9ccf3a3SEmmanuel Vadot i2c3_pins: i2c3 { 52c9ccf3a3SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */ 53c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */ 54c9ccf3a3SEmmanuel Vadot }; 55c9ccf3a3SEmmanuel Vadot 56*aa1a8ff2SEmmanuel Vadot mtu3_pins: mtu3 { 57*aa1a8ff2SEmmanuel Vadot mtu3-ext-clk-input-pin { 58*aa1a8ff2SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /* MTCLKA */ 59*aa1a8ff2SEmmanuel Vadot <RZG2L_PORT_PINMUX(48, 1, 4)>; /* MTCLKB */ 60*aa1a8ff2SEmmanuel Vadot }; 61*aa1a8ff2SEmmanuel Vadot 62*aa1a8ff2SEmmanuel Vadot mtu3-pwm { 63*aa1a8ff2SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(44, 0, 4)>, /* MTIOC3A */ 64*aa1a8ff2SEmmanuel Vadot <RZG2L_PORT_PINMUX(44, 1, 4)>, /* MTIOC3B */ 65*aa1a8ff2SEmmanuel Vadot <RZG2L_PORT_PINMUX(44, 2, 4)>, /* MTIOC3C */ 66*aa1a8ff2SEmmanuel Vadot <RZG2L_PORT_PINMUX(44, 3, 4)>; /* MTIOC3D */ 67*aa1a8ff2SEmmanuel Vadot }; 68*aa1a8ff2SEmmanuel Vadot 69*aa1a8ff2SEmmanuel Vadot#if MTU3_COUNTER_Z_PHASE_SIGNAL 70*aa1a8ff2SEmmanuel Vadot mtu3-zphase-clk { 71*aa1a8ff2SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /* MTIOC1A */ 72*aa1a8ff2SEmmanuel Vadot }; 73*aa1a8ff2SEmmanuel Vadot#endif /* MTU3_COUNTER_Z_PHASE_SIGNAL */ 74*aa1a8ff2SEmmanuel Vadot }; 75*aa1a8ff2SEmmanuel Vadot 76c9ccf3a3SEmmanuel Vadot scif0_pins: scif0 { 77c9ccf3a3SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */ 78c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ 79c9ccf3a3SEmmanuel Vadot }; 80c9ccf3a3SEmmanuel Vadot 81c9ccf3a3SEmmanuel Vadot scif2_pins: scif2 { 82c9ccf3a3SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(48, 0, 1)>, /* TxD */ 83c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(48, 1, 1)>, /* RxD */ 84c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(48, 3, 1)>, /* CTS# */ 85c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(48, 4, 1)>; /* RTS# */ 86c9ccf3a3SEmmanuel Vadot }; 87c9ccf3a3SEmmanuel Vadot 88c9ccf3a3SEmmanuel Vadot sd1-pwr-en-hog { 89c9ccf3a3SEmmanuel Vadot gpio-hog; 90c9ccf3a3SEmmanuel Vadot gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>; 91c9ccf3a3SEmmanuel Vadot output-high; 92c9ccf3a3SEmmanuel Vadot line-name = "sd1_pwr_en"; 93c9ccf3a3SEmmanuel Vadot }; 94c9ccf3a3SEmmanuel Vadot 95c9ccf3a3SEmmanuel Vadot sdhi1_pins: sd1 { 96c9ccf3a3SEmmanuel Vadot sd1_data { 97c9ccf3a3SEmmanuel Vadot pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; 98c9ccf3a3SEmmanuel Vadot power-source = <3300>; 99c9ccf3a3SEmmanuel Vadot }; 100c9ccf3a3SEmmanuel Vadot 101c9ccf3a3SEmmanuel Vadot sd1_ctrl { 102c9ccf3a3SEmmanuel Vadot pins = "SD1_CLK", "SD1_CMD"; 103c9ccf3a3SEmmanuel Vadot power-source = <3300>; 104c9ccf3a3SEmmanuel Vadot }; 105c9ccf3a3SEmmanuel Vadot 106c9ccf3a3SEmmanuel Vadot sd1_mux { 107c9ccf3a3SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */ 108c9ccf3a3SEmmanuel Vadot }; 109c9ccf3a3SEmmanuel Vadot }; 110c9ccf3a3SEmmanuel Vadot 111c9ccf3a3SEmmanuel Vadot sdhi1_pins_uhs: sd1_uhs { 112c9ccf3a3SEmmanuel Vadot sd1_data_uhs { 113c9ccf3a3SEmmanuel Vadot pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; 114c9ccf3a3SEmmanuel Vadot power-source = <1800>; 115c9ccf3a3SEmmanuel Vadot }; 116c9ccf3a3SEmmanuel Vadot 117c9ccf3a3SEmmanuel Vadot sd1_ctrl_uhs { 118c9ccf3a3SEmmanuel Vadot pins = "SD1_CLK", "SD1_CMD"; 119c9ccf3a3SEmmanuel Vadot power-source = <1800>; 120c9ccf3a3SEmmanuel Vadot }; 121c9ccf3a3SEmmanuel Vadot 122c9ccf3a3SEmmanuel Vadot sd1_mux_uhs { 123c9ccf3a3SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */ 124c9ccf3a3SEmmanuel Vadot }; 125c9ccf3a3SEmmanuel Vadot }; 126c9ccf3a3SEmmanuel Vadot 127c9ccf3a3SEmmanuel Vadot sound_clk_pins: sound_clk { 128c9ccf3a3SEmmanuel Vadot pins = "AUDIO_CLK1", "AUDIO_CLK2"; 129c9ccf3a3SEmmanuel Vadot input-enable; 130c9ccf3a3SEmmanuel Vadot }; 131c9ccf3a3SEmmanuel Vadot 132c9ccf3a3SEmmanuel Vadot spi1_pins: spi1 { 133c9ccf3a3SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */ 134c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */ 135c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */ 136c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */ 137c9ccf3a3SEmmanuel Vadot }; 138c9ccf3a3SEmmanuel Vadot 139c9ccf3a3SEmmanuel Vadot ssi0_pins: ssi0 { 140c9ccf3a3SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */ 141c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */ 142c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */ 143c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */ 144c9ccf3a3SEmmanuel Vadot }; 145c9ccf3a3SEmmanuel Vadot 146c9ccf3a3SEmmanuel Vadot usb0_pins: usb0 { 147c9ccf3a3SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */ 148c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */ 149c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */ 150c9ccf3a3SEmmanuel Vadot }; 151c9ccf3a3SEmmanuel Vadot 152c9ccf3a3SEmmanuel Vadot usb1_pins: usb1 { 153c9ccf3a3SEmmanuel Vadot pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */ 154c9ccf3a3SEmmanuel Vadot <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */ 155c9ccf3a3SEmmanuel Vadot }; 156c9ccf3a3SEmmanuel Vadot}; 157c9ccf3a3SEmmanuel Vadot 158