1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4 * 5 * Copyright (C) 2022 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a779g0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779g0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* External Audio clock - to be overridden by boards that provide it */ 18 audio_clkin: audio_clkin { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; 21 clock-frequency = <0>; 22 }; 23 24 /* External CAN clock - to be overridden by boards that provide it */ 25 can_clk: can { 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; 29 }; 30 31 cluster0_opp: opp-table-0 { 32 compatible = "operating-points-v2"; 33 opp-shared; 34 35 opp-500000000 { 36 opp-hz = /bits/ 64 <500000000>; 37 opp-microvolt = <825000>; 38 clock-latency-ns = <500000>; 39 }; 40 opp-1000000000 { 41 opp-hz = /bits/ 64 <1000000000>; 42 opp-microvolt = <825000>; 43 clock-latency-ns = <500000>; 44 }; 45 opp-1500000000 { 46 opp-hz = /bits/ 64 <1500000000>; 47 opp-microvolt = <825000>; 48 clock-latency-ns = <500000>; 49 }; 50 opp-1700000000 { 51 opp-hz = /bits/ 64 <1700000000>; 52 opp-microvolt = <825000>; 53 clock-latency-ns = <500000>; 54 opp-suspend; 55 }; 56 opp-1800000000 { 57 opp-hz = /bits/ 64 <1800000000>; 58 opp-microvolt = <880000>; 59 clock-latency-ns = <500000>; 60 turbo-mode; 61 }; 62 }; 63 64 cpus { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 68 cpu-map { 69 cluster0 { 70 core0 { 71 cpu = <&a76_0>; 72 }; 73 core1 { 74 cpu = <&a76_1>; 75 }; 76 }; 77 78 cluster1 { 79 core0 { 80 cpu = <&a76_2>; 81 }; 82 core1 { 83 cpu = <&a76_3>; 84 }; 85 }; 86 }; 87 88 a76_0: cpu@0 { 89 compatible = "arm,cortex-a76"; 90 reg = <0>; 91 device_type = "cpu"; 92 power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 93 next-level-cache = <&L3_CA76_0>; 94 enable-method = "psci"; 95 cpu-idle-states = <&CPU_SLEEP_0>; 96 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 97 operating-points-v2 = <&cluster0_opp>; 98 }; 99 100 a76_1: cpu@100 { 101 compatible = "arm,cortex-a76"; 102 reg = <0x100>; 103 device_type = "cpu"; 104 power-domains = <&sysc R8A779G0_PD_A1E0D0C1>; 105 next-level-cache = <&L3_CA76_0>; 106 enable-method = "psci"; 107 cpu-idle-states = <&CPU_SLEEP_0>; 108 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 109 operating-points-v2 = <&cluster0_opp>; 110 }; 111 112 a76_2: cpu@10000 { 113 compatible = "arm,cortex-a76"; 114 reg = <0x10000>; 115 device_type = "cpu"; 116 power-domains = <&sysc R8A779G0_PD_A1E0D1C0>; 117 next-level-cache = <&L3_CA76_1>; 118 enable-method = "psci"; 119 cpu-idle-states = <&CPU_SLEEP_0>; 120 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 121 operating-points-v2 = <&cluster0_opp>; 122 }; 123 124 a76_3: cpu@10100 { 125 compatible = "arm,cortex-a76"; 126 reg = <0x10100>; 127 device_type = "cpu"; 128 power-domains = <&sysc R8A779G0_PD_A1E0D1C1>; 129 next-level-cache = <&L3_CA76_1>; 130 enable-method = "psci"; 131 cpu-idle-states = <&CPU_SLEEP_0>; 132 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 133 operating-points-v2 = <&cluster0_opp>; 134 }; 135 136 idle-states { 137 entry-method = "psci"; 138 139 CPU_SLEEP_0: cpu-sleep-0 { 140 compatible = "arm,idle-state"; 141 arm,psci-suspend-param = <0x0010000>; 142 local-timer-stop; 143 entry-latency-us = <400>; 144 exit-latency-us = <500>; 145 min-residency-us = <4000>; 146 }; 147 }; 148 149 L3_CA76_0: cache-controller-0 { 150 compatible = "cache"; 151 power-domains = <&sysc R8A779G0_PD_A2E0D0>; 152 cache-unified; 153 cache-level = <3>; 154 }; 155 156 L3_CA76_1: cache-controller-1 { 157 compatible = "cache"; 158 power-domains = <&sysc R8A779G0_PD_A2E0D1>; 159 cache-unified; 160 cache-level = <3>; 161 }; 162 }; 163 164 psci { 165 compatible = "arm,psci-1.0", "arm,psci-0.2"; 166 method = "smc"; 167 }; 168 169 extal_clk: extal { 170 compatible = "fixed-clock"; 171 #clock-cells = <0>; 172 /* This value must be overridden by the board */ 173 clock-frequency = <0>; 174 }; 175 176 extalr_clk: extalr { 177 compatible = "fixed-clock"; 178 #clock-cells = <0>; 179 /* This value must be overridden by the board */ 180 clock-frequency = <0>; 181 }; 182 183 pmu_a76 { 184 compatible = "arm,cortex-a76-pmu"; 185 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 186 }; 187 188 /* External SCIF clock - to be overridden by boards that provide it */ 189 scif_clk: scif { 190 compatible = "fixed-clock"; 191 #clock-cells = <0>; 192 clock-frequency = <0>; 193 }; 194 195 soc: soc { 196 compatible = "simple-bus"; 197 interrupt-parent = <&gic>; 198 #address-cells = <2>; 199 #size-cells = <2>; 200 ranges; 201 202 rwdt: watchdog@e6020000 { 203 compatible = "renesas,r8a779g0-wdt", 204 "renesas,rcar-gen4-wdt"; 205 reg = <0 0xe6020000 0 0x0c>; 206 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 207 clocks = <&cpg CPG_MOD 907>; 208 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 209 resets = <&cpg 907>; 210 status = "disabled"; 211 }; 212 213 pfc: pinctrl@e6050000 { 214 compatible = "renesas,pfc-r8a779g0"; 215 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 216 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 217 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 218 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 219 <0 0xe6068000 0 0x16c>; 220 }; 221 222 gpio0: gpio@e6050180 { 223 compatible = "renesas,gpio-r8a779g0", 224 "renesas,rcar-gen4-gpio"; 225 reg = <0 0xe6050180 0 0x54>; 226 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 227 clocks = <&cpg CPG_MOD 915>; 228 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 229 resets = <&cpg 915>; 230 gpio-controller; 231 #gpio-cells = <2>; 232 gpio-ranges = <&pfc 0 0 19>; 233 interrupt-controller; 234 #interrupt-cells = <2>; 235 }; 236 237 gpio1: gpio@e6050980 { 238 compatible = "renesas,gpio-r8a779g0", 239 "renesas,rcar-gen4-gpio"; 240 reg = <0 0xe6050980 0 0x54>; 241 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 242 clocks = <&cpg CPG_MOD 915>; 243 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 244 resets = <&cpg 915>; 245 gpio-controller; 246 #gpio-cells = <2>; 247 gpio-ranges = <&pfc 0 32 29>; 248 interrupt-controller; 249 #interrupt-cells = <2>; 250 }; 251 252 gpio2: gpio@e6058180 { 253 compatible = "renesas,gpio-r8a779g0", 254 "renesas,rcar-gen4-gpio"; 255 reg = <0 0xe6058180 0 0x54>; 256 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 257 clocks = <&cpg CPG_MOD 916>; 258 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 259 resets = <&cpg 916>; 260 gpio-controller; 261 #gpio-cells = <2>; 262 gpio-ranges = <&pfc 0 64 20>; 263 interrupt-controller; 264 #interrupt-cells = <2>; 265 }; 266 267 gpio3: gpio@e6058980 { 268 compatible = "renesas,gpio-r8a779g0", 269 "renesas,rcar-gen4-gpio"; 270 reg = <0 0xe6058980 0 0x54>; 271 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 272 clocks = <&cpg CPG_MOD 916>; 273 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 274 resets = <&cpg 916>; 275 gpio-controller; 276 #gpio-cells = <2>; 277 gpio-ranges = <&pfc 0 96 30>; 278 interrupt-controller; 279 #interrupt-cells = <2>; 280 }; 281 282 gpio4: gpio@e6060180 { 283 compatible = "renesas,gpio-r8a779g0", 284 "renesas,rcar-gen4-gpio"; 285 reg = <0 0xe6060180 0 0x54>; 286 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 287 clocks = <&cpg CPG_MOD 917>; 288 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 289 resets = <&cpg 917>; 290 gpio-controller; 291 #gpio-cells = <2>; 292 gpio-ranges = <&pfc 0 128 25>; 293 interrupt-controller; 294 #interrupt-cells = <2>; 295 }; 296 297 gpio5: gpio@e6060980 { 298 compatible = "renesas,gpio-r8a779g0", 299 "renesas,rcar-gen4-gpio"; 300 reg = <0 0xe6060980 0 0x54>; 301 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 302 clocks = <&cpg CPG_MOD 917>; 303 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 304 resets = <&cpg 917>; 305 gpio-controller; 306 #gpio-cells = <2>; 307 gpio-ranges = <&pfc 0 160 21>; 308 interrupt-controller; 309 #interrupt-cells = <2>; 310 }; 311 312 gpio6: gpio@e6061180 { 313 compatible = "renesas,gpio-r8a779g0", 314 "renesas,rcar-gen4-gpio"; 315 reg = <0 0xe6061180 0 0x54>; 316 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 317 clocks = <&cpg CPG_MOD 917>; 318 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 319 resets = <&cpg 917>; 320 gpio-controller; 321 #gpio-cells = <2>; 322 gpio-ranges = <&pfc 0 192 21>; 323 interrupt-controller; 324 #interrupt-cells = <2>; 325 }; 326 327 gpio7: gpio@e6061980 { 328 compatible = "renesas,gpio-r8a779g0", 329 "renesas,rcar-gen4-gpio"; 330 reg = <0 0xe6061980 0 0x54>; 331 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 332 clocks = <&cpg CPG_MOD 917>; 333 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 334 resets = <&cpg 917>; 335 gpio-controller; 336 #gpio-cells = <2>; 337 gpio-ranges = <&pfc 0 224 21>; 338 interrupt-controller; 339 #interrupt-cells = <2>; 340 }; 341 342 gpio8: gpio@e6068180 { 343 compatible = "renesas,gpio-r8a779g0", 344 "renesas,rcar-gen4-gpio"; 345 reg = <0 0xe6068180 0 0x54>; 346 interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 347 clocks = <&cpg CPG_MOD 918>; 348 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 349 resets = <&cpg 918>; 350 gpio-controller; 351 #gpio-cells = <2>; 352 gpio-ranges = <&pfc 0 256 14>; 353 interrupt-controller; 354 #interrupt-cells = <2>; 355 }; 356 357 cmt0: timer@e60f0000 { 358 compatible = "renesas,r8a779g0-cmt0", 359 "renesas,rcar-gen4-cmt0"; 360 reg = <0 0xe60f0000 0 0x1004>; 361 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 363 clocks = <&cpg CPG_MOD 910>; 364 clock-names = "fck"; 365 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 366 resets = <&cpg 910>; 367 status = "disabled"; 368 }; 369 370 cmt1: timer@e6130000 { 371 compatible = "renesas,r8a779g0-cmt1", 372 "renesas,rcar-gen4-cmt1"; 373 reg = <0 0xe6130000 0 0x1004>; 374 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 375 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 376 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 377 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 378 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 379 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 380 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 381 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 382 clocks = <&cpg CPG_MOD 911>; 383 clock-names = "fck"; 384 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 385 resets = <&cpg 911>; 386 status = "disabled"; 387 }; 388 389 cmt2: timer@e6140000 { 390 compatible = "renesas,r8a779g0-cmt1", 391 "renesas,rcar-gen4-cmt1"; 392 reg = <0 0xe6140000 0 0x1004>; 393 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 394 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 395 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 401 clocks = <&cpg CPG_MOD 912>; 402 clock-names = "fck"; 403 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 404 resets = <&cpg 912>; 405 status = "disabled"; 406 }; 407 408 cmt3: timer@e6148000 { 409 compatible = "renesas,r8a779g0-cmt1", 410 "renesas,rcar-gen4-cmt1"; 411 reg = <0 0xe6148000 0 0x1004>; 412 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 413 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 414 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 415 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 416 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 417 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 418 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 419 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 420 clocks = <&cpg CPG_MOD 913>; 421 clock-names = "fck"; 422 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 423 resets = <&cpg 913>; 424 status = "disabled"; 425 }; 426 427 cpg: clock-controller@e6150000 { 428 compatible = "renesas,r8a779g0-cpg-mssr"; 429 reg = <0 0xe6150000 0 0x4000>; 430 clocks = <&extal_clk>, <&extalr_clk>; 431 clock-names = "extal", "extalr"; 432 #clock-cells = <2>; 433 #power-domain-cells = <0>; 434 #reset-cells = <1>; 435 }; 436 437 rst: reset-controller@e6160000 { 438 compatible = "renesas,r8a779g0-rst"; 439 reg = <0 0xe6160000 0 0x4000>; 440 }; 441 442 sysc: system-controller@e6180000 { 443 compatible = "renesas,r8a779g0-sysc"; 444 reg = <0 0xe6180000 0 0x4000>; 445 #power-domain-cells = <1>; 446 }; 447 448 tsc: thermal@e6198000 { 449 compatible = "renesas,r8a779g0-thermal"; 450 reg = <0 0xe6198000 0 0x200>, 451 <0 0xe61a0000 0 0x200>, 452 <0 0xe61a8000 0 0x200>, 453 <0 0xe61b0000 0 0x200>; 454 clocks = <&cpg CPG_MOD 919>; 455 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 456 resets = <&cpg 919>; 457 #thermal-sensor-cells = <1>; 458 }; 459 460 intc_ex: interrupt-controller@e61c0000 { 461 compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 462 #interrupt-cells = <2>; 463 interrupt-controller; 464 reg = <0 0xe61c0000 0 0x200>; 465 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 466 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 467 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 468 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 469 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 470 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 471 clocks = <&cpg CPG_MOD 611>; 472 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 473 resets = <&cpg 611>; 474 }; 475 476 tmu0: timer@e61e0000 { 477 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 478 reg = <0 0xe61e0000 0 0x30>; 479 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 480 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 481 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 482 clocks = <&cpg CPG_MOD 713>; 483 clock-names = "fck"; 484 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 485 resets = <&cpg 713>; 486 status = "disabled"; 487 }; 488 489 tmu1: timer@e6fc0000 { 490 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 491 reg = <0 0xe6fc0000 0 0x30>; 492 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 493 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 494 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>; 495 clocks = <&cpg CPG_MOD 714>; 496 clock-names = "fck"; 497 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 498 resets = <&cpg 714>; 499 status = "disabled"; 500 }; 501 502 tmu2: timer@e6fd0000 { 503 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 504 reg = <0 0xe6fd0000 0 0x30>; 505 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 506 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 507 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; 508 clocks = <&cpg CPG_MOD 715>; 509 clock-names = "fck"; 510 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 511 resets = <&cpg 715>; 512 status = "disabled"; 513 }; 514 515 tmu3: timer@e6fe0000 { 516 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 517 reg = <0 0xe6fe0000 0 0x30>; 518 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 519 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 520 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>; 521 clocks = <&cpg CPG_MOD 716>; 522 clock-names = "fck"; 523 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 524 resets = <&cpg 716>; 525 status = "disabled"; 526 }; 527 528 tmu4: timer@ffc00000 { 529 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 530 reg = <0 0xffc00000 0 0x30>; 531 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 532 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 533 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 534 clocks = <&cpg CPG_MOD 717>; 535 clock-names = "fck"; 536 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 537 resets = <&cpg 717>; 538 status = "disabled"; 539 }; 540 541 i2c0: i2c@e6500000 { 542 compatible = "renesas,i2c-r8a779g0", 543 "renesas,rcar-gen4-i2c"; 544 reg = <0 0xe6500000 0 0x40>; 545 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 546 clocks = <&cpg CPG_MOD 518>; 547 dmas = <&dmac0 0x91>, <&dmac0 0x90>, 548 <&dmac1 0x91>, <&dmac1 0x90>; 549 dma-names = "tx", "rx", "tx", "rx"; 550 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 551 resets = <&cpg 518>; 552 i2c-scl-internal-delay-ns = <110>; 553 #address-cells = <1>; 554 #size-cells = <0>; 555 status = "disabled"; 556 }; 557 558 i2c1: i2c@e6508000 { 559 compatible = "renesas,i2c-r8a779g0", 560 "renesas,rcar-gen4-i2c"; 561 reg = <0 0xe6508000 0 0x40>; 562 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 563 clocks = <&cpg CPG_MOD 519>; 564 dmas = <&dmac0 0x93>, <&dmac0 0x92>, 565 <&dmac1 0x93>, <&dmac1 0x92>; 566 dma-names = "tx", "rx", "tx", "rx"; 567 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 568 resets = <&cpg 519>; 569 i2c-scl-internal-delay-ns = <110>; 570 #address-cells = <1>; 571 #size-cells = <0>; 572 status = "disabled"; 573 }; 574 575 i2c2: i2c@e6510000 { 576 compatible = "renesas,i2c-r8a779g0", 577 "renesas,rcar-gen4-i2c"; 578 reg = <0 0xe6510000 0 0x40>; 579 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 580 clocks = <&cpg CPG_MOD 520>; 581 dmas = <&dmac0 0x95>, <&dmac0 0x94>, 582 <&dmac1 0x95>, <&dmac1 0x94>; 583 dma-names = "tx", "rx", "tx", "rx"; 584 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 585 resets = <&cpg 520>; 586 i2c-scl-internal-delay-ns = <110>; 587 #address-cells = <1>; 588 #size-cells = <0>; 589 status = "disabled"; 590 }; 591 592 i2c3: i2c@e66d0000 { 593 compatible = "renesas,i2c-r8a779g0", 594 "renesas,rcar-gen4-i2c"; 595 reg = <0 0xe66d0000 0 0x40>; 596 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 597 clocks = <&cpg CPG_MOD 521>; 598 dmas = <&dmac0 0x97>, <&dmac0 0x96>, 599 <&dmac1 0x97>, <&dmac1 0x96>; 600 dma-names = "tx", "rx", "tx", "rx"; 601 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 602 resets = <&cpg 521>; 603 i2c-scl-internal-delay-ns = <110>; 604 #address-cells = <1>; 605 #size-cells = <0>; 606 status = "disabled"; 607 }; 608 609 i2c4: i2c@e66d8000 { 610 compatible = "renesas,i2c-r8a779g0", 611 "renesas,rcar-gen4-i2c"; 612 reg = <0 0xe66d8000 0 0x40>; 613 interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 614 clocks = <&cpg CPG_MOD 522>; 615 dma-names = "tx", "rx", "tx", "rx"; 616 dmas = <&dmac0 0x99>, <&dmac0 0x98>, 617 <&dmac1 0x99>, <&dmac1 0x98>; 618 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 619 resets = <&cpg 522>; 620 i2c-scl-internal-delay-ns = <110>; 621 #address-cells = <1>; 622 #size-cells = <0>; 623 status = "disabled"; 624 }; 625 626 i2c5: i2c@e66e0000 { 627 compatible = "renesas,i2c-r8a779g0", 628 "renesas,rcar-gen4-i2c"; 629 reg = <0 0xe66e0000 0 0x40>; 630 interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 631 clocks = <&cpg CPG_MOD 523>; 632 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 633 <&dmac1 0x9b>, <&dmac1 0x9a>; 634 dma-names = "tx", "rx", "tx", "rx"; 635 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 636 resets = <&cpg 523>; 637 i2c-scl-internal-delay-ns = <110>; 638 #address-cells = <1>; 639 #size-cells = <0>; 640 status = "disabled"; 641 }; 642 643 hscif0: serial@e6540000 { 644 compatible = "renesas,hscif-r8a779g0", 645 "renesas,rcar-gen4-hscif", "renesas,hscif"; 646 reg = <0 0xe6540000 0 0x60>; 647 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 648 clocks = <&cpg CPG_MOD 514>, 649 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 650 <&scif_clk>; 651 clock-names = "fck", "brg_int", "scif_clk"; 652 dmas = <&dmac0 0x31>, <&dmac0 0x30>, 653 <&dmac1 0x31>, <&dmac1 0x30>; 654 dma-names = "tx", "rx", "tx", "rx"; 655 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 656 resets = <&cpg 514>; 657 status = "disabled"; 658 }; 659 660 hscif1: serial@e6550000 { 661 compatible = "renesas,hscif-r8a779g0", 662 "renesas,rcar-gen4-hscif", "renesas,hscif"; 663 reg = <0 0xe6550000 0 0x60>; 664 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 665 clocks = <&cpg CPG_MOD 515>, 666 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 667 <&scif_clk>; 668 clock-names = "fck", "brg_int", "scif_clk"; 669 dmas = <&dmac0 0x33>, <&dmac0 0x32>, 670 <&dmac1 0x33>, <&dmac1 0x32>; 671 dma-names = "tx", "rx", "tx", "rx"; 672 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 673 resets = <&cpg 515>; 674 status = "disabled"; 675 }; 676 677 hscif2: serial@e6560000 { 678 compatible = "renesas,hscif-r8a779g0", 679 "renesas,rcar-gen4-hscif", "renesas,hscif"; 680 reg = <0 0xe6560000 0 0x60>; 681 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 682 clocks = <&cpg CPG_MOD 516>, 683 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 684 <&scif_clk>; 685 clock-names = "fck", "brg_int", "scif_clk"; 686 dmas = <&dmac0 0x35>, <&dmac0 0x34>, 687 <&dmac1 0x35>, <&dmac1 0x34>; 688 dma-names = "tx", "rx", "tx", "rx"; 689 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 690 resets = <&cpg 516>; 691 status = "disabled"; 692 }; 693 694 hscif3: serial@e66a0000 { 695 compatible = "renesas,hscif-r8a779g0", 696 "renesas,rcar-gen4-hscif", "renesas,hscif"; 697 reg = <0 0xe66a0000 0 0x60>; 698 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 699 clocks = <&cpg CPG_MOD 517>, 700 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 701 <&scif_clk>; 702 clock-names = "fck", "brg_int", "scif_clk"; 703 dmas = <&dmac0 0x37>, <&dmac0 0x36>, 704 <&dmac1 0x37>, <&dmac1 0x36>; 705 dma-names = "tx", "rx", "tx", "rx"; 706 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 707 resets = <&cpg 517>; 708 status = "disabled"; 709 }; 710 711 canfd: can@e6660000 { 712 compatible = "renesas,r8a779g0-canfd", 713 "renesas,rcar-gen4-canfd"; 714 reg = <0 0xe6660000 0 0x8500>; 715 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 716 <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; 717 interrupt-names = "ch_int", "g_int"; 718 clocks = <&cpg CPG_MOD 328>, 719 <&cpg CPG_CORE R8A779G0_CLK_CANFD>, 720 <&can_clk>; 721 clock-names = "fck", "canfd", "can_clk"; 722 assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>; 723 assigned-clock-rates = <80000000>; 724 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 725 resets = <&cpg 328>; 726 status = "disabled"; 727 728 channel0 { 729 status = "disabled"; 730 }; 731 732 channel1 { 733 status = "disabled"; 734 }; 735 736 channel2 { 737 status = "disabled"; 738 }; 739 740 channel3 { 741 status = "disabled"; 742 }; 743 744 channel4 { 745 status = "disabled"; 746 }; 747 748 channel5 { 749 status = "disabled"; 750 }; 751 752 channel6 { 753 status = "disabled"; 754 }; 755 756 channel7 { 757 status = "disabled"; 758 }; 759 }; 760 761 avb0: ethernet@e6800000 { 762 compatible = "renesas,etheravb-r8a779g0", 763 "renesas,etheravb-rcar-gen4"; 764 reg = <0 0xe6800000 0 0x800>; 765 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 790 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 791 "ch5", "ch6", "ch7", "ch8", "ch9", 792 "ch10", "ch11", "ch12", "ch13", 793 "ch14", "ch15", "ch16", "ch17", 794 "ch18", "ch19", "ch20", "ch21", 795 "ch22", "ch23", "ch24"; 796 clocks = <&cpg CPG_MOD 211>; 797 clock-names = "fck"; 798 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 799 resets = <&cpg 211>; 800 phy-mode = "rgmii"; 801 rx-internal-delay-ps = <0>; 802 tx-internal-delay-ps = <0>; 803 #address-cells = <1>; 804 #size-cells = <0>; 805 status = "disabled"; 806 }; 807 808 avb1: ethernet@e6810000 { 809 compatible = "renesas,etheravb-r8a779g0", 810 "renesas,etheravb-rcar-gen4"; 811 reg = <0 0xe6810000 0 0x800>; 812 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 835 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 836 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 837 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 838 "ch5", "ch6", "ch7", "ch8", "ch9", 839 "ch10", "ch11", "ch12", "ch13", 840 "ch14", "ch15", "ch16", "ch17", 841 "ch18", "ch19", "ch20", "ch21", 842 "ch22", "ch23", "ch24"; 843 clocks = <&cpg CPG_MOD 212>; 844 clock-names = "fck"; 845 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 846 resets = <&cpg 212>; 847 phy-mode = "rgmii"; 848 rx-internal-delay-ps = <0>; 849 tx-internal-delay-ps = <0>; 850 #address-cells = <1>; 851 #size-cells = <0>; 852 status = "disabled"; 853 }; 854 855 avb2: ethernet@e6820000 { 856 compatible = "renesas,etheravb-r8a779g0", 857 "renesas,etheravb-rcar-gen4"; 858 reg = <0 0xe6820000 0 0x1000>; 859 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 884 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 885 "ch5", "ch6", "ch7", "ch8", "ch9", 886 "ch10", "ch11", "ch12", "ch13", 887 "ch14", "ch15", "ch16", "ch17", 888 "ch18", "ch19", "ch20", "ch21", 889 "ch22", "ch23", "ch24"; 890 clocks = <&cpg CPG_MOD 213>; 891 clock-names = "fck"; 892 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 893 resets = <&cpg 213>; 894 phy-mode = "rgmii"; 895 rx-internal-delay-ps = <0>; 896 tx-internal-delay-ps = <0>; 897 #address-cells = <1>; 898 #size-cells = <0>; 899 status = "disabled"; 900 }; 901 902 pwm0: pwm@e6e30000 { 903 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 904 reg = <0 0xe6e30000 0 0x10>; 905 #pwm-cells = <2>; 906 clocks = <&cpg CPG_MOD 628>; 907 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 908 resets = <&cpg 628>; 909 status = "disabled"; 910 }; 911 912 pwm1: pwm@e6e31000 { 913 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 914 reg = <0 0xe6e31000 0 0x10>; 915 #pwm-cells = <2>; 916 clocks = <&cpg CPG_MOD 628>; 917 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 918 resets = <&cpg 628>; 919 status = "disabled"; 920 }; 921 922 pwm2: pwm@e6e32000 { 923 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 924 reg = <0 0xe6e32000 0 0x10>; 925 #pwm-cells = <2>; 926 clocks = <&cpg CPG_MOD 628>; 927 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 928 resets = <&cpg 628>; 929 status = "disabled"; 930 }; 931 932 pwm3: pwm@e6e33000 { 933 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 934 reg = <0 0xe6e33000 0 0x10>; 935 #pwm-cells = <2>; 936 clocks = <&cpg CPG_MOD 628>; 937 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 938 resets = <&cpg 628>; 939 status = "disabled"; 940 }; 941 942 pwm4: pwm@e6e34000 { 943 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 944 reg = <0 0xe6e34000 0 0x10>; 945 #pwm-cells = <2>; 946 clocks = <&cpg CPG_MOD 628>; 947 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 948 resets = <&cpg 628>; 949 status = "disabled"; 950 }; 951 952 pwm5: pwm@e6e35000 { 953 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 954 reg = <0 0xe6e35000 0 0x10>; 955 #pwm-cells = <2>; 956 clocks = <&cpg CPG_MOD 628>; 957 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 958 resets = <&cpg 628>; 959 status = "disabled"; 960 }; 961 962 pwm6: pwm@e6e36000 { 963 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 964 reg = <0 0xe6e36000 0 0x10>; 965 #pwm-cells = <2>; 966 clocks = <&cpg CPG_MOD 628>; 967 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 968 resets = <&cpg 628>; 969 status = "disabled"; 970 }; 971 972 pwm7: pwm@e6e37000 { 973 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 974 reg = <0 0xe6e37000 0 0x10>; 975 #pwm-cells = <2>; 976 clocks = <&cpg CPG_MOD 628>; 977 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 978 resets = <&cpg 628>; 979 status = "disabled"; 980 }; 981 982 pwm8: pwm@e6e38000 { 983 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 984 reg = <0 0xe6e38000 0 0x10>; 985 #pwm-cells = <2>; 986 clocks = <&cpg CPG_MOD 628>; 987 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 988 resets = <&cpg 628>; 989 status = "disabled"; 990 }; 991 992 pwm9: pwm@e6e39000 { 993 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 994 reg = <0 0xe6e39000 0 0x10>; 995 #pwm-cells = <2>; 996 clocks = <&cpg CPG_MOD 628>; 997 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 998 resets = <&cpg 628>; 999 status = "disabled"; 1000 }; 1001 1002 scif0: serial@e6e60000 { 1003 compatible = "renesas,scif-r8a779g0", 1004 "renesas,rcar-gen4-scif", "renesas,scif"; 1005 reg = <0 0xe6e60000 0 64>; 1006 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 1007 clocks = <&cpg CPG_MOD 702>, 1008 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1009 <&scif_clk>; 1010 clock-names = "fck", "brg_int", "scif_clk"; 1011 dmas = <&dmac0 0x51>, <&dmac0 0x50>, 1012 <&dmac1 0x51>, <&dmac1 0x50>; 1013 dma-names = "tx", "rx", "tx", "rx"; 1014 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1015 resets = <&cpg 702>; 1016 status = "disabled"; 1017 }; 1018 1019 scif1: serial@e6e68000 { 1020 compatible = "renesas,scif-r8a779g0", 1021 "renesas,rcar-gen4-scif", "renesas,scif"; 1022 reg = <0 0xe6e68000 0 64>; 1023 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 1024 clocks = <&cpg CPG_MOD 703>, 1025 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1026 <&scif_clk>; 1027 clock-names = "fck", "brg_int", "scif_clk"; 1028 dmas = <&dmac0 0x53>, <&dmac0 0x52>, 1029 <&dmac1 0x53>, <&dmac1 0x52>; 1030 dma-names = "tx", "rx", "tx", "rx"; 1031 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1032 resets = <&cpg 703>; 1033 status = "disabled"; 1034 }; 1035 1036 scif3: serial@e6c50000 { 1037 compatible = "renesas,scif-r8a779g0", 1038 "renesas,rcar-gen4-scif", "renesas,scif"; 1039 reg = <0 0xe6c50000 0 64>; 1040 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 1041 clocks = <&cpg CPG_MOD 704>, 1042 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1043 <&scif_clk>; 1044 clock-names = "fck", "brg_int", "scif_clk"; 1045 dmas = <&dmac0 0x57>, <&dmac0 0x56>, 1046 <&dmac1 0x57>, <&dmac1 0x56>; 1047 dma-names = "tx", "rx", "tx", "rx"; 1048 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1049 resets = <&cpg 704>; 1050 status = "disabled"; 1051 }; 1052 1053 scif4: serial@e6c40000 { 1054 compatible = "renesas,scif-r8a779g0", 1055 "renesas,rcar-gen4-scif", "renesas,scif"; 1056 reg = <0 0xe6c40000 0 64>; 1057 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 1058 clocks = <&cpg CPG_MOD 705>, 1059 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1060 <&scif_clk>; 1061 clock-names = "fck", "brg_int", "scif_clk"; 1062 dmas = <&dmac0 0x59>, <&dmac0 0x58>, 1063 <&dmac1 0x59>, <&dmac1 0x58>; 1064 dma-names = "tx", "rx", "tx", "rx"; 1065 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1066 resets = <&cpg 705>; 1067 status = "disabled"; 1068 }; 1069 1070 tpu: pwm@e6e80000 { 1071 compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 1072 reg = <0 0xe6e80000 0 0x148>; 1073 interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 1074 clocks = <&cpg CPG_MOD 718>; 1075 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1076 resets = <&cpg 718>; 1077 #pwm-cells = <3>; 1078 status = "disabled"; 1079 }; 1080 1081 msiof0: spi@e6e90000 { 1082 compatible = "renesas,msiof-r8a779g0", 1083 "renesas,rcar-gen4-msiof"; 1084 reg = <0 0xe6e90000 0 0x0064>; 1085 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 1086 clocks = <&cpg CPG_MOD 618>; 1087 dmas = <&dmac0 0x41>, <&dmac0 0x40>, 1088 <&dmac1 0x41>, <&dmac1 0x40>; 1089 dma-names = "tx", "rx", "tx", "rx"; 1090 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1091 resets = <&cpg 618>; 1092 #address-cells = <1>; 1093 #size-cells = <0>; 1094 status = "disabled"; 1095 }; 1096 1097 msiof1: spi@e6ea0000 { 1098 compatible = "renesas,msiof-r8a779g0", 1099 "renesas,rcar-gen4-msiof"; 1100 reg = <0 0xe6ea0000 0 0x0064>; 1101 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 1102 clocks = <&cpg CPG_MOD 619>; 1103 dmas = <&dmac0 0x43>, <&dmac0 0x42>, 1104 <&dmac1 0x43>, <&dmac1 0x42>; 1105 dma-names = "tx", "rx", "tx", "rx"; 1106 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1107 resets = <&cpg 619>; 1108 #address-cells = <1>; 1109 #size-cells = <0>; 1110 status = "disabled"; 1111 }; 1112 1113 msiof2: spi@e6c00000 { 1114 compatible = "renesas,msiof-r8a779g0", 1115 "renesas,rcar-gen4-msiof"; 1116 reg = <0 0xe6c00000 0 0x0064>; 1117 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1118 clocks = <&cpg CPG_MOD 620>; 1119 dmas = <&dmac0 0x45>, <&dmac0 0x44>, 1120 <&dmac1 0x45>, <&dmac1 0x44>; 1121 dma-names = "tx", "rx", "tx", "rx"; 1122 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1123 resets = <&cpg 620>; 1124 #address-cells = <1>; 1125 #size-cells = <0>; 1126 status = "disabled"; 1127 }; 1128 1129 msiof3: spi@e6c10000 { 1130 compatible = "renesas,msiof-r8a779g0", 1131 "renesas,rcar-gen4-msiof"; 1132 reg = <0 0xe6c10000 0 0x0064>; 1133 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1134 clocks = <&cpg CPG_MOD 621>; 1135 dmas = <&dmac0 0x47>, <&dmac0 0x46>, 1136 <&dmac1 0x47>, <&dmac1 0x46>; 1137 dma-names = "tx", "rx", "tx", "rx"; 1138 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1139 resets = <&cpg 621>; 1140 #address-cells = <1>; 1141 #size-cells = <0>; 1142 status = "disabled"; 1143 }; 1144 1145 msiof4: spi@e6c20000 { 1146 compatible = "renesas,msiof-r8a779g0", 1147 "renesas,rcar-gen4-msiof"; 1148 reg = <0 0xe6c20000 0 0x0064>; 1149 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1150 clocks = <&cpg CPG_MOD 622>; 1151 dmas = <&dmac0 0x49>, <&dmac0 0x48>, 1152 <&dmac1 0x49>, <&dmac1 0x48>; 1153 dma-names = "tx", "rx", "tx", "rx"; 1154 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1155 resets = <&cpg 622>; 1156 #address-cells = <1>; 1157 #size-cells = <0>; 1158 status = "disabled"; 1159 }; 1160 1161 msiof5: spi@e6c28000 { 1162 compatible = "renesas,msiof-r8a779g0", 1163 "renesas,rcar-gen4-msiof"; 1164 reg = <0 0xe6c28000 0 0x0064>; 1165 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1166 clocks = <&cpg CPG_MOD 623>; 1167 dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 1168 <&dmac1 0x4b>, <&dmac1 0x4a>; 1169 dma-names = "tx", "rx", "tx", "rx"; 1170 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1171 resets = <&cpg 623>; 1172 #address-cells = <1>; 1173 #size-cells = <0>; 1174 status = "disabled"; 1175 }; 1176 1177 vin00: video@e6ef0000 { 1178 compatible = "renesas,vin-r8a779g0"; 1179 reg = <0 0xe6ef0000 0 0x1000>; 1180 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>; 1181 clocks = <&cpg CPG_MOD 730>; 1182 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1183 resets = <&cpg 730>; 1184 renesas,id = <0>; 1185 status = "disabled"; 1186 1187 ports { 1188 #address-cells = <1>; 1189 #size-cells = <0>; 1190 1191 port@2 { 1192 #address-cells = <1>; 1193 #size-cells = <0>; 1194 1195 reg = <2>; 1196 1197 vin00isp0: endpoint@0 { 1198 reg = <0>; 1199 remote-endpoint = <&isp0vin00>; 1200 }; 1201 }; 1202 }; 1203 }; 1204 1205 vin01: video@e6ef1000 { 1206 compatible = "renesas,vin-r8a779g0"; 1207 reg = <0 0xe6ef1000 0 0x1000>; 1208 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>; 1209 clocks = <&cpg CPG_MOD 731>; 1210 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1211 resets = <&cpg 731>; 1212 renesas,id = <1>; 1213 status = "disabled"; 1214 1215 ports { 1216 #address-cells = <1>; 1217 #size-cells = <0>; 1218 1219 port@2 { 1220 #address-cells = <1>; 1221 #size-cells = <0>; 1222 1223 reg = <2>; 1224 1225 vin01isp0: endpoint@0 { 1226 reg = <0>; 1227 remote-endpoint = <&isp0vin01>; 1228 }; 1229 }; 1230 }; 1231 }; 1232 1233 vin02: video@e6ef2000 { 1234 compatible = "renesas,vin-r8a779g0"; 1235 reg = <0 0xe6ef2000 0 0x1000>; 1236 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; 1237 clocks = <&cpg CPG_MOD 800>; 1238 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1239 resets = <&cpg 800>; 1240 renesas,id = <2>; 1241 status = "disabled"; 1242 1243 ports { 1244 #address-cells = <1>; 1245 #size-cells = <0>; 1246 1247 port@2 { 1248 #address-cells = <1>; 1249 #size-cells = <0>; 1250 1251 reg = <2>; 1252 1253 vin02isp0: endpoint@0 { 1254 reg = <0>; 1255 remote-endpoint = <&isp0vin02>; 1256 }; 1257 }; 1258 }; 1259 }; 1260 1261 vin03: video@e6ef3000 { 1262 compatible = "renesas,vin-r8a779g0"; 1263 reg = <0 0xe6ef3000 0 0x1000>; 1264 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>; 1265 clocks = <&cpg CPG_MOD 801>; 1266 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1267 resets = <&cpg 801>; 1268 renesas,id = <3>; 1269 status = "disabled"; 1270 1271 ports { 1272 #address-cells = <1>; 1273 #size-cells = <0>; 1274 1275 port@2 { 1276 #address-cells = <1>; 1277 #size-cells = <0>; 1278 1279 reg = <2>; 1280 1281 vin03isp0: endpoint@0 { 1282 reg = <0>; 1283 remote-endpoint = <&isp0vin03>; 1284 }; 1285 }; 1286 }; 1287 }; 1288 1289 vin04: video@e6ef4000 { 1290 compatible = "renesas,vin-r8a779g0"; 1291 reg = <0 0xe6ef4000 0 0x1000>; 1292 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>; 1293 clocks = <&cpg CPG_MOD 802>; 1294 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1295 resets = <&cpg 802>; 1296 renesas,id = <4>; 1297 status = "disabled"; 1298 1299 ports { 1300 #address-cells = <1>; 1301 #size-cells = <0>; 1302 1303 port@2 { 1304 #address-cells = <1>; 1305 #size-cells = <0>; 1306 1307 reg = <2>; 1308 1309 vin04isp0: endpoint@0 { 1310 reg = <0>; 1311 remote-endpoint = <&isp0vin04>; 1312 }; 1313 }; 1314 }; 1315 }; 1316 1317 vin05: video@e6ef5000 { 1318 compatible = "renesas,vin-r8a779g0"; 1319 reg = <0 0xe6ef5000 0 0x1000>; 1320 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>; 1321 clocks = <&cpg CPG_MOD 803>; 1322 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1323 resets = <&cpg 803>; 1324 renesas,id = <5>; 1325 status = "disabled"; 1326 1327 ports { 1328 #address-cells = <1>; 1329 #size-cells = <0>; 1330 1331 port@2 { 1332 #address-cells = <1>; 1333 #size-cells = <0>; 1334 1335 reg = <2>; 1336 1337 vin05isp0: endpoint@0 { 1338 reg = <0>; 1339 remote-endpoint = <&isp0vin05>; 1340 }; 1341 }; 1342 }; 1343 }; 1344 1345 vin06: video@e6ef6000 { 1346 compatible = "renesas,vin-r8a779g0"; 1347 reg = <0 0xe6ef6000 0 0x1000>; 1348 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>; 1349 clocks = <&cpg CPG_MOD 804>; 1350 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1351 resets = <&cpg 804>; 1352 renesas,id = <6>; 1353 status = "disabled"; 1354 1355 ports { 1356 #address-cells = <1>; 1357 #size-cells = <0>; 1358 1359 port@2 { 1360 #address-cells = <1>; 1361 #size-cells = <0>; 1362 1363 reg = <2>; 1364 1365 vin06isp0: endpoint@0 { 1366 reg = <0>; 1367 remote-endpoint = <&isp0vin06>; 1368 }; 1369 }; 1370 }; 1371 }; 1372 1373 vin07: video@e6ef7000 { 1374 compatible = "renesas,vin-r8a779g0"; 1375 reg = <0 0xe6ef7000 0 0x1000>; 1376 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>; 1377 clocks = <&cpg CPG_MOD 805>; 1378 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1379 resets = <&cpg 805>; 1380 renesas,id = <7>; 1381 status = "disabled"; 1382 1383 ports { 1384 #address-cells = <1>; 1385 #size-cells = <0>; 1386 1387 port@2 { 1388 #address-cells = <1>; 1389 #size-cells = <0>; 1390 1391 reg = <2>; 1392 1393 vin07isp0: endpoint@0 { 1394 reg = <0>; 1395 remote-endpoint = <&isp0vin07>; 1396 }; 1397 }; 1398 }; 1399 }; 1400 1401 vin08: video@e6ef8000 { 1402 compatible = "renesas,vin-r8a779g0"; 1403 reg = <0 0xe6ef8000 0 0x1000>; 1404 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>; 1405 clocks = <&cpg CPG_MOD 806>; 1406 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1407 resets = <&cpg 806>; 1408 renesas,id = <8>; 1409 status = "disabled"; 1410 1411 ports { 1412 #address-cells = <1>; 1413 #size-cells = <0>; 1414 1415 port@2 { 1416 #address-cells = <1>; 1417 #size-cells = <0>; 1418 1419 reg = <2>; 1420 1421 vin08isp1: endpoint@1 { 1422 reg = <1>; 1423 remote-endpoint = <&isp1vin08>; 1424 }; 1425 }; 1426 }; 1427 }; 1428 1429 vin09: video@e6ef9000 { 1430 compatible = "renesas,vin-r8a779g0"; 1431 reg = <0 0xe6ef9000 0 0x1000>; 1432 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>; 1433 clocks = <&cpg CPG_MOD 807>; 1434 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1435 resets = <&cpg 807>; 1436 renesas,id = <9>; 1437 status = "disabled"; 1438 1439 ports { 1440 #address-cells = <1>; 1441 #size-cells = <0>; 1442 1443 port@2 { 1444 #address-cells = <1>; 1445 #size-cells = <0>; 1446 1447 reg = <2>; 1448 1449 vin09isp1: endpoint@1 { 1450 reg = <1>; 1451 remote-endpoint = <&isp1vin09>; 1452 }; 1453 }; 1454 }; 1455 }; 1456 1457 vin10: video@e6efa000 { 1458 compatible = "renesas,vin-r8a779g0"; 1459 reg = <0 0xe6efa000 0 0x1000>; 1460 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>; 1461 clocks = <&cpg CPG_MOD 808>; 1462 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1463 resets = <&cpg 808>; 1464 renesas,id = <10>; 1465 status = "disabled"; 1466 1467 ports { 1468 #address-cells = <1>; 1469 #size-cells = <0>; 1470 1471 port@2 { 1472 #address-cells = <1>; 1473 #size-cells = <0>; 1474 1475 reg = <2>; 1476 1477 vin10isp1: endpoint@1 { 1478 reg = <1>; 1479 remote-endpoint = <&isp1vin10>; 1480 }; 1481 }; 1482 }; 1483 }; 1484 1485 vin11: video@e6efb000 { 1486 compatible = "renesas,vin-r8a779g0"; 1487 reg = <0 0xe6efb000 0 0x1000>; 1488 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>; 1489 clocks = <&cpg CPG_MOD 809>; 1490 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1491 resets = <&cpg 809>; 1492 renesas,id = <11>; 1493 status = "disabled"; 1494 1495 ports { 1496 #address-cells = <1>; 1497 #size-cells = <0>; 1498 1499 port@2 { 1500 #address-cells = <1>; 1501 #size-cells = <0>; 1502 1503 reg = <2>; 1504 1505 vin11isp1: endpoint@1 { 1506 reg = <1>; 1507 remote-endpoint = <&isp1vin11>; 1508 }; 1509 }; 1510 }; 1511 }; 1512 1513 vin12: video@e6efc000 { 1514 compatible = "renesas,vin-r8a779g0"; 1515 reg = <0 0xe6efc000 0 0x1000>; 1516 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>; 1517 clocks = <&cpg CPG_MOD 810>; 1518 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1519 resets = <&cpg 810>; 1520 renesas,id = <12>; 1521 status = "disabled"; 1522 1523 ports { 1524 #address-cells = <1>; 1525 #size-cells = <0>; 1526 1527 port@2 { 1528 #address-cells = <1>; 1529 #size-cells = <0>; 1530 1531 reg = <2>; 1532 1533 vin12isp1: endpoint@1 { 1534 reg = <1>; 1535 remote-endpoint = <&isp1vin12>; 1536 }; 1537 }; 1538 }; 1539 }; 1540 1541 vin13: video@e6efd000 { 1542 compatible = "renesas,vin-r8a779g0"; 1543 reg = <0 0xe6efd000 0 0x1000>; 1544 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>; 1545 clocks = <&cpg CPG_MOD 811>; 1546 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1547 resets = <&cpg 811>; 1548 renesas,id = <13>; 1549 status = "disabled"; 1550 1551 ports { 1552 #address-cells = <1>; 1553 #size-cells = <0>; 1554 1555 port@2 { 1556 #address-cells = <1>; 1557 #size-cells = <0>; 1558 1559 reg = <2>; 1560 1561 vin13isp1: endpoint@1 { 1562 reg = <1>; 1563 remote-endpoint = <&isp1vin13>; 1564 }; 1565 }; 1566 }; 1567 }; 1568 1569 vin14: video@e6efe000 { 1570 compatible = "renesas,vin-r8a779g0"; 1571 reg = <0 0xe6efe000 0 0x1000>; 1572 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>; 1573 clocks = <&cpg CPG_MOD 812>; 1574 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1575 resets = <&cpg 812>; 1576 renesas,id = <14>; 1577 status = "disabled"; 1578 1579 ports { 1580 #address-cells = <1>; 1581 #size-cells = <0>; 1582 1583 port@2 { 1584 #address-cells = <1>; 1585 #size-cells = <0>; 1586 1587 reg = <2>; 1588 1589 vin14isp1: endpoint@1 { 1590 reg = <1>; 1591 remote-endpoint = <&isp1vin14>; 1592 }; 1593 }; 1594 }; 1595 }; 1596 1597 vin15: video@e6eff000 { 1598 compatible = "renesas,vin-r8a779g0"; 1599 reg = <0 0xe6eff000 0 0x1000>; 1600 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; 1601 clocks = <&cpg CPG_MOD 813>; 1602 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1603 resets = <&cpg 813>; 1604 renesas,id = <15>; 1605 status = "disabled"; 1606 1607 ports { 1608 #address-cells = <1>; 1609 #size-cells = <0>; 1610 1611 port@2 { 1612 #address-cells = <1>; 1613 #size-cells = <0>; 1614 1615 reg = <2>; 1616 1617 vin15isp1: endpoint@1 { 1618 reg = <1>; 1619 remote-endpoint = <&isp1vin15>; 1620 }; 1621 }; 1622 }; 1623 }; 1624 1625 dmac0: dma-controller@e7350000 { 1626 compatible = "renesas,dmac-r8a779g0", 1627 "renesas,rcar-gen4-dmac"; 1628 reg = <0 0xe7350000 0 0x1000>, 1629 <0 0xe7300000 0 0x10000>; 1630 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 1631 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 1632 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 1633 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 1634 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 1635 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 1636 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 1637 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 1638 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 1639 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 1640 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 1641 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 1642 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 1643 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 1644 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 1645 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 1646 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 1647 interrupt-names = "error", 1648 "ch0", "ch1", "ch2", "ch3", "ch4", 1649 "ch5", "ch6", "ch7", "ch8", "ch9", 1650 "ch10", "ch11", "ch12", "ch13", 1651 "ch14", "ch15"; 1652 clocks = <&cpg CPG_MOD 709>; 1653 clock-names = "fck"; 1654 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1655 resets = <&cpg 709>; 1656 #dma-cells = <1>; 1657 dma-channels = <16>; 1658 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1659 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1660 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1661 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1662 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1663 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1664 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1665 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1666 }; 1667 1668 dmac1: dma-controller@e7351000 { 1669 compatible = "renesas,dmac-r8a779g0", 1670 "renesas,rcar-gen4-dmac"; 1671 reg = <0 0xe7351000 0 0x1000>, 1672 <0 0xe7310000 0 0x10000>; 1673 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1674 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1675 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1676 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1677 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1678 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1679 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1680 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1681 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 1682 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1683 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 1684 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 1685 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 1686 <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1687 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1688 <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 1689 <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 1690 interrupt-names = "error", 1691 "ch0", "ch1", "ch2", "ch3", "ch4", 1692 "ch5", "ch6", "ch7", "ch8", "ch9", 1693 "ch10", "ch11", "ch12", "ch13", 1694 "ch14", "ch15"; 1695 clocks = <&cpg CPG_MOD 710>; 1696 clock-names = "fck"; 1697 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1698 resets = <&cpg 710>; 1699 #dma-cells = <1>; 1700 dma-channels = <16>; 1701 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>, 1702 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>, 1703 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>, 1704 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>, 1705 <&ipmmu_ds0 24>, <&ipmmu_ds0 25>, 1706 <&ipmmu_ds0 26>, <&ipmmu_ds0 27>, 1707 <&ipmmu_ds0 28>, <&ipmmu_ds0 29>, 1708 <&ipmmu_ds0 30>, <&ipmmu_ds0 31>; 1709 }; 1710 1711 rcar_sound: sound@ec5a0000 { 1712 /* 1713 * #sound-dai-cells is required 1714 * 1715 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1716 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1717 */ 1718 /* 1719 * #clock-cells is required 1720 * 1721 * clkout : #clock-cells = <0>; <&rcar_sound>; 1722 * audio_clkout0/1/2/3 : #clock-cells = <1>; <&rcar_sound N>; 1723 */ 1724 compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4"; 1725 reg = <0 0xec5a0000 0 0x020>, 1726 <0 0xec540000 0 0x1000>, 1727 <0 0xec541000 0 0x050>, 1728 <0 0xec400000 0 0x40000>; 1729 reg-names = "adg", "ssiu", "ssi", "sdmc"; 1730 1731 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; 1732 clock-names = "ssiu.0", "ssi.0", "clkin"; 1733 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1734 resets = <&cpg 2926>, <&cpg 2927>; 1735 reset-names = "ssiu.0", "ssi.0"; 1736 status = "disabled"; 1737 1738 rcar_sound,ssiu { 1739 ssiu00: ssiu-0 { 1740 dmas = <&dmac0 0x6e>, <&dmac0 0x6f>; 1741 dma-names = "tx", "rx"; 1742 }; 1743 ssiu01: ssiu-1 { 1744 dmas = <&dmac0 0x6c>, <&dmac0 0x6d>; 1745 dma-names = "tx", "rx"; 1746 }; 1747 ssiu02: ssiu-2 { 1748 dmas = <&dmac0 0x6a>, <&dmac0 0x6b>; 1749 dma-names = "tx", "rx"; 1750 }; 1751 ssiu03: ssiu-3 { 1752 dmas = <&dmac0 0x68>, <&dmac0 0x69>; 1753 dma-names = "tx", "rx"; 1754 }; 1755 ssiu04: ssiu-4 { 1756 dmas = <&dmac0 0x66>, <&dmac0 0x67>; 1757 dma-names = "tx", "rx"; 1758 }; 1759 ssiu05: ssiu-5 { 1760 dmas = <&dmac0 0x64>, <&dmac0 0x65>; 1761 dma-names = "tx", "rx"; 1762 }; 1763 ssiu06: ssiu-6 { 1764 dmas = <&dmac0 0x62>, <&dmac0 0x63>; 1765 dma-names = "tx", "rx"; 1766 }; 1767 ssiu07: ssiu-7 { 1768 dmas = <&dmac0 0x60>, <&dmac0 0x61>; 1769 dma-names = "tx", "rx"; 1770 }; 1771 }; 1772 1773 rcar_sound,ssi { 1774 ssi0: ssi-0 { 1775 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; 1776 }; 1777 }; 1778 }; 1779 1780 ipmmu_rt0: iommu@ee480000 { 1781 compatible = "renesas,ipmmu-r8a779g0", 1782 "renesas,rcar-gen4-ipmmu-vmsa"; 1783 reg = <0 0xee480000 0 0x20000>; 1784 renesas,ipmmu-main = <&ipmmu_mm>; 1785 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1786 #iommu-cells = <1>; 1787 }; 1788 1789 ipmmu_rt1: iommu@ee4c0000 { 1790 compatible = "renesas,ipmmu-r8a779g0", 1791 "renesas,rcar-gen4-ipmmu-vmsa"; 1792 reg = <0 0xee4c0000 0 0x20000>; 1793 renesas,ipmmu-main = <&ipmmu_mm>; 1794 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1795 #iommu-cells = <1>; 1796 }; 1797 1798 ipmmu_ds0: iommu@eed00000 { 1799 compatible = "renesas,ipmmu-r8a779g0", 1800 "renesas,rcar-gen4-ipmmu-vmsa"; 1801 reg = <0 0xeed00000 0 0x20000>; 1802 renesas,ipmmu-main = <&ipmmu_mm>; 1803 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1804 #iommu-cells = <1>; 1805 }; 1806 1807 ipmmu_hc: iommu@eed40000 { 1808 compatible = "renesas,ipmmu-r8a779g0", 1809 "renesas,rcar-gen4-ipmmu-vmsa"; 1810 reg = <0 0xeed40000 0 0x20000>; 1811 renesas,ipmmu-main = <&ipmmu_mm>; 1812 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1813 #iommu-cells = <1>; 1814 }; 1815 1816 ipmmu_ir: iommu@eed80000 { 1817 compatible = "renesas,ipmmu-r8a779g0", 1818 "renesas,rcar-gen4-ipmmu-vmsa"; 1819 reg = <0 0xeed80000 0 0x20000>; 1820 renesas,ipmmu-main = <&ipmmu_mm>; 1821 power-domains = <&sysc R8A779G0_PD_A3IR>; 1822 #iommu-cells = <1>; 1823 }; 1824 1825 ipmmu_vc: iommu@eedc0000 { 1826 compatible = "renesas,ipmmu-r8a779g0", 1827 "renesas,rcar-gen4-ipmmu-vmsa"; 1828 reg = <0 0xeedc0000 0 0x20000>; 1829 renesas,ipmmu-main = <&ipmmu_mm>; 1830 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1831 #iommu-cells = <1>; 1832 }; 1833 1834 ipmmu_3dg: iommu@eee00000 { 1835 compatible = "renesas,ipmmu-r8a779g0", 1836 "renesas,rcar-gen4-ipmmu-vmsa"; 1837 reg = <0 0xeee00000 0 0x20000>; 1838 renesas,ipmmu-main = <&ipmmu_mm>; 1839 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1840 #iommu-cells = <1>; 1841 }; 1842 1843 ipmmu_vi0: iommu@eee80000 { 1844 compatible = "renesas,ipmmu-r8a779g0", 1845 "renesas,rcar-gen4-ipmmu-vmsa"; 1846 reg = <0 0xeee80000 0 0x20000>; 1847 renesas,ipmmu-main = <&ipmmu_mm>; 1848 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1849 #iommu-cells = <1>; 1850 }; 1851 1852 ipmmu_vi1: iommu@eeec0000 { 1853 compatible = "renesas,ipmmu-r8a779g0", 1854 "renesas,rcar-gen4-ipmmu-vmsa"; 1855 reg = <0 0xeeec0000 0 0x20000>; 1856 renesas,ipmmu-main = <&ipmmu_mm>; 1857 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1858 #iommu-cells = <1>; 1859 }; 1860 1861 ipmmu_vip0: iommu@eef00000 { 1862 compatible = "renesas,ipmmu-r8a779g0", 1863 "renesas,rcar-gen4-ipmmu-vmsa"; 1864 reg = <0 0xeef00000 0 0x20000>; 1865 renesas,ipmmu-main = <&ipmmu_mm>; 1866 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1867 #iommu-cells = <1>; 1868 }; 1869 1870 ipmmu_vip1: iommu@eef40000 { 1871 compatible = "renesas,ipmmu-r8a779g0", 1872 "renesas,rcar-gen4-ipmmu-vmsa"; 1873 reg = <0 0xeef40000 0 0x20000>; 1874 renesas,ipmmu-main = <&ipmmu_mm>; 1875 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1876 #iommu-cells = <1>; 1877 }; 1878 1879 ipmmu_mm: iommu@eefc0000 { 1880 compatible = "renesas,ipmmu-r8a779g0", 1881 "renesas,rcar-gen4-ipmmu-vmsa"; 1882 reg = <0 0xeefc0000 0 0x20000>; 1883 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 1884 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; 1885 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1886 #iommu-cells = <1>; 1887 }; 1888 1889 mmc0: mmc@ee140000 { 1890 compatible = "renesas,sdhi-r8a779g0", 1891 "renesas,rcar-gen4-sdhi"; 1892 reg = <0 0xee140000 0 0x2000>; 1893 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1894 clocks = <&cpg CPG_MOD 706>, 1895 <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 1896 clock-names = "core", "clkh"; 1897 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1898 resets = <&cpg 706>; 1899 max-frequency = <200000000>; 1900 iommus = <&ipmmu_ds0 32>; 1901 status = "disabled"; 1902 }; 1903 1904 rpc: spi@ee200000 { 1905 compatible = "renesas,r8a779g0-rpc-if", 1906 "renesas,rcar-gen4-rpc-if"; 1907 reg = <0 0xee200000 0 0x200>, 1908 <0 0x08000000 0 0x04000000>, 1909 <0 0xee208000 0 0x100>; 1910 reg-names = "regs", "dirmap", "wbuf"; 1911 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 1912 clocks = <&cpg CPG_MOD 629>; 1913 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1914 resets = <&cpg 629>; 1915 #address-cells = <1>; 1916 #size-cells = <0>; 1917 status = "disabled"; 1918 }; 1919 1920 gic: interrupt-controller@f1000000 { 1921 compatible = "arm,gic-v3"; 1922 #interrupt-cells = <3>; 1923 #address-cells = <0>; 1924 interrupt-controller; 1925 reg = <0x0 0xf1000000 0 0x20000>, 1926 <0x0 0xf1060000 0 0x110000>; 1927 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 1928 }; 1929 1930 csi40: csi2@fe500000 { 1931 compatible = "renesas,r8a779g0-csi2"; 1932 reg = <0 0xfe500000 0 0x40000>; 1933 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>; 1934 clocks = <&cpg CPG_MOD 331>; 1935 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1936 resets = <&cpg 331>; 1937 status = "disabled"; 1938 1939 ports { 1940 #address-cells = <1>; 1941 #size-cells = <0>; 1942 1943 port@0 { 1944 reg = <0>; 1945 }; 1946 1947 port@1 { 1948 reg = <1>; 1949 csi40isp0: endpoint { 1950 remote-endpoint = <&isp0csi40>; 1951 }; 1952 }; 1953 }; 1954 }; 1955 1956 csi41: csi2@fe540000 { 1957 compatible = "renesas,r8a779g0-csi2"; 1958 reg = <0 0xfe540000 0 0x40000>; 1959 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>; 1960 clocks = <&cpg CPG_MOD 400>; 1961 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1962 resets = <&cpg 400>; 1963 status = "disabled"; 1964 1965 ports { 1966 #address-cells = <1>; 1967 #size-cells = <0>; 1968 1969 port@0 { 1970 reg = <0>; 1971 }; 1972 1973 port@1 { 1974 reg = <1>; 1975 csi41isp1: endpoint { 1976 remote-endpoint = <&isp1csi41>; 1977 }; 1978 }; 1979 }; 1980 }; 1981 1982 fcpvd0: fcp@fea10000 { 1983 compatible = "renesas,fcpv"; 1984 reg = <0 0xfea10000 0 0x200>; 1985 clocks = <&cpg CPG_MOD 508>; 1986 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1987 resets = <&cpg 508>; 1988 }; 1989 1990 fcpvd1: fcp@fea11000 { 1991 compatible = "renesas,fcpv"; 1992 reg = <0 0xfea11000 0 0x200>; 1993 clocks = <&cpg CPG_MOD 509>; 1994 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1995 resets = <&cpg 509>; 1996 }; 1997 1998 vspd0: vsp@fea20000 { 1999 compatible = "renesas,vsp2"; 2000 reg = <0 0xfea20000 0 0x7000>; 2001 interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>; 2002 clocks = <&cpg CPG_MOD 830>; 2003 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2004 resets = <&cpg 830>; 2005 2006 renesas,fcp = <&fcpvd0>; 2007 }; 2008 2009 vspd1: vsp@fea28000 { 2010 compatible = "renesas,vsp2"; 2011 reg = <0 0xfea28000 0 0x7000>; 2012 interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>; 2013 clocks = <&cpg CPG_MOD 831>; 2014 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2015 resets = <&cpg 831>; 2016 2017 renesas,fcp = <&fcpvd1>; 2018 }; 2019 2020 du: display@feb00000 { 2021 compatible = "renesas,du-r8a779g0"; 2022 reg = <0 0xfeb00000 0 0x40000>; 2023 interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>, 2024 <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>; 2025 clocks = <&cpg CPG_MOD 411>; 2026 clock-names = "du.0"; 2027 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2028 resets = <&cpg 411>; 2029 reset-names = "du.0"; 2030 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2031 2032 status = "disabled"; 2033 2034 ports { 2035 #address-cells = <1>; 2036 #size-cells = <0>; 2037 2038 port@0 { 2039 reg = <0>; 2040 du_out_dsi0: endpoint { 2041 remote-endpoint = <&dsi0_in>; 2042 }; 2043 }; 2044 2045 port@1 { 2046 reg = <1>; 2047 du_out_dsi1: endpoint { 2048 remote-endpoint = <&dsi1_in>; 2049 }; 2050 }; 2051 }; 2052 }; 2053 2054 isp0: isp@fed00000 { 2055 compatible = "renesas,r8a779g0-isp"; 2056 reg = <0 0xfed00000 0 0x10000>; 2057 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>; 2058 clocks = <&cpg CPG_MOD 612>; 2059 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2060 resets = <&cpg 612>; 2061 status = "disabled"; 2062 2063 ports { 2064 #address-cells = <1>; 2065 #size-cells = <0>; 2066 2067 port@0 { 2068 #address-cells = <1>; 2069 #size-cells = <0>; 2070 2071 reg = <0>; 2072 2073 isp0csi40: endpoint@0 { 2074 reg = <0>; 2075 remote-endpoint = <&csi40isp0>; 2076 }; 2077 }; 2078 2079 port@1 { 2080 reg = <1>; 2081 isp0vin00: endpoint { 2082 remote-endpoint = <&vin00isp0>; 2083 }; 2084 }; 2085 2086 port@2 { 2087 reg = <2>; 2088 isp0vin01: endpoint { 2089 remote-endpoint = <&vin01isp0>; 2090 }; 2091 }; 2092 2093 port@3 { 2094 reg = <3>; 2095 isp0vin02: endpoint { 2096 remote-endpoint = <&vin02isp0>; 2097 }; 2098 }; 2099 2100 port@4 { 2101 reg = <4>; 2102 isp0vin03: endpoint { 2103 remote-endpoint = <&vin03isp0>; 2104 }; 2105 }; 2106 2107 port@5 { 2108 reg = <5>; 2109 isp0vin04: endpoint { 2110 remote-endpoint = <&vin04isp0>; 2111 }; 2112 }; 2113 2114 port@6 { 2115 reg = <6>; 2116 isp0vin05: endpoint { 2117 remote-endpoint = <&vin05isp0>; 2118 }; 2119 }; 2120 2121 port@7 { 2122 reg = <7>; 2123 isp0vin06: endpoint { 2124 remote-endpoint = <&vin06isp0>; 2125 }; 2126 }; 2127 2128 port@8 { 2129 reg = <8>; 2130 isp0vin07: endpoint { 2131 remote-endpoint = <&vin07isp0>; 2132 }; 2133 }; 2134 }; 2135 }; 2136 2137 isp1: isp@fed20000 { 2138 compatible = "renesas,r8a779g0-isp"; 2139 reg = <0 0xfed20000 0 0x10000>; 2140 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>; 2141 clocks = <&cpg CPG_MOD 613>; 2142 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2143 resets = <&cpg 613>; 2144 status = "disabled"; 2145 2146 ports { 2147 #address-cells = <1>; 2148 #size-cells = <0>; 2149 2150 port@0 { 2151 #address-cells = <1>; 2152 #size-cells = <0>; 2153 2154 reg = <0>; 2155 2156 isp1csi41: endpoint@1 { 2157 reg = <1>; 2158 remote-endpoint = <&csi41isp1>; 2159 }; 2160 }; 2161 2162 port@1 { 2163 reg = <1>; 2164 isp1vin08: endpoint { 2165 remote-endpoint = <&vin08isp1>; 2166 }; 2167 }; 2168 2169 port@2 { 2170 reg = <2>; 2171 isp1vin09: endpoint { 2172 remote-endpoint = <&vin09isp1>; 2173 }; 2174 }; 2175 2176 port@3 { 2177 reg = <3>; 2178 isp1vin10: endpoint { 2179 remote-endpoint = <&vin10isp1>; 2180 }; 2181 }; 2182 2183 port@4 { 2184 reg = <4>; 2185 isp1vin11: endpoint { 2186 remote-endpoint = <&vin11isp1>; 2187 }; 2188 }; 2189 2190 port@5 { 2191 reg = <5>; 2192 isp1vin12: endpoint { 2193 remote-endpoint = <&vin12isp1>; 2194 }; 2195 }; 2196 2197 port@6 { 2198 reg = <6>; 2199 isp1vin13: endpoint { 2200 remote-endpoint = <&vin13isp1>; 2201 }; 2202 }; 2203 2204 port@7 { 2205 reg = <7>; 2206 isp1vin14: endpoint { 2207 remote-endpoint = <&vin14isp1>; 2208 }; 2209 }; 2210 2211 port@8 { 2212 reg = <8>; 2213 isp1vin15: endpoint { 2214 remote-endpoint = <&vin15isp1>; 2215 }; 2216 }; 2217 }; 2218 }; 2219 2220 dsi0: dsi-encoder@fed80000 { 2221 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2222 reg = <0 0xfed80000 0 0x10000>; 2223 clocks = <&cpg CPG_MOD 415>, 2224 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2225 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2226 clock-names = "fck", "dsi", "pll"; 2227 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2228 resets = <&cpg 415>; 2229 2230 status = "disabled"; 2231 2232 ports { 2233 #address-cells = <1>; 2234 #size-cells = <0>; 2235 2236 port@0 { 2237 reg = <0>; 2238 dsi0_in: endpoint { 2239 remote-endpoint = <&du_out_dsi0>; 2240 }; 2241 }; 2242 2243 port@1 { 2244 reg = <1>; 2245 }; 2246 }; 2247 }; 2248 2249 dsi1: dsi-encoder@fed90000 { 2250 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2251 reg = <0 0xfed90000 0 0x10000>; 2252 clocks = <&cpg CPG_MOD 416>, 2253 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2254 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2255 clock-names = "fck", "dsi", "pll"; 2256 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2257 resets = <&cpg 416>; 2258 2259 status = "disabled"; 2260 2261 ports { 2262 #address-cells = <1>; 2263 #size-cells = <0>; 2264 2265 port@0 { 2266 reg = <0>; 2267 dsi1_in: endpoint { 2268 remote-endpoint = <&du_out_dsi1>; 2269 }; 2270 }; 2271 2272 port@1 { 2273 reg = <1>; 2274 }; 2275 }; 2276 }; 2277 2278 prr: chipid@fff00044 { 2279 compatible = "renesas,prr"; 2280 reg = <0 0xfff00044 0 4>; 2281 }; 2282 }; 2283 2284 thermal-zones { 2285 sensor_thermal_cr52: sensor1-thermal { 2286 polling-delay-passive = <250>; 2287 polling-delay = <1000>; 2288 thermal-sensors = <&tsc 0>; 2289 2290 trips { 2291 sensor1_crit: sensor1-crit { 2292 temperature = <120000>; 2293 hysteresis = <1000>; 2294 type = "critical"; 2295 }; 2296 }; 2297 }; 2298 2299 sensor_thermal_cnn: sensor2-thermal { 2300 polling-delay-passive = <250>; 2301 polling-delay = <1000>; 2302 thermal-sensors = <&tsc 1>; 2303 2304 trips { 2305 sensor2_crit: sensor2-crit { 2306 temperature = <120000>; 2307 hysteresis = <1000>; 2308 type = "critical"; 2309 }; 2310 }; 2311 }; 2312 2313 sensor_thermal_ca76: sensor3-thermal { 2314 polling-delay-passive = <250>; 2315 polling-delay = <1000>; 2316 thermal-sensors = <&tsc 2>; 2317 2318 trips { 2319 sensor3_crit: sensor3-crit { 2320 temperature = <120000>; 2321 hysteresis = <1000>; 2322 type = "critical"; 2323 }; 2324 }; 2325 }; 2326 2327 sensor_thermal_ddr1: sensor4-thermal { 2328 polling-delay-passive = <250>; 2329 polling-delay = <1000>; 2330 thermal-sensors = <&tsc 3>; 2331 2332 trips { 2333 sensor4_crit: sensor4-crit { 2334 temperature = <120000>; 2335 hysteresis = <1000>; 2336 type = "critical"; 2337 }; 2338 }; 2339 }; 2340 }; 2341 2342 timer { 2343 compatible = "arm,armv8-timer"; 2344 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 2345 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 2346 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 2347 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 2348 }; 2349}; 2350