1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a779a0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a779a0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779a0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 }; 26 27 cpus { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 31 a76_0: cpu@0 { 32 compatible = "arm,cortex-a76"; 33 reg = <0>; 34 device_type = "cpu"; 35 power-domains = <&sysc R8A779A0_PD_A1E0D0C0>; 36 next-level-cache = <&L3_CA76_0>; 37 }; 38 39 L3_CA76_0: cache-controller-0 { 40 compatible = "cache"; 41 power-domains = <&sysc R8A779A0_PD_A2E0D0>; 42 cache-unified; 43 cache-level = <3>; 44 }; 45 }; 46 47 extal_clk: extal { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 /* This value must be overridden by the board */ 51 clock-frequency = <0>; 52 }; 53 54 extalr_clk: extalr { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 /* This value must be overridden by the board */ 58 clock-frequency = <0>; 59 }; 60 61 pmu_a76 { 62 compatible = "arm,cortex-a76-pmu"; 63 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 64 }; 65 66 /* External SCIF clock - to be overridden by boards that provide it */ 67 scif_clk: scif { 68 compatible = "fixed-clock"; 69 #clock-cells = <0>; 70 clock-frequency = <0>; 71 }; 72 73 soc: soc { 74 compatible = "simple-bus"; 75 interrupt-parent = <&gic>; 76 #address-cells = <2>; 77 #size-cells = <2>; 78 ranges; 79 80 rwdt: watchdog@e6020000 { 81 compatible = "renesas,r8a779a0-wdt", 82 "renesas,rcar-gen3-wdt"; 83 reg = <0 0xe6020000 0 0x0c>; 84 clocks = <&cpg CPG_MOD 907>; 85 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 86 resets = <&cpg 907>; 87 status = "disabled"; 88 }; 89 90 pfc: pinctrl@e6050000 { 91 compatible = "renesas,pfc-r8a779a0"; 92 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 93 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 94 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 95 <0 0xe6068000 0 0x16c>, <0 0xe6068800 0 0x16c>, 96 <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>; 97 }; 98 99 gpio0: gpio@e6058180 { 100 compatible = "renesas,gpio-r8a779a0"; 101 reg = <0 0xe6058180 0 0x54>; 102 interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>; 103 clocks = <&cpg CPG_MOD 916>; 104 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 105 resets = <&cpg 916>; 106 gpio-controller; 107 #gpio-cells = <2>; 108 gpio-ranges = <&pfc 0 0 28>; 109 interrupt-controller; 110 #interrupt-cells = <2>; 111 }; 112 113 gpio1: gpio@e6050180 { 114 compatible = "renesas,gpio-r8a779a0"; 115 reg = <0 0xe6050180 0 0x54>; 116 interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>; 117 clocks = <&cpg CPG_MOD 915>; 118 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 119 resets = <&cpg 915>; 120 gpio-controller; 121 #gpio-cells = <2>; 122 gpio-ranges = <&pfc 0 32 31>; 123 interrupt-controller; 124 #interrupt-cells = <2>; 125 }; 126 127 gpio2: gpio@e6050980 { 128 compatible = "renesas,gpio-r8a779a0"; 129 reg = <0 0xe6050980 0 0x54>; 130 interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; 131 clocks = <&cpg CPG_MOD 915>; 132 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 133 resets = <&cpg 915>; 134 gpio-controller; 135 #gpio-cells = <2>; 136 gpio-ranges = <&pfc 0 64 25>; 137 interrupt-controller; 138 #interrupt-cells = <2>; 139 }; 140 141 gpio3: gpio@e6058980 { 142 compatible = "renesas,gpio-r8a779a0"; 143 reg = <0 0xe6058980 0 0x54>; 144 interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>; 145 clocks = <&cpg CPG_MOD 916>; 146 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 147 resets = <&cpg 916>; 148 gpio-controller; 149 #gpio-cells = <2>; 150 gpio-ranges = <&pfc 0 96 17>; 151 interrupt-controller; 152 #interrupt-cells = <2>; 153 }; 154 155 gpio4: gpio@e6060180 { 156 compatible = "renesas,gpio-r8a779a0"; 157 reg = <0 0xe6060180 0 0x54>; 158 interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>; 159 clocks = <&cpg CPG_MOD 917>; 160 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 161 resets = <&cpg 917>; 162 gpio-controller; 163 #gpio-cells = <2>; 164 gpio-ranges = <&pfc 0 128 27>; 165 interrupt-controller; 166 #interrupt-cells = <2>; 167 }; 168 169 gpio5: gpio@e6060980 { 170 compatible = "renesas,gpio-r8a779a0"; 171 reg = <0 0xe6060980 0 0x54>; 172 interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>; 173 clocks = <&cpg CPG_MOD 917>; 174 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 175 resets = <&cpg 917>; 176 gpio-controller; 177 #gpio-cells = <2>; 178 gpio-ranges = <&pfc 0 160 21>; 179 interrupt-controller; 180 #interrupt-cells = <2>; 181 }; 182 183 gpio6: gpio@e6068180 { 184 compatible = "renesas,gpio-r8a779a0"; 185 reg = <0 0xe6068180 0 0x54>; 186 interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>; 187 clocks = <&cpg CPG_MOD 918>; 188 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 189 resets = <&cpg 918>; 190 gpio-controller; 191 #gpio-cells = <2>; 192 gpio-ranges = <&pfc 0 192 21>; 193 interrupt-controller; 194 #interrupt-cells = <2>; 195 }; 196 197 gpio7: gpio@e6068980 { 198 compatible = "renesas,gpio-r8a779a0"; 199 reg = <0 0xe6068980 0 0x54>; 200 interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; 201 clocks = <&cpg CPG_MOD 918>; 202 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 203 resets = <&cpg 918>; 204 gpio-controller; 205 #gpio-cells = <2>; 206 gpio-ranges = <&pfc 0 224 21>; 207 interrupt-controller; 208 #interrupt-cells = <2>; 209 }; 210 211 gpio8: gpio@e6069180 { 212 compatible = "renesas,gpio-r8a779a0"; 213 reg = <0 0xe6069180 0 0x54>; 214 interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>; 215 clocks = <&cpg CPG_MOD 918>; 216 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 217 resets = <&cpg 918>; 218 gpio-controller; 219 #gpio-cells = <2>; 220 gpio-ranges = <&pfc 0 256 21>; 221 interrupt-controller; 222 #interrupt-cells = <2>; 223 }; 224 225 gpio9: gpio@e6069980 { 226 compatible = "renesas,gpio-r8a779a0"; 227 reg = <0 0xe6069980 0 0x54>; 228 interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>; 229 clocks = <&cpg CPG_MOD 918>; 230 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 231 resets = <&cpg 918>; 232 gpio-controller; 233 #gpio-cells = <2>; 234 gpio-ranges = <&pfc 0 288 21>; 235 interrupt-controller; 236 #interrupt-cells = <2>; 237 }; 238 239 cmt0: timer@e60f0000 { 240 compatible = "renesas,r8a779a0-cmt0", 241 "renesas,rcar-gen3-cmt0"; 242 reg = <0 0xe60f0000 0 0x1004>; 243 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>, 244 <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>; 245 clocks = <&cpg CPG_MOD 910>; 246 clock-names = "fck"; 247 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 248 resets = <&cpg 910>; 249 status = "disabled"; 250 }; 251 252 cmt1: timer@e6130000 { 253 compatible = "renesas,r8a779a0-cmt1", 254 "renesas,rcar-gen3-cmt1"; 255 reg = <0 0xe6130000 0 0x1004>; 256 interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, 257 <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 258 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 259 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 260 <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, 261 <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, 262 <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>, 263 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 264 clocks = <&cpg CPG_MOD 911>; 265 clock-names = "fck"; 266 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 267 resets = <&cpg 911>; 268 status = "disabled"; 269 }; 270 271 cmt2: timer@e6140000 { 272 compatible = "renesas,r8a779a0-cmt1", 273 "renesas,rcar-gen3-cmt1"; 274 reg = <0 0xe6140000 0 0x1004>; 275 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 276 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 277 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 278 <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, 279 <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, 280 <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, 281 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, 282 <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>; 283 clocks = <&cpg CPG_MOD 912>; 284 clock-names = "fck"; 285 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 286 resets = <&cpg 912>; 287 status = "disabled"; 288 }; 289 290 cmt3: timer@e6148000 { 291 compatible = "renesas,r8a779a0-cmt1", 292 "renesas,rcar-gen3-cmt1"; 293 reg = <0 0xe6148000 0 0x1004>; 294 interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, 295 <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, 296 <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, 297 <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, 298 <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, 300 <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 301 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>; 302 clocks = <&cpg CPG_MOD 913>; 303 clock-names = "fck"; 304 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 305 resets = <&cpg 913>; 306 status = "disabled"; 307 }; 308 309 cpg: clock-controller@e6150000 { 310 compatible = "renesas,r8a779a0-cpg-mssr"; 311 reg = <0 0xe6150000 0 0x4000>; 312 clocks = <&extal_clk>, <&extalr_clk>; 313 clock-names = "extal", "extalr"; 314 #clock-cells = <2>; 315 #power-domain-cells = <0>; 316 #reset-cells = <1>; 317 }; 318 319 rst: reset-controller@e6160000 { 320 compatible = "renesas,r8a779a0-rst"; 321 reg = <0 0xe6160000 0 0x4000>; 322 }; 323 324 sysc: system-controller@e6180000 { 325 compatible = "renesas,r8a779a0-sysc"; 326 reg = <0 0xe6180000 0 0x4000>; 327 #power-domain-cells = <1>; 328 }; 329 330 tsc: thermal@e6190000 { 331 compatible = "renesas,r8a779a0-thermal"; 332 reg = <0 0xe6190000 0 0x200>, 333 <0 0xe6198000 0 0x200>, 334 <0 0xe61a0000 0 0x200>, 335 <0 0xe61a8000 0 0x200>, 336 <0 0xe61b0000 0 0x200>; 337 clocks = <&cpg CPG_MOD 919>; 338 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 339 resets = <&cpg 919>; 340 #thermal-sensor-cells = <1>; 341 }; 342 343 intc_ex: interrupt-controller@e61c0000 { 344 compatible = "renesas,intc-ex-r8a779a0", "renesas,irqc"; 345 #interrupt-cells = <2>; 346 interrupt-controller; 347 reg = <0 0xe61c0000 0 0x200>; 348 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 352 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 354 clocks = <&cpg CPG_CORE R8A779A0_CLK_CP>; 355 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 356 }; 357 358 tmu0: timer@e61e0000 { 359 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 360 reg = <0 0xe61e0000 0 0x30>; 361 interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>; 364 clocks = <&cpg CPG_MOD 713>; 365 clock-names = "fck"; 366 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 367 resets = <&cpg 713>; 368 status = "disabled"; 369 }; 370 371 tmu1: timer@e6fc0000 { 372 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 373 reg = <0 0xe6fc0000 0 0x30>; 374 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>, 375 <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>, 376 <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; 377 clocks = <&cpg CPG_MOD 714>; 378 clock-names = "fck"; 379 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 380 resets = <&cpg 714>; 381 status = "disabled"; 382 }; 383 384 tmu2: timer@e6fd0000 { 385 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 386 reg = <0 0xe6fd0000 0 0x30>; 387 interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>, 388 <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>, 389 <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>; 390 clocks = <&cpg CPG_MOD 715>; 391 clock-names = "fck"; 392 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 393 resets = <&cpg 715>; 394 status = "disabled"; 395 }; 396 397 tmu3: timer@e6fe0000 { 398 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 399 reg = <0 0xe6fe0000 0 0x30>; 400 interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; 403 clocks = <&cpg CPG_MOD 716>; 404 clock-names = "fck"; 405 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 406 resets = <&cpg 716>; 407 status = "disabled"; 408 }; 409 410 tmu4: timer@ffc00000 { 411 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 412 reg = <0 0xffc00000 0 0x30>; 413 interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 414 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, 415 <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>; 416 clocks = <&cpg CPG_MOD 717>; 417 clock-names = "fck"; 418 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 419 resets = <&cpg 717>; 420 status = "disabled"; 421 }; 422 423 i2c0: i2c@e6500000 { 424 compatible = "renesas,i2c-r8a779a0", 425 "renesas,rcar-gen3-i2c"; 426 reg = <0 0xe6500000 0 0x40>; 427 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 428 clocks = <&cpg CPG_MOD 518>; 429 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 430 resets = <&cpg 518>; 431 dmas = <&dmac1 0x91>, <&dmac1 0x90>; 432 dma-names = "tx", "rx"; 433 i2c-scl-internal-delay-ns = <110>; 434 #address-cells = <1>; 435 #size-cells = <0>; 436 status = "disabled"; 437 }; 438 439 i2c1: i2c@e6508000 { 440 compatible = "renesas,i2c-r8a779a0", 441 "renesas,rcar-gen3-i2c"; 442 reg = <0 0xe6508000 0 0x40>; 443 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 444 clocks = <&cpg CPG_MOD 519>; 445 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 446 resets = <&cpg 519>; 447 dmas = <&dmac1 0x93>, <&dmac1 0x92>; 448 dma-names = "tx", "rx"; 449 i2c-scl-internal-delay-ns = <110>; 450 #address-cells = <1>; 451 #size-cells = <0>; 452 status = "disabled"; 453 }; 454 455 i2c2: i2c@e6510000 { 456 compatible = "renesas,i2c-r8a779a0", 457 "renesas,rcar-gen3-i2c"; 458 reg = <0 0xe6510000 0 0x40>; 459 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 460 clocks = <&cpg CPG_MOD 520>; 461 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 462 resets = <&cpg 520>; 463 dmas = <&dmac1 0x95>, <&dmac1 0x94>; 464 dma-names = "tx", "rx"; 465 i2c-scl-internal-delay-ns = <110>; 466 #address-cells = <1>; 467 #size-cells = <0>; 468 status = "disabled"; 469 }; 470 471 i2c3: i2c@e66d0000 { 472 compatible = "renesas,i2c-r8a779a0", 473 "renesas,rcar-gen3-i2c"; 474 reg = <0 0xe66d0000 0 0x40>; 475 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 476 clocks = <&cpg CPG_MOD 521>; 477 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 478 resets = <&cpg 521>; 479 dmas = <&dmac1 0x97>, <&dmac1 0x96>; 480 dma-names = "tx", "rx"; 481 i2c-scl-internal-delay-ns = <110>; 482 #address-cells = <1>; 483 #size-cells = <0>; 484 status = "disabled"; 485 }; 486 487 i2c4: i2c@e66d8000 { 488 compatible = "renesas,i2c-r8a779a0", 489 "renesas,rcar-gen3-i2c"; 490 reg = <0 0xe66d8000 0 0x40>; 491 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 492 clocks = <&cpg CPG_MOD 522>; 493 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 494 resets = <&cpg 522>; 495 dmas = <&dmac1 0x99>, <&dmac1 0x98>; 496 dma-names = "tx", "rx"; 497 i2c-scl-internal-delay-ns = <110>; 498 #address-cells = <1>; 499 #size-cells = <0>; 500 status = "disabled"; 501 }; 502 503 i2c5: i2c@e66e0000 { 504 compatible = "renesas,i2c-r8a779a0", 505 "renesas,rcar-gen3-i2c"; 506 reg = <0 0xe66e0000 0 0x40>; 507 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 508 clocks = <&cpg CPG_MOD 523>; 509 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 510 resets = <&cpg 523>; 511 dmas = <&dmac1 0x9b>, <&dmac1 0x9a>; 512 dma-names = "tx", "rx"; 513 i2c-scl-internal-delay-ns = <110>; 514 #address-cells = <1>; 515 #size-cells = <0>; 516 status = "disabled"; 517 }; 518 519 i2c6: i2c@e66e8000 { 520 compatible = "renesas,i2c-r8a779a0", 521 "renesas,rcar-gen3-i2c"; 522 reg = <0 0xe66e8000 0 0x40>; 523 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 524 clocks = <&cpg CPG_MOD 524>; 525 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 526 resets = <&cpg 524>; 527 dmas = <&dmac1 0x9d>, <&dmac1 0x9c>; 528 dma-names = "tx", "rx"; 529 i2c-scl-internal-delay-ns = <110>; 530 #address-cells = <1>; 531 #size-cells = <0>; 532 status = "disabled"; 533 }; 534 535 hscif0: serial@e6540000 { 536 compatible = "renesas,hscif-r8a779a0", 537 "renesas,rcar-gen3-hscif", "renesas,hscif"; 538 reg = <0 0xe6540000 0 0x60>; 539 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 540 clocks = <&cpg CPG_MOD 514>, 541 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 542 <&scif_clk>; 543 clock-names = "fck", "brg_int", "scif_clk"; 544 dmas = <&dmac1 0x31>, <&dmac1 0x30>; 545 dma-names = "tx", "rx"; 546 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 547 resets = <&cpg 514>; 548 status = "disabled"; 549 }; 550 551 hscif1: serial@e6550000 { 552 compatible = "renesas,hscif-r8a779a0", 553 "renesas,rcar-gen3-hscif", "renesas,hscif"; 554 reg = <0 0xe6550000 0 0x60>; 555 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 556 clocks = <&cpg CPG_MOD 515>, 557 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 558 <&scif_clk>; 559 clock-names = "fck", "brg_int", "scif_clk"; 560 dmas = <&dmac1 0x33>, <&dmac1 0x32>; 561 dma-names = "tx", "rx"; 562 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 563 resets = <&cpg 515>; 564 status = "disabled"; 565 }; 566 567 hscif2: serial@e6560000 { 568 compatible = "renesas,hscif-r8a779a0", 569 "renesas,rcar-gen3-hscif", "renesas,hscif"; 570 reg = <0 0xe6560000 0 0x60>; 571 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 572 clocks = <&cpg CPG_MOD 516>, 573 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 574 <&scif_clk>; 575 clock-names = "fck", "brg_int", "scif_clk"; 576 dmas = <&dmac1 0x35>, <&dmac1 0x34>; 577 dma-names = "tx", "rx"; 578 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 579 resets = <&cpg 516>; 580 status = "disabled"; 581 }; 582 583 hscif3: serial@e66a0000 { 584 compatible = "renesas,hscif-r8a779a0", 585 "renesas,rcar-gen3-hscif", "renesas,hscif"; 586 reg = <0 0xe66a0000 0 0x60>; 587 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 588 clocks = <&cpg CPG_MOD 517>, 589 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 590 <&scif_clk>; 591 clock-names = "fck", "brg_int", "scif_clk"; 592 dmas = <&dmac1 0x37>, <&dmac1 0x36>; 593 dma-names = "tx", "rx"; 594 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 595 resets = <&cpg 517>; 596 status = "disabled"; 597 }; 598 599 avb0: ethernet@e6800000 { 600 compatible = "renesas,etheravb-r8a779a0", 601 "renesas,etheravb-rcar-gen3"; 602 reg = <0 0xe6800000 0 0x800>; 603 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 604 <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, 605 <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, 606 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, 607 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 608 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, 609 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 610 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 611 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 612 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 613 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 614 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 615 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 616 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, 617 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 618 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 619 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 620 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 621 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 622 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 623 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 624 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, 625 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 626 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 627 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>; 628 interrupt-names = "ch0", "ch1", "ch2", "ch3", 629 "ch4", "ch5", "ch6", "ch7", 630 "ch8", "ch9", "ch10", "ch11", 631 "ch12", "ch13", "ch14", "ch15", 632 "ch16", "ch17", "ch18", "ch19", 633 "ch20", "ch21", "ch22", "ch23", 634 "ch24"; 635 clocks = <&cpg CPG_MOD 211>; 636 clock-names = "fck"; 637 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 638 resets = <&cpg 211>; 639 phy-mode = "rgmii"; 640 rx-internal-delay-ps = <0>; 641 tx-internal-delay-ps = <0>; 642 #address-cells = <1>; 643 #size-cells = <0>; 644 status = "disabled"; 645 }; 646 647 avb1: ethernet@e6810000 { 648 compatible = "renesas,etheravb-r8a779a0", 649 "renesas,etheravb-rcar-gen3"; 650 reg = <0 0xe6810000 0 0x800>; 651 interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 652 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 653 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 654 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 655 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>, 656 <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>, 657 <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>, 658 <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>, 659 <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 660 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 661 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>, 662 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 663 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 664 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 665 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, 666 <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 667 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 668 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 669 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>, 670 <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 671 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 672 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 673 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 674 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 676 interrupt-names = "ch0", "ch1", "ch2", "ch3", 677 "ch4", "ch5", "ch6", "ch7", 678 "ch8", "ch9", "ch10", "ch11", 679 "ch12", "ch13", "ch14", "ch15", 680 "ch16", "ch17", "ch18", "ch19", 681 "ch20", "ch21", "ch22", "ch23", 682 "ch24"; 683 clocks = <&cpg CPG_MOD 212>; 684 clock-names = "fck"; 685 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 686 resets = <&cpg 212>; 687 phy-mode = "rgmii"; 688 rx-internal-delay-ps = <0>; 689 tx-internal-delay-ps = <0>; 690 #address-cells = <1>; 691 #size-cells = <0>; 692 status = "disabled"; 693 }; 694 695 avb2: ethernet@e6820000 { 696 compatible = "renesas,etheravb-r8a779a0", 697 "renesas,etheravb-rcar-gen3"; 698 reg = <0 0xe6820000 0 0x1000>; 699 interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 700 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, 701 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 702 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 703 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 704 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 705 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 706 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 707 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 708 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 709 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 710 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 711 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 712 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 713 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 714 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 715 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 716 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 717 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 718 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 719 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 720 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 721 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 722 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 723 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 724 interrupt-names = "ch0", "ch1", "ch2", "ch3", 725 "ch4", "ch5", "ch6", "ch7", 726 "ch8", "ch9", "ch10", "ch11", 727 "ch12", "ch13", "ch14", "ch15", 728 "ch16", "ch17", "ch18", "ch19", 729 "ch20", "ch21", "ch22", "ch23", 730 "ch24"; 731 clocks = <&cpg CPG_MOD 213>; 732 clock-names = "fck"; 733 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 734 resets = <&cpg 213>; 735 phy-mode = "rgmii"; 736 rx-internal-delay-ps = <0>; 737 tx-internal-delay-ps = <0>; 738 #address-cells = <1>; 739 #size-cells = <0>; 740 status = "disabled"; 741 }; 742 743 avb3: ethernet@e6830000 { 744 compatible = "renesas,etheravb-r8a779a0", 745 "renesas,etheravb-rcar-gen3"; 746 reg = <0 0xe6830000 0 0x1000>; 747 interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 748 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 749 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 750 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 751 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 752 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 753 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 754 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 755 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 756 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 757 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 758 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 759 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 760 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 761 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 762 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 763 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 772 interrupt-names = "ch0", "ch1", "ch2", "ch3", 773 "ch4", "ch5", "ch6", "ch7", 774 "ch8", "ch9", "ch10", "ch11", 775 "ch12", "ch13", "ch14", "ch15", 776 "ch16", "ch17", "ch18", "ch19", 777 "ch20", "ch21", "ch22", "ch23", 778 "ch24"; 779 clocks = <&cpg CPG_MOD 214>; 780 clock-names = "fck"; 781 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 782 resets = <&cpg 214>; 783 phy-mode = "rgmii"; 784 rx-internal-delay-ps = <0>; 785 tx-internal-delay-ps = <0>; 786 #address-cells = <1>; 787 #size-cells = <0>; 788 status = "disabled"; 789 }; 790 791 avb4: ethernet@e6840000 { 792 compatible = "renesas,etheravb-r8a779a0", 793 "renesas,etheravb-rcar-gen3"; 794 reg = <0 0xe6840000 0 0x1000>; 795 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 796 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 797 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 798 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, 799 <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 800 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 801 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 802 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 803 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 804 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 805 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 806 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 807 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 808 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 809 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>; 820 interrupt-names = "ch0", "ch1", "ch2", "ch3", 821 "ch4", "ch5", "ch6", "ch7", 822 "ch8", "ch9", "ch10", "ch11", 823 "ch12", "ch13", "ch14", "ch15", 824 "ch16", "ch17", "ch18", "ch19", 825 "ch20", "ch21", "ch22", "ch23", 826 "ch24"; 827 clocks = <&cpg CPG_MOD 215>; 828 clock-names = "fck"; 829 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 830 resets = <&cpg 215>; 831 phy-mode = "rgmii"; 832 rx-internal-delay-ps = <0>; 833 tx-internal-delay-ps = <0>; 834 #address-cells = <1>; 835 #size-cells = <0>; 836 status = "disabled"; 837 }; 838 839 avb5: ethernet@e6850000 { 840 compatible = "renesas,etheravb-r8a779a0", 841 "renesas,etheravb-rcar-gen3"; 842 reg = <0 0xe6850000 0 0x1000>; 843 interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 844 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 845 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 846 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 847 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 848 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 849 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 850 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 851 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 852 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 853 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 854 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 855 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 856 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 868 interrupt-names = "ch0", "ch1", "ch2", "ch3", 869 "ch4", "ch5", "ch6", "ch7", 870 "ch8", "ch9", "ch10", "ch11", 871 "ch12", "ch13", "ch14", "ch15", 872 "ch16", "ch17", "ch18", "ch19", 873 "ch20", "ch21", "ch22", "ch23", 874 "ch24"; 875 clocks = <&cpg CPG_MOD 216>; 876 clock-names = "fck"; 877 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 878 resets = <&cpg 216>; 879 phy-mode = "rgmii"; 880 rx-internal-delay-ps = <0>; 881 tx-internal-delay-ps = <0>; 882 #address-cells = <1>; 883 #size-cells = <0>; 884 status = "disabled"; 885 }; 886 887 scif0: serial@e6e60000 { 888 compatible = "renesas,scif-r8a779a0", 889 "renesas,rcar-gen3-scif", "renesas,scif"; 890 reg = <0 0xe6e60000 0 64>; 891 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 892 clocks = <&cpg CPG_MOD 702>, 893 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 894 <&scif_clk>; 895 clock-names = "fck", "brg_int", "scif_clk"; 896 dmas = <&dmac1 0x51>, <&dmac1 0x50>; 897 dma-names = "tx", "rx"; 898 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 899 resets = <&cpg 702>; 900 status = "disabled"; 901 }; 902 903 scif1: serial@e6e68000 { 904 compatible = "renesas,scif-r8a779a0", 905 "renesas,rcar-gen3-scif", "renesas,scif"; 906 reg = <0 0xe6e68000 0 64>; 907 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 908 clocks = <&cpg CPG_MOD 703>, 909 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 910 <&scif_clk>; 911 clock-names = "fck", "brg_int", "scif_clk"; 912 dmas = <&dmac1 0x53>, <&dmac1 0x52>; 913 dma-names = "tx", "rx"; 914 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 915 resets = <&cpg 703>; 916 status = "disabled"; 917 }; 918 919 scif3: serial@e6c50000 { 920 compatible = "renesas,scif-r8a779a0", 921 "renesas,rcar-gen3-scif", "renesas,scif"; 922 reg = <0 0xe6c50000 0 64>; 923 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 924 clocks = <&cpg CPG_MOD 704>, 925 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 926 <&scif_clk>; 927 clock-names = "fck", "brg_int", "scif_clk"; 928 dmas = <&dmac1 0x57>, <&dmac1 0x56>; 929 dma-names = "tx", "rx"; 930 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 931 resets = <&cpg 704>; 932 status = "disabled"; 933 }; 934 935 scif4: serial@e6c40000 { 936 compatible = "renesas,scif-r8a779a0", 937 "renesas,rcar-gen3-scif", "renesas,scif"; 938 reg = <0 0xe6c40000 0 64>; 939 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 940 clocks = <&cpg CPG_MOD 705>, 941 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 942 <&scif_clk>; 943 clock-names = "fck", "brg_int", "scif_clk"; 944 dmas = <&dmac1 0x59>, <&dmac1 0x58>; 945 dma-names = "tx", "rx"; 946 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 947 resets = <&cpg 705>; 948 status = "disabled"; 949 }; 950 951 tpu: pwm@e6e80000 { 952 compatible = "renesas,tpu-r8a779a0", "renesas,tpu"; 953 reg = <0 0xe6e80000 0 0x148>; 954 interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>; 955 clocks = <&cpg CPG_MOD 718>; 956 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 957 resets = <&cpg 718>; 958 #pwm-cells = <3>; 959 status = "disabled"; 960 }; 961 962 msiof0: spi@e6e90000 { 963 compatible = "renesas,msiof-r8a779a0", 964 "renesas,rcar-gen3-msiof"; 965 reg = <0 0xe6e90000 0 0x0064>; 966 interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; 967 clocks = <&cpg CPG_MOD 618>; 968 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 969 resets = <&cpg 618>; 970 dmas = <&dmac1 0x41>, <&dmac1 0x40>; 971 dma-names = "tx", "rx"; 972 #address-cells = <1>; 973 #size-cells = <0>; 974 status = "disabled"; 975 }; 976 977 msiof1: spi@e6ea0000 { 978 compatible = "renesas,msiof-r8a779a0", 979 "renesas,rcar-gen3-msiof"; 980 reg = <0 0xe6ea0000 0 0x0064>; 981 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 982 clocks = <&cpg CPG_MOD 619>; 983 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 984 resets = <&cpg 619>; 985 dmas = <&dmac1 0x43>, <&dmac1 0x42>; 986 dma-names = "tx", "rx"; 987 #address-cells = <1>; 988 #size-cells = <0>; 989 status = "disabled"; 990 }; 991 992 msiof2: spi@e6c00000 { 993 compatible = "renesas,msiof-r8a779a0", 994 "renesas,rcar-gen3-msiof"; 995 reg = <0 0xe6c00000 0 0x0064>; 996 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 997 clocks = <&cpg CPG_MOD 620>; 998 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 999 resets = <&cpg 620>; 1000 dmas = <&dmac1 0x45>, <&dmac1 0x44>; 1001 dma-names = "tx", "rx"; 1002 #address-cells = <1>; 1003 #size-cells = <0>; 1004 status = "disabled"; 1005 }; 1006 1007 msiof3: spi@e6c10000 { 1008 compatible = "renesas,msiof-r8a779a0", 1009 "renesas,rcar-gen3-msiof"; 1010 reg = <0 0xe6c10000 0 0x0064>; 1011 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 1012 clocks = <&cpg CPG_MOD 621>; 1013 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1014 resets = <&cpg 621>; 1015 dmas = <&dmac1 0x47>, <&dmac1 0x46>; 1016 dma-names = "tx", "rx"; 1017 #address-cells = <1>; 1018 #size-cells = <0>; 1019 status = "disabled"; 1020 }; 1021 1022 msiof4: spi@e6c20000 { 1023 compatible = "renesas,msiof-r8a779a0", 1024 "renesas,rcar-gen3-msiof"; 1025 reg = <0 0xe6c20000 0 0x0064>; 1026 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 1027 clocks = <&cpg CPG_MOD 622>; 1028 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1029 resets = <&cpg 622>; 1030 dmas = <&dmac1 0x49>, <&dmac1 0x48>; 1031 dma-names = "tx", "rx"; 1032 #address-cells = <1>; 1033 #size-cells = <0>; 1034 status = "disabled"; 1035 }; 1036 1037 msiof5: spi@e6c28000 { 1038 compatible = "renesas,msiof-r8a779a0", 1039 "renesas,rcar-gen3-msiof"; 1040 reg = <0 0xe6c28000 0 0x0064>; 1041 interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>; 1042 clocks = <&cpg CPG_MOD 623>; 1043 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1044 resets = <&cpg 623>; 1045 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>; 1046 dma-names = "tx", "rx"; 1047 #address-cells = <1>; 1048 #size-cells = <0>; 1049 status = "disabled"; 1050 }; 1051 1052 vin00: video@e6ef0000 { 1053 compatible = "renesas,vin-r8a779a0"; 1054 reg = <0 0xe6ef0000 0 0x1000>; 1055 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; 1056 clocks = <&cpg CPG_MOD 730>; 1057 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1058 resets = <&cpg 730>; 1059 renesas,id = <0>; 1060 status = "disabled"; 1061 1062 ports { 1063 #address-cells = <1>; 1064 #size-cells = <0>; 1065 1066 port@2 { 1067 #address-cells = <1>; 1068 #size-cells = <0>; 1069 1070 reg = <2>; 1071 1072 vin00isp0: endpoint@0 { 1073 reg = <0>; 1074 remote-endpoint = <&isp0vin00>; 1075 }; 1076 }; 1077 }; 1078 }; 1079 1080 vin01: video@e6ef1000 { 1081 compatible = "renesas,vin-r8a779a0"; 1082 reg = <0 0xe6ef1000 0 0x1000>; 1083 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 1084 clocks = <&cpg CPG_MOD 731>; 1085 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1086 resets = <&cpg 731>; 1087 renesas,id = <1>; 1088 status = "disabled"; 1089 1090 ports { 1091 #address-cells = <1>; 1092 #size-cells = <0>; 1093 1094 port@2 { 1095 #address-cells = <1>; 1096 #size-cells = <0>; 1097 1098 reg = <2>; 1099 1100 vin01isp0: endpoint@0 { 1101 reg = <0>; 1102 remote-endpoint = <&isp0vin01>; 1103 }; 1104 }; 1105 }; 1106 }; 1107 1108 vin02: video@e6ef2000 { 1109 compatible = "renesas,vin-r8a779a0"; 1110 reg = <0 0xe6ef2000 0 0x1000>; 1111 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1112 clocks = <&cpg CPG_MOD 800>; 1113 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1114 resets = <&cpg 800>; 1115 renesas,id = <2>; 1116 status = "disabled"; 1117 1118 ports { 1119 #address-cells = <1>; 1120 #size-cells = <0>; 1121 1122 port@2 { 1123 #address-cells = <1>; 1124 #size-cells = <0>; 1125 1126 reg = <2>; 1127 1128 vin02isp0: endpoint@0 { 1129 reg = <0>; 1130 remote-endpoint = <&isp0vin02>; 1131 }; 1132 }; 1133 }; 1134 }; 1135 1136 vin03: video@e6ef3000 { 1137 compatible = "renesas,vin-r8a779a0"; 1138 reg = <0 0xe6ef3000 0 0x1000>; 1139 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 1140 clocks = <&cpg CPG_MOD 801>; 1141 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1142 resets = <&cpg 801>; 1143 renesas,id = <3>; 1144 status = "disabled"; 1145 1146 ports { 1147 #address-cells = <1>; 1148 #size-cells = <0>; 1149 1150 port@2 { 1151 #address-cells = <1>; 1152 #size-cells = <0>; 1153 1154 reg = <2>; 1155 1156 vin03isp0: endpoint@0 { 1157 reg = <0>; 1158 remote-endpoint = <&isp0vin03>; 1159 }; 1160 }; 1161 }; 1162 }; 1163 1164 vin04: video@e6ef4000 { 1165 compatible = "renesas,vin-r8a779a0"; 1166 reg = <0 0xe6ef4000 0 0x1000>; 1167 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1168 clocks = <&cpg CPG_MOD 802>; 1169 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1170 resets = <&cpg 802>; 1171 renesas,id = <4>; 1172 status = "disabled"; 1173 1174 ports { 1175 #address-cells = <1>; 1176 #size-cells = <0>; 1177 1178 port@2 { 1179 #address-cells = <1>; 1180 #size-cells = <0>; 1181 1182 reg = <2>; 1183 1184 vin04isp0: endpoint@0 { 1185 reg = <0>; 1186 remote-endpoint = <&isp0vin04>; 1187 }; 1188 }; 1189 }; 1190 }; 1191 1192 vin05: video@e6ef5000 { 1193 compatible = "renesas,vin-r8a779a0"; 1194 reg = <0 0xe6ef5000 0 0x1000>; 1195 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1196 clocks = <&cpg CPG_MOD 803>; 1197 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1198 resets = <&cpg 803>; 1199 renesas,id = <5>; 1200 status = "disabled"; 1201 1202 ports { 1203 #address-cells = <1>; 1204 #size-cells = <0>; 1205 1206 port@2 { 1207 #address-cells = <1>; 1208 #size-cells = <0>; 1209 1210 reg = <2>; 1211 1212 vin05isp0: endpoint@0 { 1213 reg = <0>; 1214 remote-endpoint = <&isp0vin05>; 1215 }; 1216 }; 1217 }; 1218 }; 1219 1220 vin06: video@e6ef6000 { 1221 compatible = "renesas,vin-r8a779a0"; 1222 reg = <0 0xe6ef6000 0 0x1000>; 1223 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1224 clocks = <&cpg CPG_MOD 804>; 1225 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1226 resets = <&cpg 804>; 1227 renesas,id = <6>; 1228 status = "disabled"; 1229 1230 ports { 1231 #address-cells = <1>; 1232 #size-cells = <0>; 1233 1234 port@2 { 1235 #address-cells = <1>; 1236 #size-cells = <0>; 1237 1238 reg = <2>; 1239 1240 vin06isp0: endpoint@0 { 1241 reg = <0>; 1242 remote-endpoint = <&isp0vin06>; 1243 }; 1244 }; 1245 }; 1246 }; 1247 1248 vin07: video@e6ef7000 { 1249 compatible = "renesas,vin-r8a779a0"; 1250 reg = <0 0xe6ef7000 0 0x1000>; 1251 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1252 clocks = <&cpg CPG_MOD 805>; 1253 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1254 resets = <&cpg 805>; 1255 renesas,id = <7>; 1256 status = "disabled"; 1257 1258 ports { 1259 #address-cells = <1>; 1260 #size-cells = <0>; 1261 1262 port@2 { 1263 #address-cells = <1>; 1264 #size-cells = <0>; 1265 1266 reg = <2>; 1267 1268 vin07isp0: endpoint@0 { 1269 reg = <0>; 1270 remote-endpoint = <&isp0vin07>; 1271 }; 1272 }; 1273 }; 1274 }; 1275 1276 vin08: video@e6ef8000 { 1277 compatible = "renesas,vin-r8a779a0"; 1278 reg = <0 0xe6ef8000 0 0x1000>; 1279 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1280 clocks = <&cpg CPG_MOD 806>; 1281 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1282 resets = <&cpg 806>; 1283 renesas,id = <8>; 1284 status = "disabled"; 1285 1286 ports { 1287 #address-cells = <1>; 1288 #size-cells = <0>; 1289 1290 port@2 { 1291 #address-cells = <1>; 1292 #size-cells = <0>; 1293 1294 reg = <2>; 1295 1296 vin08isp1: endpoint@1 { 1297 reg = <1>; 1298 remote-endpoint = <&isp1vin08>; 1299 }; 1300 }; 1301 }; 1302 }; 1303 1304 vin09: video@e6ef9000 { 1305 compatible = "renesas,vin-r8a779a0"; 1306 reg = <0 0xe6ef9000 0 0x1000>; 1307 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1308 clocks = <&cpg CPG_MOD 807>; 1309 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1310 resets = <&cpg 807>; 1311 renesas,id = <9>; 1312 status = "disabled"; 1313 1314 ports { 1315 #address-cells = <1>; 1316 #size-cells = <0>; 1317 1318 port@2 { 1319 #address-cells = <1>; 1320 #size-cells = <0>; 1321 1322 reg = <2>; 1323 1324 vin09isp1: endpoint@1 { 1325 reg = <1>; 1326 remote-endpoint = <&isp1vin09>; 1327 }; 1328 }; 1329 }; 1330 }; 1331 1332 vin10: video@e6efa000 { 1333 compatible = "renesas,vin-r8a779a0"; 1334 reg = <0 0xe6efa000 0 0x1000>; 1335 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 1336 clocks = <&cpg CPG_MOD 808>; 1337 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1338 resets = <&cpg 808>; 1339 renesas,id = <10>; 1340 status = "disabled"; 1341 1342 ports { 1343 #address-cells = <1>; 1344 #size-cells = <0>; 1345 1346 port@2 { 1347 #address-cells = <1>; 1348 #size-cells = <0>; 1349 1350 reg = <2>; 1351 1352 vin10isp1: endpoint@1 { 1353 reg = <1>; 1354 remote-endpoint = <&isp1vin10>; 1355 }; 1356 }; 1357 }; 1358 }; 1359 1360 vin11: video@e6efb000 { 1361 compatible = "renesas,vin-r8a779a0"; 1362 reg = <0 0xe6efb000 0 0x1000>; 1363 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1364 clocks = <&cpg CPG_MOD 809>; 1365 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1366 resets = <&cpg 809>; 1367 renesas,id = <11>; 1368 status = "disabled"; 1369 1370 ports { 1371 #address-cells = <1>; 1372 #size-cells = <0>; 1373 1374 port@2 { 1375 #address-cells = <1>; 1376 #size-cells = <0>; 1377 1378 reg = <2>; 1379 1380 vin11isp1: endpoint@1 { 1381 reg = <1>; 1382 remote-endpoint = <&isp1vin11>; 1383 }; 1384 }; 1385 }; 1386 }; 1387 1388 vin12: video@e6efc000 { 1389 compatible = "renesas,vin-r8a779a0"; 1390 reg = <0 0xe6efc000 0 0x1000>; 1391 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 1392 clocks = <&cpg CPG_MOD 810>; 1393 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1394 resets = <&cpg 810>; 1395 renesas,id = <12>; 1396 status = "disabled"; 1397 1398 ports { 1399 #address-cells = <1>; 1400 #size-cells = <0>; 1401 1402 port@2 { 1403 #address-cells = <1>; 1404 #size-cells = <0>; 1405 1406 reg = <2>; 1407 1408 vin12isp1: endpoint@1 { 1409 reg = <1>; 1410 remote-endpoint = <&isp1vin12>; 1411 }; 1412 }; 1413 }; 1414 }; 1415 1416 vin13: video@e6efd000 { 1417 compatible = "renesas,vin-r8a779a0"; 1418 reg = <0 0xe6efd000 0 0x1000>; 1419 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 1420 clocks = <&cpg CPG_MOD 811>; 1421 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1422 resets = <&cpg 811>; 1423 renesas,id = <13>; 1424 status = "disabled"; 1425 1426 ports { 1427 #address-cells = <1>; 1428 #size-cells = <0>; 1429 1430 port@2 { 1431 #address-cells = <1>; 1432 #size-cells = <0>; 1433 1434 reg = <2>; 1435 1436 vin13isp1: endpoint@1 { 1437 reg = <1>; 1438 remote-endpoint = <&isp1vin13>; 1439 }; 1440 }; 1441 }; 1442 }; 1443 1444 vin14: video@e6efe000 { 1445 compatible = "renesas,vin-r8a779a0"; 1446 reg = <0 0xe6efe000 0 0x1000>; 1447 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1448 clocks = <&cpg CPG_MOD 812>; 1449 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1450 resets = <&cpg 812>; 1451 renesas,id = <14>; 1452 status = "disabled"; 1453 1454 ports { 1455 #address-cells = <1>; 1456 #size-cells = <0>; 1457 1458 port@2 { 1459 #address-cells = <1>; 1460 #size-cells = <0>; 1461 1462 reg = <2>; 1463 1464 vin14isp1: endpoint@1 { 1465 reg = <1>; 1466 remote-endpoint = <&isp1vin14>; 1467 }; 1468 }; 1469 }; 1470 }; 1471 1472 vin15: video@e6eff000 { 1473 compatible = "renesas,vin-r8a779a0"; 1474 reg = <0 0xe6eff000 0 0x1000>; 1475 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1476 clocks = <&cpg CPG_MOD 813>; 1477 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1478 resets = <&cpg 813>; 1479 renesas,id = <15>; 1480 status = "disabled"; 1481 1482 ports { 1483 #address-cells = <1>; 1484 #size-cells = <0>; 1485 1486 port@2 { 1487 #address-cells = <1>; 1488 #size-cells = <0>; 1489 1490 reg = <2>; 1491 1492 vin15isp1: endpoint@1 { 1493 reg = <1>; 1494 remote-endpoint = <&isp1vin15>; 1495 }; 1496 }; 1497 }; 1498 }; 1499 1500 vin16: video@e6ed0000 { 1501 compatible = "renesas,vin-r8a779a0"; 1502 reg = <0 0xe6ed0000 0 0x1000>; 1503 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1504 clocks = <&cpg CPG_MOD 814>; 1505 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1506 resets = <&cpg 814>; 1507 renesas,id = <16>; 1508 status = "disabled"; 1509 1510 ports { 1511 #address-cells = <1>; 1512 #size-cells = <0>; 1513 1514 port@2 { 1515 #address-cells = <1>; 1516 #size-cells = <0>; 1517 1518 reg = <2>; 1519 1520 vin16isp2: endpoint@2 { 1521 reg = <2>; 1522 remote-endpoint = <&isp2vin16>; 1523 }; 1524 }; 1525 }; 1526 }; 1527 1528 vin17: video@e6ed1000 { 1529 compatible = "renesas,vin-r8a779a0"; 1530 reg = <0 0xe6ed1000 0 0x1000>; 1531 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; 1532 clocks = <&cpg CPG_MOD 815>; 1533 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1534 resets = <&cpg 815>; 1535 renesas,id = <17>; 1536 status = "disabled"; 1537 1538 ports { 1539 #address-cells = <1>; 1540 #size-cells = <0>; 1541 1542 port@2 { 1543 #address-cells = <1>; 1544 #size-cells = <0>; 1545 1546 reg = <2>; 1547 1548 vin17isp2: endpoint@2 { 1549 reg = <2>; 1550 remote-endpoint = <&isp2vin17>; 1551 }; 1552 }; 1553 }; 1554 }; 1555 1556 vin18: video@e6ed2000 { 1557 compatible = "renesas,vin-r8a779a0"; 1558 reg = <0 0xe6ed2000 0 0x1000>; 1559 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 1560 clocks = <&cpg CPG_MOD 816>; 1561 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1562 resets = <&cpg 816>; 1563 renesas,id = <18>; 1564 status = "disabled"; 1565 1566 ports { 1567 #address-cells = <1>; 1568 #size-cells = <0>; 1569 1570 port@2 { 1571 #address-cells = <1>; 1572 #size-cells = <0>; 1573 1574 reg = <2>; 1575 1576 vin18isp2: endpoint@2 { 1577 reg = <2>; 1578 remote-endpoint = <&isp2vin18>; 1579 }; 1580 }; 1581 }; 1582 }; 1583 1584 vin19: video@e6ed3000 { 1585 compatible = "renesas,vin-r8a779a0"; 1586 reg = <0 0xe6ed3000 0 0x1000>; 1587 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; 1588 clocks = <&cpg CPG_MOD 817>; 1589 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1590 resets = <&cpg 817>; 1591 renesas,id = <19>; 1592 status = "disabled"; 1593 1594 ports { 1595 #address-cells = <1>; 1596 #size-cells = <0>; 1597 1598 port@2 { 1599 #address-cells = <1>; 1600 #size-cells = <0>; 1601 1602 reg = <2>; 1603 1604 vin19isp2: endpoint@2 { 1605 reg = <2>; 1606 remote-endpoint = <&isp2vin19>; 1607 }; 1608 }; 1609 }; 1610 }; 1611 1612 vin20: video@e6ed4000 { 1613 compatible = "renesas,vin-r8a779a0"; 1614 reg = <0 0xe6ed4000 0 0x1000>; 1615 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 1616 clocks = <&cpg CPG_MOD 818>; 1617 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1618 resets = <&cpg 818>; 1619 renesas,id = <20>; 1620 status = "disabled"; 1621 1622 ports { 1623 #address-cells = <1>; 1624 #size-cells = <0>; 1625 1626 port@2 { 1627 #address-cells = <1>; 1628 #size-cells = <0>; 1629 1630 reg = <2>; 1631 1632 vin20isp2: endpoint@2 { 1633 reg = <2>; 1634 remote-endpoint = <&isp2vin20>; 1635 }; 1636 }; 1637 }; 1638 }; 1639 1640 vin21: video@e6ed5000 { 1641 compatible = "renesas,vin-r8a779a0"; 1642 reg = <0 0xe6ed5000 0 0x1000>; 1643 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; 1644 clocks = <&cpg CPG_MOD 819>; 1645 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1646 resets = <&cpg 819>; 1647 renesas,id = <21>; 1648 status = "disabled"; 1649 1650 ports { 1651 #address-cells = <1>; 1652 #size-cells = <0>; 1653 1654 port@2 { 1655 #address-cells = <1>; 1656 #size-cells = <0>; 1657 1658 reg = <2>; 1659 1660 vin21isp2: endpoint@2 { 1661 reg = <2>; 1662 remote-endpoint = <&isp2vin21>; 1663 }; 1664 }; 1665 }; 1666 }; 1667 1668 vin22: video@e6ed6000 { 1669 compatible = "renesas,vin-r8a779a0"; 1670 reg = <0 0xe6ed6000 0 0x1000>; 1671 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; 1672 clocks = <&cpg CPG_MOD 820>; 1673 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1674 resets = <&cpg 820>; 1675 renesas,id = <22>; 1676 status = "disabled"; 1677 1678 ports { 1679 #address-cells = <1>; 1680 #size-cells = <0>; 1681 1682 port@2 { 1683 #address-cells = <1>; 1684 #size-cells = <0>; 1685 1686 reg = <2>; 1687 1688 vin22isp2: endpoint@2 { 1689 reg = <2>; 1690 remote-endpoint = <&isp2vin22>; 1691 }; 1692 }; 1693 }; 1694 }; 1695 1696 vin23: video@e6ed7000 { 1697 compatible = "renesas,vin-r8a779a0"; 1698 reg = <0 0xe6ed7000 0 0x1000>; 1699 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; 1700 clocks = <&cpg CPG_MOD 821>; 1701 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1702 resets = <&cpg 821>; 1703 renesas,id = <23>; 1704 status = "disabled"; 1705 1706 ports { 1707 #address-cells = <1>; 1708 #size-cells = <0>; 1709 1710 port@2 { 1711 #address-cells = <1>; 1712 #size-cells = <0>; 1713 1714 reg = <2>; 1715 1716 vin23isp2: endpoint@2 { 1717 reg = <2>; 1718 remote-endpoint = <&isp2vin23>; 1719 }; 1720 }; 1721 }; 1722 }; 1723 1724 vin24: video@e6ed8000 { 1725 compatible = "renesas,vin-r8a779a0"; 1726 reg = <0 0xe6ed8000 0 0x1000>; 1727 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1728 clocks = <&cpg CPG_MOD 822>; 1729 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1730 resets = <&cpg 822>; 1731 renesas,id = <24>; 1732 status = "disabled"; 1733 1734 ports { 1735 #address-cells = <1>; 1736 #size-cells = <0>; 1737 1738 port@2 { 1739 #address-cells = <1>; 1740 #size-cells = <0>; 1741 1742 reg = <2>; 1743 1744 vin24isp3: endpoint@3 { 1745 reg = <3>; 1746 remote-endpoint = <&isp3vin24>; 1747 }; 1748 }; 1749 }; 1750 }; 1751 1752 vin25: video@e6ed9000 { 1753 compatible = "renesas,vin-r8a779a0"; 1754 reg = <0 0xe6ed9000 0 0x1000>; 1755 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; 1756 clocks = <&cpg CPG_MOD 823>; 1757 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1758 resets = <&cpg 823>; 1759 renesas,id = <25>; 1760 status = "disabled"; 1761 1762 ports { 1763 #address-cells = <1>; 1764 #size-cells = <0>; 1765 1766 port@2 { 1767 #address-cells = <1>; 1768 #size-cells = <0>; 1769 1770 reg = <2>; 1771 1772 vin25isp3: endpoint@3 { 1773 reg = <3>; 1774 remote-endpoint = <&isp3vin25>; 1775 }; 1776 }; 1777 }; 1778 }; 1779 1780 vin26: video@e6eda000 { 1781 compatible = "renesas,vin-r8a779a0"; 1782 reg = <0 0xe6eda000 0 0x1000>; 1783 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1784 clocks = <&cpg CPG_MOD 824>; 1785 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1786 resets = <&cpg 824>; 1787 renesas,id = <26>; 1788 status = "disabled"; 1789 1790 ports { 1791 #address-cells = <1>; 1792 #size-cells = <0>; 1793 1794 port@2 { 1795 #address-cells = <1>; 1796 #size-cells = <0>; 1797 1798 reg = <2>; 1799 1800 vin26isp3: endpoint@3 { 1801 reg = <3>; 1802 remote-endpoint = <&isp3vin26>; 1803 }; 1804 }; 1805 }; 1806 }; 1807 1808 vin27: video@e6edb000 { 1809 compatible = "renesas,vin-r8a779a0"; 1810 reg = <0 0xe6edb000 0 0x1000>; 1811 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1812 clocks = <&cpg CPG_MOD 825>; 1813 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1814 resets = <&cpg 825>; 1815 renesas,id = <27>; 1816 status = "disabled"; 1817 1818 ports { 1819 #address-cells = <1>; 1820 #size-cells = <0>; 1821 1822 port@2 { 1823 #address-cells = <1>; 1824 #size-cells = <0>; 1825 1826 reg = <2>; 1827 1828 vin27isp3: endpoint@3 { 1829 reg = <3>; 1830 remote-endpoint = <&isp3vin27>; 1831 }; 1832 }; 1833 }; 1834 }; 1835 1836 vin28: video@e6edc000 { 1837 compatible = "renesas,vin-r8a779a0"; 1838 reg = <0 0xe6edc000 0 0x1000>; 1839 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1840 clocks = <&cpg CPG_MOD 826>; 1841 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1842 resets = <&cpg 826>; 1843 renesas,id = <28>; 1844 status = "disabled"; 1845 1846 ports { 1847 #address-cells = <1>; 1848 #size-cells = <0>; 1849 1850 port@2 { 1851 #address-cells = <1>; 1852 #size-cells = <0>; 1853 1854 reg = <2>; 1855 1856 vin28isp3: endpoint@3 { 1857 reg = <3>; 1858 remote-endpoint = <&isp3vin28>; 1859 }; 1860 }; 1861 }; 1862 }; 1863 1864 vin29: video@e6edd000 { 1865 compatible = "renesas,vin-r8a779a0"; 1866 reg = <0 0xe6edd000 0 0x1000>; 1867 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1868 clocks = <&cpg CPG_MOD 827>; 1869 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1870 resets = <&cpg 827>; 1871 renesas,id = <29>; 1872 status = "disabled"; 1873 1874 ports { 1875 #address-cells = <1>; 1876 #size-cells = <0>; 1877 1878 port@2 { 1879 #address-cells = <1>; 1880 #size-cells = <0>; 1881 1882 reg = <2>; 1883 1884 vin29isp3: endpoint@3 { 1885 reg = <3>; 1886 remote-endpoint = <&isp3vin29>; 1887 }; 1888 }; 1889 }; 1890 }; 1891 1892 vin30: video@e6ede000 { 1893 compatible = "renesas,vin-r8a779a0"; 1894 reg = <0 0xe6ede000 0 0x1000>; 1895 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1896 clocks = <&cpg CPG_MOD 828>; 1897 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1898 resets = <&cpg 828>; 1899 renesas,id = <30>; 1900 status = "disabled"; 1901 1902 ports { 1903 #address-cells = <1>; 1904 #size-cells = <0>; 1905 1906 port@2 { 1907 #address-cells = <1>; 1908 #size-cells = <0>; 1909 1910 reg = <2>; 1911 1912 vin30isp3: endpoint@3 { 1913 reg = <3>; 1914 remote-endpoint = <&isp3vin30>; 1915 }; 1916 }; 1917 }; 1918 }; 1919 1920 vin31: video@e6edf000 { 1921 compatible = "renesas,vin-r8a779a0"; 1922 reg = <0 0xe6edf000 0 0x1000>; 1923 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1924 clocks = <&cpg CPG_MOD 829>; 1925 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1926 resets = <&cpg 829>; 1927 renesas,id = <31>; 1928 status = "disabled"; 1929 1930 ports { 1931 #address-cells = <1>; 1932 #size-cells = <0>; 1933 1934 port@2 { 1935 #address-cells = <1>; 1936 #size-cells = <0>; 1937 1938 reg = <2>; 1939 1940 vin31isp3: endpoint@3 { 1941 reg = <3>; 1942 remote-endpoint = <&isp3vin31>; 1943 }; 1944 }; 1945 }; 1946 }; 1947 1948 dmac1: dma-controller@e7350000 { 1949 compatible = "renesas,dmac-r8a779a0"; 1950 reg = <0 0xe7350000 0 0x1000>, 1951 <0 0xe7300000 0 0x10000>; 1952 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 1953 <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 1954 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 1955 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 1956 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 1957 <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 1958 <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 1959 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 1960 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1961 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1962 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1963 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1964 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1965 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1966 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1967 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1968 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 1969 interrupt-names = "error", 1970 "ch0", "ch1", "ch2", "ch3", "ch4", 1971 "ch5", "ch6", "ch7", "ch8", "ch9", 1972 "ch10", "ch11", "ch12", "ch13", 1973 "ch14", "ch15"; 1974 clocks = <&cpg CPG_MOD 709>; 1975 clock-names = "fck"; 1976 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1977 resets = <&cpg 709>; 1978 #dma-cells = <1>; 1979 dma-channels = <16>; 1980 }; 1981 1982 dmac2: dma-controller@e7351000 { 1983 compatible = "renesas,dmac-r8a779a0"; 1984 reg = <0 0xe7351000 0 0x1000>, 1985 <0 0xe7310000 0 0x10000>; 1986 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 1987 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1988 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1989 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1990 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1991 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1992 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1993 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1994 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 1995 interrupt-names = "error", 1996 "ch0", "ch1", "ch2", "ch3", "ch4", 1997 "ch5", "ch6", "ch7"; 1998 clocks = <&cpg CPG_MOD 710>; 1999 clock-names = "fck"; 2000 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2001 resets = <&cpg 710>; 2002 #dma-cells = <1>; 2003 dma-channels = <8>; 2004 }; 2005 2006 mmc0: mmc@ee140000 { 2007 compatible = "renesas,sdhi-r8a779a0", 2008 "renesas,rcar-gen3-sdhi"; 2009 reg = <0 0xee140000 0 0x2000>; 2010 interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>; 2011 clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>; 2012 clock-names = "core", "clkh"; 2013 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2014 resets = <&cpg 706>; 2015 max-frequency = <200000000>; 2016 iommus = <&ipmmu_ds0 32>; 2017 status = "disabled"; 2018 }; 2019 2020 rpc: spi@ee200000 { 2021 compatible = "renesas,r8a779a0-rpc-if", 2022 "renesas,rcar-gen3-rpc-if"; 2023 reg = <0 0xee200000 0 0x200>, 2024 <0 0x08000000 0 0x04000000>, 2025 <0 0xee208000 0 0x100>; 2026 reg-names = "regs", "dirmap", "wbuf"; 2027 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 2028 clocks = <&cpg CPG_MOD 629>; 2029 clock-names = "rpc"; 2030 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2031 resets = <&cpg 629>; 2032 #address-cells = <1>; 2033 #size-cells = <0>; 2034 status = "disabled"; 2035 }; 2036 2037 ipmmu_rt0: iommu@ee480000 { 2038 compatible = "renesas,ipmmu-r8a779a0"; 2039 reg = <0 0xee480000 0 0x20000>; 2040 renesas,ipmmu-main = <&ipmmu_mm 10>; 2041 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2042 #iommu-cells = <1>; 2043 }; 2044 2045 ipmmu_rt1: iommu@ee4c0000 { 2046 compatible = "renesas,ipmmu-r8a779a0"; 2047 reg = <0 0xee4c0000 0 0x20000>; 2048 renesas,ipmmu-main = <&ipmmu_mm 19>; 2049 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2050 #iommu-cells = <1>; 2051 }; 2052 2053 ipmmu_ds0: iommu@eed00000 { 2054 compatible = "renesas,ipmmu-r8a779a0"; 2055 reg = <0 0xeed00000 0 0x20000>; 2056 renesas,ipmmu-main = <&ipmmu_mm 0>; 2057 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2058 #iommu-cells = <1>; 2059 }; 2060 2061 ipmmu_ds1: iommu@eed40000 { 2062 compatible = "renesas,ipmmu-r8a779a0"; 2063 reg = <0 0xeed40000 0 0x20000>; 2064 renesas,ipmmu-main = <&ipmmu_mm 1>; 2065 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2066 #iommu-cells = <1>; 2067 }; 2068 2069 ipmmu_ir: iommu@eed80000 { 2070 compatible = "renesas,ipmmu-r8a779a0"; 2071 reg = <0 0xeed80000 0 0x20000>; 2072 renesas,ipmmu-main = <&ipmmu_mm 3>; 2073 power-domains = <&sysc R8A779A0_PD_A3IR>; 2074 #iommu-cells = <1>; 2075 }; 2076 2077 ipmmu_vc0: iommu@eedc0000 { 2078 compatible = "renesas,ipmmu-r8a779a0"; 2079 reg = <0 0xeedc0000 0 0x20000>; 2080 renesas,ipmmu-main = <&ipmmu_mm 12>; 2081 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2082 #iommu-cells = <1>; 2083 }; 2084 2085 ipmmu_vi0: iommu@eee80000 { 2086 compatible = "renesas,ipmmu-r8a779a0"; 2087 reg = <0 0xeee80000 0 0x20000>; 2088 renesas,ipmmu-main = <&ipmmu_mm 14>; 2089 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2090 #iommu-cells = <1>; 2091 }; 2092 2093 ipmmu_vi1: iommu@eeec0000 { 2094 compatible = "renesas,ipmmu-r8a779a0"; 2095 reg = <0 0xeeec0000 0 0x20000>; 2096 renesas,ipmmu-main = <&ipmmu_mm 15>; 2097 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2098 #iommu-cells = <1>; 2099 }; 2100 2101 ipmmu_3dg: iommu@eee00000 { 2102 compatible = "renesas,ipmmu-r8a779a0"; 2103 reg = <0 0xeee00000 0 0x20000>; 2104 renesas,ipmmu-main = <&ipmmu_mm 6>; 2105 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2106 #iommu-cells = <1>; 2107 }; 2108 2109 ipmmu_vip0: iommu@eef00000 { 2110 compatible = "renesas,ipmmu-r8a779a0"; 2111 reg = <0 0xeef00000 0 0x20000>; 2112 renesas,ipmmu-main = <&ipmmu_mm 5>; 2113 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2114 #iommu-cells = <1>; 2115 }; 2116 2117 ipmmu_vip1: iommu@eef40000 { 2118 compatible = "renesas,ipmmu-r8a779a0"; 2119 reg = <0 0xeef40000 0 0x20000>; 2120 renesas,ipmmu-main = <&ipmmu_mm 11>; 2121 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2122 #iommu-cells = <1>; 2123 }; 2124 2125 ipmmu_mm: iommu@eefc0000 { 2126 compatible = "renesas,ipmmu-r8a779a0"; 2127 reg = <0 0xeefc0000 0 0x20000>; 2128 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 2129 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 2130 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2131 #iommu-cells = <1>; 2132 }; 2133 2134 gic: interrupt-controller@f1000000 { 2135 compatible = "arm,gic-v3"; 2136 #interrupt-cells = <3>; 2137 #address-cells = <0>; 2138 interrupt-controller; 2139 reg = <0x0 0xf1000000 0 0x20000>, 2140 <0x0 0xf1060000 0 0x110000>; 2141 interrupts = <GIC_PPI 9 2142 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; 2143 }; 2144 2145 fcpvd0: fcp@fea10000 { 2146 compatible = "renesas,fcpv"; 2147 reg = <0 0xfea10000 0 0x200>; 2148 clocks = <&cpg CPG_MOD 508>; 2149 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2150 resets = <&cpg 508>; 2151 }; 2152 2153 fcpvd1: fcp@fea11000 { 2154 compatible = "renesas,fcpv"; 2155 reg = <0 0xfea11000 0 0x200>; 2156 clocks = <&cpg CPG_MOD 509>; 2157 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2158 resets = <&cpg 509>; 2159 }; 2160 2161 vspd0: vsp@fea20000 { 2162 compatible = "renesas,vsp2"; 2163 reg = <0 0xfea20000 0 0x5000>; 2164 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; 2165 clocks = <&cpg CPG_MOD 830>; 2166 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2167 resets = <&cpg 830>; 2168 2169 renesas,fcp = <&fcpvd0>; 2170 }; 2171 2172 vspd1: vsp@fea28000 { 2173 compatible = "renesas,vsp2"; 2174 reg = <0 0xfea28000 0 0x5000>; 2175 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; 2176 clocks = <&cpg CPG_MOD 831>; 2177 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2178 resets = <&cpg 831>; 2179 2180 renesas,fcp = <&fcpvd1>; 2181 }; 2182 2183 csi40: csi2@feaa0000 { 2184 compatible = "renesas,r8a779a0-csi2"; 2185 reg = <0 0xfeaa0000 0 0x10000>; 2186 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2187 clocks = <&cpg CPG_MOD 331>; 2188 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2189 resets = <&cpg 331>; 2190 status = "disabled"; 2191 2192 ports { 2193 #address-cells = <1>; 2194 #size-cells = <0>; 2195 2196 port@0 { 2197 reg = <0>; 2198 }; 2199 2200 port@1 { 2201 reg = <1>; 2202 csi40isp0: endpoint { 2203 remote-endpoint = <&isp0csi40>; 2204 }; 2205 }; 2206 }; 2207 }; 2208 2209 csi41: csi2@feab0000 { 2210 compatible = "renesas,r8a779a0-csi2"; 2211 reg = <0 0xfeab0000 0 0x10000>; 2212 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2213 clocks = <&cpg CPG_MOD 400>; 2214 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2215 resets = <&cpg 400>; 2216 status = "disabled"; 2217 2218 ports { 2219 #address-cells = <1>; 2220 #size-cells = <0>; 2221 2222 port@0 { 2223 reg = <0>; 2224 }; 2225 2226 port@1 { 2227 reg = <1>; 2228 csi41isp1: endpoint { 2229 remote-endpoint = <&isp1csi41>; 2230 }; 2231 }; 2232 }; 2233 }; 2234 2235 csi42: csi2@fed60000 { 2236 compatible = "renesas,r8a779a0-csi2"; 2237 reg = <0 0xfed60000 0 0x10000>; 2238 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 2239 clocks = <&cpg CPG_MOD 401>; 2240 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2241 resets = <&cpg 401>; 2242 status = "disabled"; 2243 2244 ports { 2245 #address-cells = <1>; 2246 #size-cells = <0>; 2247 2248 port@0 { 2249 reg = <0>; 2250 }; 2251 2252 port@1 { 2253 reg = <1>; 2254 csi42isp2: endpoint { 2255 remote-endpoint = <&isp2csi42>; 2256 }; 2257 }; 2258 }; 2259 }; 2260 2261 csi43: csi2@fed70000 { 2262 compatible = "renesas,r8a779a0-csi2"; 2263 reg = <0 0xfed70000 0 0x10000>; 2264 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 2265 clocks = <&cpg CPG_MOD 402>; 2266 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2267 resets = <&cpg 402>; 2268 status = "disabled"; 2269 2270 ports { 2271 #address-cells = <1>; 2272 #size-cells = <0>; 2273 2274 port@0 { 2275 reg = <0>; 2276 }; 2277 2278 port@1 { 2279 reg = <1>; 2280 csi43isp3: endpoint { 2281 remote-endpoint = <&isp3csi43>; 2282 }; 2283 }; 2284 }; 2285 }; 2286 2287 du: display@feb00000 { 2288 compatible = "renesas,du-r8a779a0"; 2289 reg = <0 0xfeb00000 0 0x40000>; 2290 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, 2291 <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 2292 clocks = <&cpg CPG_MOD 411>; 2293 clock-names = "du.0"; 2294 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2295 resets = <&cpg 411>; 2296 reset-names = "du.0"; 2297 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2298 2299 status = "disabled"; 2300 2301 ports { 2302 #address-cells = <1>; 2303 #size-cells = <0>; 2304 2305 port@0 { 2306 reg = <0>; 2307 du_out_dsi0: endpoint { 2308 remote-endpoint = <&dsi0_in>; 2309 }; 2310 }; 2311 2312 port@1 { 2313 reg = <1>; 2314 du_out_dsi1: endpoint { 2315 remote-endpoint = <&dsi1_in>; 2316 }; 2317 }; 2318 }; 2319 }; 2320 2321 isp0: isp@fed00000 { 2322 compatible = "renesas,r8a779a0-isp"; 2323 reg = <0 0xfed00000 0 0x10000>; 2324 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 2325 clocks = <&cpg CPG_MOD 612>; 2326 power-domains = <&sysc R8A779A0_PD_A3ISP01>; 2327 resets = <&cpg 612>; 2328 status = "disabled"; 2329 2330 ports { 2331 #address-cells = <1>; 2332 #size-cells = <0>; 2333 2334 port@0 { 2335 #address-cells = <1>; 2336 #size-cells = <0>; 2337 2338 reg = <0>; 2339 2340 isp0csi40: endpoint@0 { 2341 reg = <0>; 2342 remote-endpoint = <&csi40isp0>; 2343 }; 2344 }; 2345 2346 port@1 { 2347 reg = <1>; 2348 isp0vin00: endpoint { 2349 remote-endpoint = <&vin00isp0>; 2350 }; 2351 }; 2352 2353 port@2 { 2354 reg = <2>; 2355 isp0vin01: endpoint { 2356 remote-endpoint = <&vin01isp0>; 2357 }; 2358 }; 2359 2360 port@3 { 2361 reg = <3>; 2362 isp0vin02: endpoint { 2363 remote-endpoint = <&vin02isp0>; 2364 }; 2365 }; 2366 2367 port@4 { 2368 reg = <4>; 2369 isp0vin03: endpoint { 2370 remote-endpoint = <&vin03isp0>; 2371 }; 2372 }; 2373 2374 port@5 { 2375 reg = <5>; 2376 isp0vin04: endpoint { 2377 remote-endpoint = <&vin04isp0>; 2378 }; 2379 }; 2380 2381 port@6 { 2382 reg = <6>; 2383 isp0vin05: endpoint { 2384 remote-endpoint = <&vin05isp0>; 2385 }; 2386 }; 2387 2388 port@7 { 2389 reg = <7>; 2390 isp0vin06: endpoint { 2391 remote-endpoint = <&vin06isp0>; 2392 }; 2393 }; 2394 2395 port@8 { 2396 reg = <8>; 2397 isp0vin07: endpoint { 2398 remote-endpoint = <&vin07isp0>; 2399 }; 2400 }; 2401 }; 2402 }; 2403 2404 isp1: isp@fed20000 { 2405 compatible = "renesas,r8a779a0-isp"; 2406 reg = <0 0xfed20000 0 0x10000>; 2407 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 2408 clocks = <&cpg CPG_MOD 613>; 2409 power-domains = <&sysc R8A779A0_PD_A3ISP01>; 2410 resets = <&cpg 613>; 2411 status = "disabled"; 2412 2413 ports { 2414 #address-cells = <1>; 2415 #size-cells = <0>; 2416 2417 port@0 { 2418 #address-cells = <1>; 2419 #size-cells = <0>; 2420 2421 reg = <0>; 2422 2423 isp1csi41: endpoint@1 { 2424 reg = <1>; 2425 remote-endpoint = <&csi41isp1>; 2426 }; 2427 }; 2428 2429 port@1 { 2430 reg = <1>; 2431 isp1vin08: endpoint { 2432 remote-endpoint = <&vin08isp1>; 2433 }; 2434 }; 2435 2436 port@2 { 2437 reg = <2>; 2438 isp1vin09: endpoint { 2439 remote-endpoint = <&vin09isp1>; 2440 }; 2441 }; 2442 2443 port@3 { 2444 reg = <3>; 2445 isp1vin10: endpoint { 2446 remote-endpoint = <&vin10isp1>; 2447 }; 2448 }; 2449 2450 port@4 { 2451 reg = <4>; 2452 isp1vin11: endpoint { 2453 remote-endpoint = <&vin11isp1>; 2454 }; 2455 }; 2456 2457 port@5 { 2458 reg = <5>; 2459 isp1vin12: endpoint { 2460 remote-endpoint = <&vin12isp1>; 2461 }; 2462 }; 2463 2464 port@6 { 2465 reg = <6>; 2466 isp1vin13: endpoint { 2467 remote-endpoint = <&vin13isp1>; 2468 }; 2469 }; 2470 2471 port@7 { 2472 reg = <7>; 2473 isp1vin14: endpoint { 2474 remote-endpoint = <&vin14isp1>; 2475 }; 2476 }; 2477 2478 port@8 { 2479 reg = <8>; 2480 isp1vin15: endpoint { 2481 remote-endpoint = <&vin15isp1>; 2482 }; 2483 }; 2484 }; 2485 }; 2486 2487 isp2: isp@fed30000 { 2488 compatible = "renesas,r8a779a0-isp"; 2489 reg = <0 0xfed30000 0 0x10000>; 2490 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 2491 clocks = <&cpg CPG_MOD 614>; 2492 power-domains = <&sysc R8A779A0_PD_A3ISP23>; 2493 resets = <&cpg 614>; 2494 status = "disabled"; 2495 2496 ports { 2497 #address-cells = <1>; 2498 #size-cells = <0>; 2499 2500 port@0 { 2501 #address-cells = <1>; 2502 #size-cells = <0>; 2503 2504 reg = <0>; 2505 2506 isp2csi42: endpoint@0 { 2507 reg = <0>; 2508 remote-endpoint = <&csi42isp2>; 2509 }; 2510 }; 2511 2512 port@1 { 2513 reg = <1>; 2514 isp2vin16: endpoint { 2515 remote-endpoint = <&vin16isp2>; 2516 }; 2517 }; 2518 2519 port@2 { 2520 reg = <2>; 2521 isp2vin17: endpoint { 2522 remote-endpoint = <&vin17isp2>; 2523 }; 2524 }; 2525 2526 port@3 { 2527 reg = <3>; 2528 isp2vin18: endpoint { 2529 remote-endpoint = <&vin18isp2>; 2530 }; 2531 }; 2532 2533 port@4 { 2534 reg = <4>; 2535 isp2vin19: endpoint { 2536 remote-endpoint = <&vin19isp2>; 2537 }; 2538 }; 2539 2540 port@5 { 2541 reg = <5>; 2542 isp2vin20: endpoint { 2543 remote-endpoint = <&vin20isp2>; 2544 }; 2545 }; 2546 2547 port@6 { 2548 reg = <6>; 2549 isp2vin21: endpoint { 2550 remote-endpoint = <&vin21isp2>; 2551 }; 2552 }; 2553 2554 port@7 { 2555 reg = <7>; 2556 isp2vin22: endpoint { 2557 remote-endpoint = <&vin22isp2>; 2558 }; 2559 }; 2560 2561 port@8 { 2562 reg = <8>; 2563 isp2vin23: endpoint { 2564 remote-endpoint = <&vin23isp2>; 2565 }; 2566 }; 2567 }; 2568 }; 2569 2570 isp3: isp@fed40000 { 2571 compatible = "renesas,r8a779a0-isp"; 2572 reg = <0 0xfed40000 0 0x10000>; 2573 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 2574 clocks = <&cpg CPG_MOD 615>; 2575 power-domains = <&sysc R8A779A0_PD_A3ISP23>; 2576 resets = <&cpg 615>; 2577 status = "disabled"; 2578 2579 ports { 2580 #address-cells = <1>; 2581 #size-cells = <0>; 2582 2583 port@0 { 2584 #address-cells = <1>; 2585 #size-cells = <0>; 2586 2587 reg = <0>; 2588 2589 isp3csi43: endpoint@1 { 2590 reg = <1>; 2591 remote-endpoint = <&csi43isp3>; 2592 }; 2593 }; 2594 2595 port@1 { 2596 reg = <1>; 2597 isp3vin24: endpoint { 2598 remote-endpoint = <&vin24isp3>; 2599 }; 2600 }; 2601 2602 port@2 { 2603 reg = <2>; 2604 isp3vin25: endpoint { 2605 remote-endpoint = <&vin25isp3>; 2606 }; 2607 }; 2608 2609 port@3 { 2610 reg = <3>; 2611 isp3vin26: endpoint { 2612 remote-endpoint = <&vin26isp3>; 2613 }; 2614 }; 2615 2616 port@4 { 2617 reg = <4>; 2618 isp3vin27: endpoint { 2619 remote-endpoint = <&vin27isp3>; 2620 }; 2621 }; 2622 2623 port@5 { 2624 reg = <5>; 2625 isp3vin28: endpoint { 2626 remote-endpoint = <&vin28isp3>; 2627 }; 2628 }; 2629 2630 port@6 { 2631 reg = <6>; 2632 isp3vin29: endpoint { 2633 remote-endpoint = <&vin29isp3>; 2634 }; 2635 }; 2636 2637 port@7 { 2638 reg = <7>; 2639 isp3vin30: endpoint { 2640 remote-endpoint = <&vin30isp3>; 2641 }; 2642 }; 2643 2644 port@8 { 2645 reg = <8>; 2646 isp3vin31: endpoint { 2647 remote-endpoint = <&vin31isp3>; 2648 }; 2649 }; 2650 }; 2651 }; 2652 2653 dsi0: dsi-encoder@fed80000 { 2654 compatible = "renesas,r8a779a0-dsi-csi2-tx"; 2655 reg = <0 0xfed80000 0 0x10000>; 2656 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2657 clocks = <&cpg CPG_MOD 415>, 2658 <&cpg CPG_CORE R8A779A0_CLK_DSI>, 2659 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; 2660 clock-names = "fck", "dsi", "pll"; 2661 resets = <&cpg 415>; 2662 status = "disabled"; 2663 2664 ports { 2665 #address-cells = <1>; 2666 #size-cells = <0>; 2667 2668 port@0 { 2669 reg = <0>; 2670 dsi0_in: endpoint { 2671 remote-endpoint = <&du_out_dsi0>; 2672 }; 2673 }; 2674 2675 port@1 { 2676 reg = <1>; 2677 }; 2678 }; 2679 }; 2680 2681 dsi1: dsi-encoder@fed90000 { 2682 compatible = "renesas,r8a779a0-dsi-csi2-tx"; 2683 reg = <0 0xfed90000 0 0x10000>; 2684 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2685 clocks = <&cpg CPG_MOD 416>, 2686 <&cpg CPG_CORE R8A779A0_CLK_DSI>, 2687 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; 2688 clock-names = "fck", "dsi", "pll"; 2689 resets = <&cpg 416>; 2690 status = "disabled"; 2691 2692 ports { 2693 #address-cells = <1>; 2694 #size-cells = <0>; 2695 2696 port@0 { 2697 reg = <0>; 2698 dsi1_in: endpoint { 2699 remote-endpoint = <&du_out_dsi1>; 2700 }; 2701 }; 2702 2703 port@1 { 2704 reg = <1>; 2705 }; 2706 }; 2707 }; 2708 2709 prr: chipid@fff00044 { 2710 compatible = "renesas,prr"; 2711 reg = <0 0xfff00044 0 4>; 2712 }; 2713 }; 2714 2715 thermal-zones { 2716 sensor1_thermal: sensor1-thermal { 2717 polling-delay-passive = <250>; 2718 polling-delay = <1000>; 2719 thermal-sensors = <&tsc 0>; 2720 2721 trips { 2722 sensor1_crit: sensor1-crit { 2723 temperature = <120000>; 2724 hysteresis = <1000>; 2725 type = "critical"; 2726 }; 2727 }; 2728 }; 2729 2730 sensor2_thermal: sensor2-thermal { 2731 polling-delay-passive = <250>; 2732 polling-delay = <1000>; 2733 thermal-sensors = <&tsc 1>; 2734 2735 trips { 2736 sensor2_crit: sensor2-crit { 2737 temperature = <120000>; 2738 hysteresis = <1000>; 2739 type = "critical"; 2740 }; 2741 }; 2742 }; 2743 2744 sensor3_thermal: sensor3-thermal { 2745 polling-delay-passive = <250>; 2746 polling-delay = <1000>; 2747 thermal-sensors = <&tsc 2>; 2748 2749 trips { 2750 sensor3_crit: sensor3-crit { 2751 temperature = <120000>; 2752 hysteresis = <1000>; 2753 type = "critical"; 2754 }; 2755 }; 2756 }; 2757 2758 sensor4_thermal: sensor4-thermal { 2759 polling-delay-passive = <250>; 2760 polling-delay = <1000>; 2761 thermal-sensors = <&tsc 3>; 2762 2763 trips { 2764 sensor4_crit: sensor4-crit { 2765 temperature = <120000>; 2766 hysteresis = <1000>; 2767 type = "critical"; 2768 }; 2769 }; 2770 }; 2771 2772 sensor5_thermal: sensor5-thermal { 2773 polling-delay-passive = <250>; 2774 polling-delay = <1000>; 2775 thermal-sensors = <&tsc 4>; 2776 2777 trips { 2778 sensor5_crit: sensor5-crit { 2779 temperature = <120000>; 2780 hysteresis = <1000>; 2781 type = "critical"; 2782 }; 2783 }; 2784 }; 2785 }; 2786 2787 timer { 2788 compatible = "arm,armv8-timer"; 2789 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2790 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2791 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2792 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 2793 }; 2794}; 2795