1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Falcon CPU and BreakOut boards with R-Car V3U 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8/dts-v1/; 9#include "r8a779a0-falcon-cpu.dtsi" 10#include "r8a779a0-falcon-csi-dsi.dtsi" 11#include "r8a779a0-falcon-ethernet.dtsi" 12 13/ { 14 model = "Renesas Falcon CPU and Breakout boards based on r8a779a0"; 15 compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0"; 16 17 aliases { 18 ethernet0 = &avb0; 19 }; 20}; 21 22&avb0 { 23 pinctrl-0 = <&avb0_pins>; 24 pinctrl-names = "default"; 25 phy-handle = <&phy0>; 26 tx-internal-delay-ps = <2000>; 27 status = "okay"; 28 29 phy0: ethernet-phy@0 { 30 compatible = "ethernet-phy-id0022.1622", 31 "ethernet-phy-ieee802.3-c22"; 32 rxc-skew-ps = <1500>; 33 reg = <0>; 34 interrupt-parent = <&gpio4>; 35 interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 36 reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; 37 }; 38}; 39 40&can_clk { 41 clock-frequency = <40000000>; 42}; 43 44&canfd { 45 pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>; 46 pinctrl-names = "default"; 47 status = "okay"; 48 49 channel0 { 50 status = "okay"; 51 }; 52 53 channel1 { 54 status = "okay"; 55 }; 56}; 57 58&i2c0 { 59 eeprom@51 { 60 compatible = "rohm,br24g01", "atmel,24c01"; 61 label = "breakout-board"; 62 reg = <0x51>; 63 pagesize = <8>; 64 }; 65}; 66 67&pfc { 68 avb0_pins: avb0 { 69 mux { 70 groups = "avb0_link", "avb0_mdio", "avb0_rgmii", 71 "avb0_txcrefclk"; 72 function = "avb0"; 73 }; 74 75 pins_mdio { 76 groups = "avb0_mdio"; 77 drive-strength = <21>; 78 }; 79 80 pins_mii { 81 groups = "avb0_rgmii"; 82 drive-strength = <21>; 83 }; 84 85 }; 86 87 can_clk_pins: can-clk { 88 groups = "can_clk"; 89 function = "can_clk"; 90 }; 91 92 canfd0_pins: canfd0 { 93 groups = "canfd0_data"; 94 function = "canfd0"; 95 }; 96 97 canfd1_pins: canfd1 { 98 groups = "canfd1_data"; 99 function = "canfd1"; 100 }; 101}; 102