1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Falcon CPU board 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/leds/common.h> 11 12#include "r8a779a0.dtsi" 13 14/ { 15 model = "Renesas Falcon CPU board"; 16 compatible = "renesas,falcon-cpu", "renesas,r8a779a0"; 17 18 aliases { 19 serial0 = &scif0; 20 }; 21 22 chosen { 23 stdout-path = "serial0:115200n8"; 24 }; 25 26 keys { 27 compatible = "gpio-keys"; 28 29 pinctrl-0 = <&keys_pins>; 30 pinctrl-names = "default"; 31 32 key-1 { 33 gpios = <&gpio6 18 GPIO_ACTIVE_LOW>; 34 linux,code = <KEY_1>; 35 label = "SW47"; 36 wakeup-source; 37 debounce-interval = <20>; 38 }; 39 40 key-2 { 41 gpios = <&gpio6 19 GPIO_ACTIVE_LOW>; 42 linux,code = <KEY_2>; 43 label = "SW48"; 44 wakeup-source; 45 debounce-interval = <20>; 46 }; 47 48 key-3 { 49 gpios = <&gpio6 20 GPIO_ACTIVE_LOW>; 50 linux,code = <KEY_3>; 51 label = "SW49"; 52 wakeup-source; 53 debounce-interval = <20>; 54 }; 55 }; 56 57 leds { 58 compatible = "gpio-leds"; 59 60 led-1 { 61 gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>; 62 color = <LED_COLOR_ID_GREEN>; 63 function = LED_FUNCTION_INDICATOR; 64 function-enumerator = <1>; 65 }; 66 led-2 { 67 gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; 68 color = <LED_COLOR_ID_GREEN>; 69 function = LED_FUNCTION_INDICATOR; 70 function-enumerator = <2>; 71 }; 72 led-3 { 73 gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; 74 color = <LED_COLOR_ID_GREEN>; 75 function = LED_FUNCTION_INDICATOR; 76 function-enumerator = <3>; 77 }; 78 }; 79 80 memory@48000000 { 81 device_type = "memory"; 82 /* first 128MB is reserved for secure area. */ 83 reg = <0x0 0x48000000 0x0 0x78000000>; 84 }; 85 86 memory@500000000 { 87 device_type = "memory"; 88 reg = <0x5 0x00000000 0x0 0x80000000>; 89 }; 90 91 memory@600000000 { 92 device_type = "memory"; 93 reg = <0x6 0x00000000 0x0 0x80000000>; 94 }; 95 96 memory@700000000 { 97 device_type = "memory"; 98 reg = <0x7 0x00000000 0x0 0x80000000>; 99 }; 100 101 mini-dp-con { 102 compatible = "dp-connector"; 103 label = "CN5"; 104 type = "mini"; 105 106 port { 107 mini_dp_con_in: endpoint { 108 remote-endpoint = <&sn65dsi86_out>; 109 }; 110 }; 111 }; 112 113 reg_1p2v: regulator-1p2v { 114 compatible = "regulator-fixed"; 115 regulator-name = "fixed-1.2V"; 116 regulator-min-microvolt = <1200000>; 117 regulator-max-microvolt = <1200000>; 118 regulator-boot-on; 119 regulator-always-on; 120 }; 121 122 reg_1p8v: regulator-1p8v { 123 compatible = "regulator-fixed"; 124 regulator-name = "fixed-1.8V"; 125 regulator-min-microvolt = <1800000>; 126 regulator-max-microvolt = <1800000>; 127 regulator-boot-on; 128 regulator-always-on; 129 }; 130 131 reg_3p3v: regulator-3p3v { 132 compatible = "regulator-fixed"; 133 regulator-name = "fixed-3.3V"; 134 regulator-min-microvolt = <3300000>; 135 regulator-max-microvolt = <3300000>; 136 regulator-boot-on; 137 regulator-always-on; 138 }; 139 140 sn65dsi86_refclk: clk-x6 { 141 compatible = "fixed-clock"; 142 #clock-cells = <0>; 143 clock-frequency = <38400000>; 144 }; 145}; 146 147&dsi0 { 148 status = "okay"; 149 150 ports { 151 port@1 { 152 dsi0_out: endpoint { 153 remote-endpoint = <&sn65dsi86_in>; 154 data-lanes = <1 2 3 4>; 155 }; 156 }; 157 }; 158}; 159 160&du { 161 status = "okay"; 162}; 163 164&extal_clk { 165 clock-frequency = <16666666>; 166}; 167 168&extalr_clk { 169 clock-frequency = <32768>; 170}; 171 172&i2c0 { 173 pinctrl-0 = <&i2c0_pins>; 174 pinctrl-names = "default"; 175 176 status = "okay"; 177 clock-frequency = <400000>; 178 179 eeprom@50 { 180 compatible = "rohm,br24g01", "atmel,24c01"; 181 label = "cpu-board"; 182 reg = <0x50>; 183 pagesize = <8>; 184 }; 185}; 186 187&i2c1 { 188 pinctrl-0 = <&i2c1_pins>; 189 pinctrl-names = "default"; 190 191 status = "okay"; 192 clock-frequency = <400000>; 193 194 bridge@2c { 195 compatible = "ti,sn65dsi86"; 196 reg = <0x2c>; 197 198 clocks = <&sn65dsi86_refclk>; 199 clock-names = "refclk"; 200 201 interrupt-parent = <&gpio1>; 202 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 203 204 vccio-supply = <®_1p8v>; 205 vpll-supply = <®_1p8v>; 206 vcca-supply = <®_1p2v>; 207 vcc-supply = <®_1p2v>; 208 209 ports { 210 #address-cells = <1>; 211 #size-cells = <0>; 212 213 port@0 { 214 reg = <0>; 215 sn65dsi86_in: endpoint { 216 remote-endpoint = <&dsi0_out>; 217 }; 218 }; 219 220 port@1 { 221 reg = <1>; 222 sn65dsi86_out: endpoint { 223 remote-endpoint = <&mini_dp_con_in>; 224 }; 225 }; 226 }; 227 }; 228}; 229 230&i2c6 { 231 pinctrl-0 = <&i2c6_pins>; 232 pinctrl-names = "default"; 233 234 status = "okay"; 235 clock-frequency = <400000>; 236}; 237 238&mmc0 { 239 pinctrl-0 = <&mmc_pins>; 240 pinctrl-1 = <&mmc_pins>; 241 pinctrl-names = "default", "state_uhs"; 242 243 vmmc-supply = <®_3p3v>; 244 vqmmc-supply = <®_1p8v>; 245 mmc-hs200-1_8v; 246 mmc-hs400-1_8v; 247 bus-width = <8>; 248 no-sd; 249 no-sdio; 250 non-removable; 251 full-pwr-cycle-in-suspend; 252 status = "okay"; 253}; 254 255&pfc { 256 pinctrl-0 = <&scif_clk_pins>; 257 pinctrl-names = "default"; 258 259 i2c0_pins: i2c0 { 260 groups = "i2c0"; 261 function = "i2c0"; 262 }; 263 264 i2c1_pins: i2c1 { 265 groups = "i2c1"; 266 function = "i2c1"; 267 }; 268 269 i2c6_pins: i2c6 { 270 groups = "i2c6"; 271 function = "i2c6"; 272 }; 273 274 keys_pins: keys { 275 pins = "GP_6_18", "GP_6_19", "GP_6_20"; 276 bias-pull-up; 277 }; 278 279 mmc_pins: mmc { 280 groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; 281 function = "mmc"; 282 power-source = <1800>; 283 }; 284 285 qspi0_pins: qspi0 { 286 groups = "qspi0_ctrl", "qspi0_data4"; 287 function = "qspi0"; 288 }; 289 290 scif0_pins: scif0 { 291 groups = "scif0_data", "scif0_ctrl"; 292 function = "scif0"; 293 }; 294 295 scif_clk_pins: scif_clk { 296 groups = "scif_clk"; 297 function = "scif_clk"; 298 }; 299}; 300 301&rpc { 302 pinctrl-0 = <&qspi0_pins>; 303 pinctrl-names = "default"; 304 305 status = "okay"; 306 307 flash@0 { 308 compatible = "spansion,s25fs512s", "jedec,spi-nor"; 309 reg = <0>; 310 spi-max-frequency = <40000000>; 311 spi-rx-bus-width = <4>; 312 313 partitions { 314 compatible = "fixed-partitions"; 315 #address-cells = <1>; 316 #size-cells = <1>; 317 318 boot@0 { 319 reg = <0x0 0xcc0000>; 320 read-only; 321 }; 322 user@cc0000 { 323 reg = <0xcc0000 0x3340000>; 324 }; 325 }; 326 }; 327}; 328 329&rwdt { 330 timeout-sec = <60>; 331 status = "okay"; 332}; 333 334&scif0 { 335 pinctrl-0 = <&scif0_pins>; 336 pinctrl-names = "default"; 337 338 uart-has-rtscts; 339 status = "okay"; 340}; 341 342&scif_clk { 343 clock-frequency = <24000000>; 344}; 345