1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the ebisu board 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8/dts-v1/; 9#include "r8a77990.dtsi" 10#include <dt-bindings/gpio/gpio.h> 11 12/ { 13 model = "Renesas Ebisu board based on r8a77990"; 14 compatible = "renesas,ebisu", "renesas,r8a77990"; 15 16 aliases { 17 serial0 = &scif2; 18 ethernet0 = &avb; 19 }; 20 21 chosen { 22 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 23 stdout-path = "serial0:115200n8"; 24 }; 25 26 audio_clkout: audio-clkout { 27 /* 28 * This is same as <&rcar_sound 0> 29 * but needed to avoid cs2000/rcar_sound probe dead-lock 30 */ 31 compatible = "fixed-clock"; 32 #clock-cells = <0>; 33 clock-frequency = <11289600>; 34 }; 35 36 backlight: backlight { 37 compatible = "pwm-backlight"; 38 pwms = <&pwm3 0 50000>; 39 40 brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>; 41 default-brightness-level = <10>; 42 43 power-supply = <®_12p0v>; 44 }; 45 46 cvbs-in { 47 compatible = "composite-video-connector"; 48 label = "CVBS IN"; 49 50 port { 51 cvbs_con: endpoint { 52 remote-endpoint = <&adv7482_ain7>; 53 }; 54 }; 55 }; 56 57 hdmi-in { 58 compatible = "hdmi-connector"; 59 label = "HDMI IN"; 60 type = "a"; 61 62 port { 63 hdmi_in_con: endpoint { 64 remote-endpoint = <&adv7482_hdmi>; 65 }; 66 }; 67 }; 68 69 hdmi-out { 70 compatible = "hdmi-connector"; 71 type = "a"; 72 73 port { 74 hdmi_con_out: endpoint { 75 remote-endpoint = <&adv7511_out>; 76 }; 77 }; 78 }; 79 80 lvds-decoder { 81 compatible = "thine,thc63lvd1024"; 82 vcc-supply = <®_3p3v>; 83 84 ports { 85 #address-cells = <1>; 86 #size-cells = <0>; 87 88 port@0 { 89 reg = <0>; 90 thc63lvd1024_in: endpoint { 91 remote-endpoint = <&lvds0_out>; 92 }; 93 }; 94 95 port@2 { 96 reg = <2>; 97 thc63lvd1024_out: endpoint { 98 remote-endpoint = <&adv7511_in>; 99 }; 100 }; 101 }; 102 }; 103 104 memory@48000000 { 105 device_type = "memory"; 106 /* first 128MB is reserved for secure area. */ 107 reg = <0x0 0x48000000 0x0 0x38000000>; 108 }; 109 110 reg_1p8v: regulator0 { 111 compatible = "regulator-fixed"; 112 regulator-name = "fixed-1.8V"; 113 regulator-min-microvolt = <1800000>; 114 regulator-max-microvolt = <1800000>; 115 regulator-boot-on; 116 regulator-always-on; 117 }; 118 119 reg_3p3v: regulator1 { 120 compatible = "regulator-fixed"; 121 regulator-name = "fixed-3.3V"; 122 regulator-min-microvolt = <3300000>; 123 regulator-max-microvolt = <3300000>; 124 regulator-boot-on; 125 regulator-always-on; 126 }; 127 128 reg_12p0v: regulator2 { 129 compatible = "regulator-fixed"; 130 regulator-name = "D12.0V"; 131 regulator-min-microvolt = <12000000>; 132 regulator-max-microvolt = <12000000>; 133 regulator-boot-on; 134 regulator-always-on; 135 }; 136 137 rsnd_ak4613: sound { 138 compatible = "simple-audio-card"; 139 140 simple-audio-card,name = "rsnd-ak4613"; 141 simple-audio-card,format = "left_j"; 142 simple-audio-card,bitclock-master = <&sndcpu>; 143 simple-audio-card,frame-master = <&sndcpu>; 144 145 sndcodec: simple-audio-card,codec { 146 sound-dai = <&ak4613>; 147 }; 148 149 sndcpu: simple-audio-card,cpu { 150 sound-dai = <&rcar_sound>; 151 }; 152 }; 153 154 vbus0_usb2: regulator-vbus0-usb2 { 155 compatible = "regulator-fixed"; 156 157 regulator-name = "USB20_VBUS_CN"; 158 regulator-min-microvolt = <5000000>; 159 regulator-max-microvolt = <5000000>; 160 161 gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; 162 enable-active-high; 163 }; 164 165 vcc_sdhi0: regulator-vcc-sdhi0 { 166 compatible = "regulator-fixed"; 167 168 regulator-name = "SDHI0 Vcc"; 169 regulator-min-microvolt = <3300000>; 170 regulator-max-microvolt = <3300000>; 171 172 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; 173 enable-active-high; 174 }; 175 176 vccq_sdhi0: regulator-vccq-sdhi0 { 177 compatible = "regulator-gpio"; 178 179 regulator-name = "SDHI0 VccQ"; 180 regulator-min-microvolt = <1800000>; 181 regulator-max-microvolt = <3300000>; 182 183 gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; 184 gpios-states = <1>; 185 states = <3300000 1>, <1800000 0>; 186 }; 187 188 vcc_sdhi1: regulator-vcc-sdhi1 { 189 compatible = "regulator-fixed"; 190 191 regulator-name = "SDHI1 Vcc"; 192 regulator-min-microvolt = <3300000>; 193 regulator-max-microvolt = <3300000>; 194 195 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; 196 enable-active-high; 197 }; 198 199 vccq_sdhi1: regulator-vccq-sdhi1 { 200 compatible = "regulator-gpio"; 201 202 regulator-name = "SDHI1 VccQ"; 203 regulator-min-microvolt = <1800000>; 204 regulator-max-microvolt = <3300000>; 205 206 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; 207 gpios-states = <1>; 208 states = <3300000 1>, <1800000 0>; 209 }; 210 211 vga { 212 compatible = "vga-connector"; 213 214 port { 215 vga_in: endpoint { 216 remote-endpoint = <&adv7123_out>; 217 }; 218 }; 219 }; 220 221 vga-encoder { 222 compatible = "adi,adv7123"; 223 224 ports { 225 #address-cells = <1>; 226 #size-cells = <0>; 227 228 port@0 { 229 reg = <0>; 230 adv7123_in: endpoint { 231 remote-endpoint = <&du_out_rgb>; 232 }; 233 }; 234 port@1 { 235 reg = <1>; 236 adv7123_out: endpoint { 237 remote-endpoint = <&vga_in>; 238 }; 239 }; 240 }; 241 }; 242 243 x12_clk: x12 { 244 compatible = "fixed-clock"; 245 #clock-cells = <0>; 246 clock-frequency = <24576000>; 247 }; 248 249 x13_clk: x13 { 250 compatible = "fixed-clock"; 251 #clock-cells = <0>; 252 clock-frequency = <74250000>; 253 }; 254}; 255 256&audio_clk_a { 257 clock-frequency = <22579200>; 258}; 259 260&avb { 261 pinctrl-0 = <&avb_pins>; 262 pinctrl-names = "default"; 263 phy-handle = <&phy0>; 264 status = "okay"; 265 266 phy0: ethernet-phy@0 { 267 rxc-skew-ps = <1500>; 268 reg = <0>; 269 interrupt-parent = <&gpio2>; 270 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 271 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; 272 /* 273 * TX clock internal delay mode is required for reliable 274 * 1Gbps communication using the KSZ9031RNX phy present on 275 * the Ebisu board, however, TX clock internal delay mode 276 * isn't supported on r8a77990. Thus, limit speed to 277 * 100Mbps for reliable communication. 278 */ 279 max-speed = <100>; 280 }; 281}; 282 283&canfd { 284 pinctrl-0 = <&canfd0_pins>; 285 pinctrl-names = "default"; 286 status = "okay"; 287 288 channel0 { 289 status = "okay"; 290 }; 291}; 292 293&csi40 { 294 status = "okay"; 295 296 ports { 297 port@0 { 298 reg = <0>; 299 300 csi40_in: endpoint { 301 clock-lanes = <0>; 302 data-lanes = <1 2>; 303 remote-endpoint = <&adv7482_txa>; 304 }; 305 }; 306 }; 307}; 308 309&du { 310 pinctrl-0 = <&du_pins>; 311 pinctrl-names = "default"; 312 status = "okay"; 313 314 clocks = <&cpg CPG_MOD 724>, 315 <&cpg CPG_MOD 723>, 316 <&x13_clk>; 317 clock-names = "du.0", "du.1", "dclkin.0"; 318 319 ports { 320 port@0 { 321 endpoint { 322 remote-endpoint = <&adv7123_in>; 323 }; 324 }; 325 }; 326}; 327 328&ehci0 { 329 dr_mode = "otg"; 330 status = "okay"; 331}; 332 333&extal_clk { 334 clock-frequency = <48000000>; 335}; 336 337&hsusb { 338 dr_mode = "otg"; 339 status = "okay"; 340}; 341 342&i2c0 { 343 status = "okay"; 344 345 io_expander: gpio@20 { 346 compatible = "onnn,pca9654"; 347 reg = <0x20>; 348 gpio-controller; 349 #gpio-cells = <2>; 350 interrupt-parent = <&gpio2>; 351 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; 352 }; 353 354 hdmi-encoder@39 { 355 compatible = "adi,adv7511w"; 356 reg = <0x39>; 357 interrupt-parent = <&gpio1>; 358 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 359 360 adi,input-depth = <8>; 361 adi,input-colorspace = "rgb"; 362 adi,input-clock = "1x"; 363 364 ports { 365 #address-cells = <1>; 366 #size-cells = <0>; 367 368 port@0 { 369 reg = <0>; 370 adv7511_in: endpoint { 371 remote-endpoint = <&thc63lvd1024_out>; 372 }; 373 }; 374 375 port@1 { 376 reg = <1>; 377 adv7511_out: endpoint { 378 remote-endpoint = <&hdmi_con_out>; 379 }; 380 }; 381 }; 382 }; 383 384 video-receiver@70 { 385 compatible = "adi,adv7482"; 386 reg = <0x70>; 387 388 #address-cells = <1>; 389 #size-cells = <0>; 390 391 interrupt-parent = <&gpio0>; 392 interrupt-names = "intrq1", "intrq2"; 393 interrupts = <7 IRQ_TYPE_LEVEL_LOW>, 394 <17 IRQ_TYPE_LEVEL_LOW>; 395 396 port@7 { 397 reg = <7>; 398 399 adv7482_ain7: endpoint { 400 remote-endpoint = <&cvbs_con>; 401 }; 402 }; 403 404 port@8 { 405 reg = <8>; 406 407 adv7482_hdmi: endpoint { 408 remote-endpoint = <&hdmi_in_con>; 409 }; 410 }; 411 412 port@a { 413 reg = <10>; 414 415 adv7482_txa: endpoint { 416 clock-lanes = <0>; 417 data-lanes = <1 2>; 418 remote-endpoint = <&csi40_in>; 419 }; 420 }; 421 }; 422}; 423 424&i2c3 { 425 status = "okay"; 426 427 ak4613: codec@10 { 428 compatible = "asahi-kasei,ak4613"; 429 #sound-dai-cells = <0>; 430 reg = <0x10>; 431 clocks = <&rcar_sound 3>; 432 433 asahi-kasei,in1-single-end; 434 asahi-kasei,in2-single-end; 435 asahi-kasei,out1-single-end; 436 asahi-kasei,out2-single-end; 437 asahi-kasei,out3-single-end; 438 asahi-kasei,out4-single-end; 439 asahi-kasei,out5-single-end; 440 asahi-kasei,out6-single-end; 441 }; 442 443 cs2000: clk-multiplier@4f { 444 #clock-cells = <0>; 445 compatible = "cirrus,cs2000-cp"; 446 reg = <0x4f>; 447 clocks = <&audio_clkout>, <&x12_clk>; 448 clock-names = "clk_in", "ref_clk"; 449 450 assigned-clocks = <&cs2000>; 451 assigned-clock-rates = <24576000>; /* 1/1 divide */ 452 }; 453}; 454 455&i2c_dvfs { 456 status = "okay"; 457 458 clock-frequency = <400000>; 459 460 pmic: pmic@30 { 461 pinctrl-0 = <&irq0_pins>; 462 pinctrl-names = "default"; 463 464 compatible = "rohm,bd9571mwv"; 465 reg = <0x30>; 466 interrupt-parent = <&intc_ex>; 467 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 468 interrupt-controller; 469 #interrupt-cells = <2>; 470 gpio-controller; 471 #gpio-cells = <2>; 472 rohm,ddr-backup-power = <0x1>; 473 rohm,rstbmode-level; 474 }; 475}; 476 477&lvds0 { 478 status = "okay"; 479 480 clocks = <&cpg CPG_MOD 727>, 481 <&x13_clk>, 482 <&extal_clk>; 483 clock-names = "fck", "dclkin.0", "extal"; 484 485 ports { 486 port@1 { 487 lvds0_out: endpoint { 488 remote-endpoint = <&thc63lvd1024_in>; 489 }; 490 }; 491 }; 492}; 493 494&lvds1 { 495 /* 496 * Even though the LVDS1 output is not connected, the encoder must be 497 * enabled to supply a pixel clock to the DU for the DPAD output when 498 * LVDS0 is in use. 499 */ 500 status = "okay"; 501 502 clocks = <&cpg CPG_MOD 727>, 503 <&x13_clk>, 504 <&extal_clk>; 505 clock-names = "fck", "dclkin.0", "extal"; 506}; 507 508&ohci0 { 509 dr_mode = "otg"; 510 status = "okay"; 511}; 512 513&pcie_bus_clk { 514 clock-frequency = <100000000>; 515}; 516 517&pciec0 { 518 status = "okay"; 519}; 520 521&pfc { 522 avb_pins: avb { 523 groups = "avb_link", "avb_mii"; 524 function = "avb"; 525 }; 526 527 canfd0_pins: canfd0 { 528 groups = "canfd0_data"; 529 function = "canfd0"; 530 }; 531 532 du_pins: du { 533 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; 534 function = "du"; 535 }; 536 537 irq0_pins: irq0 { 538 groups = "intc_ex_irq0"; 539 function = "intc_ex"; 540 }; 541 542 pwm3_pins: pwm3 { 543 groups = "pwm3_b"; 544 function = "pwm3"; 545 }; 546 547 pwm5_pins: pwm5 { 548 groups = "pwm5_a"; 549 function = "pwm5"; 550 }; 551 552 scif2_pins: scif2 { 553 groups = "scif2_data_a"; 554 function = "scif2"; 555 }; 556 557 sdhi0_pins: sd0 { 558 groups = "sdhi0_data4", "sdhi0_ctrl"; 559 function = "sdhi0"; 560 power-source = <3300>; 561 }; 562 563 sdhi0_pins_uhs: sd0_uhs { 564 groups = "sdhi0_data4", "sdhi0_ctrl"; 565 function = "sdhi0"; 566 power-source = <1800>; 567 }; 568 569 sdhi1_pins: sd1 { 570 groups = "sdhi1_data4", "sdhi1_ctrl"; 571 function = "sdhi1"; 572 power-source = <3300>; 573 }; 574 575 sdhi1_pins_uhs: sd1_uhs { 576 groups = "sdhi1_data4", "sdhi1_ctrl"; 577 function = "sdhi1"; 578 power-source = <1800>; 579 }; 580 581 sdhi3_pins: sd3 { 582 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds"; 583 function = "sdhi3"; 584 power-source = <1800>; 585 }; 586 587 sound_clk_pins: sound_clk { 588 groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a", 589 "audio_clkout_a", "audio_clkout1_a"; 590 function = "audio_clk"; 591 }; 592 593 sound_pins: sound { 594 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data"; 595 function = "ssi"; 596 }; 597 598 usb0_pins: usb { 599 groups = "usb0_b", "usb0_id"; 600 function = "usb0"; 601 }; 602 603 usb30_pins: usb30 { 604 groups = "usb30"; 605 function = "usb30"; 606 }; 607}; 608 609&pwm3 { 610 pinctrl-0 = <&pwm3_pins>; 611 pinctrl-names = "default"; 612 613 status = "okay"; 614}; 615 616&pwm5 { 617 pinctrl-0 = <&pwm5_pins>; 618 pinctrl-names = "default"; 619 620 status = "okay"; 621}; 622 623&rcar_sound { 624 pinctrl-0 = <&sound_pins &sound_clk_pins>; 625 pinctrl-names = "default"; 626 627 /* Single DAI */ 628 #sound-dai-cells = <0>; 629 630 /* audio_clkout0/1/2/3 */ 631 #clock-cells = <1>; 632 clock-frequency = <12288000 11289600>; 633 634 status = "okay"; 635 636 /* update <audio_clk_b> to <cs2000> */ 637 clocks = <&cpg CPG_MOD 1005>, 638 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 639 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 640 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 641 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 642 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 643 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 644 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 645 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 646 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 647 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 648 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 649 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 650 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 651 <&audio_clk_a>, <&cs2000>, <&audio_clk_c>, 652 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 653 654 rcar_sound,dai { 655 dai0 { 656 playback = <&ssi0 &src0 &dvc0>; 657 capture = <&ssi1 &src1 &dvc1>; 658 }; 659 }; 660 661}; 662 663&rwdt { 664 timeout-sec = <60>; 665 status = "okay"; 666}; 667 668&scif2 { 669 pinctrl-0 = <&scif2_pins>; 670 pinctrl-names = "default"; 671 672 status = "okay"; 673}; 674 675&sdhi0 { 676 pinctrl-0 = <&sdhi0_pins>; 677 pinctrl-1 = <&sdhi0_pins_uhs>; 678 pinctrl-names = "default", "state_uhs"; 679 680 vmmc-supply = <&vcc_sdhi0>; 681 vqmmc-supply = <&vccq_sdhi0>; 682 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 683 wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; 684 bus-width = <4>; 685 sd-uhs-sdr50; 686 sd-uhs-sdr104; 687 status = "okay"; 688}; 689 690&sdhi1 { 691 pinctrl-0 = <&sdhi1_pins>; 692 pinctrl-1 = <&sdhi1_pins_uhs>; 693 pinctrl-names = "default", "state_uhs"; 694 695 vmmc-supply = <&vcc_sdhi1>; 696 vqmmc-supply = <&vccq_sdhi1>; 697 cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>; 698 bus-width = <4>; 699 sd-uhs-sdr50; 700 sd-uhs-sdr104; 701 status = "okay"; 702}; 703 704&sdhi3 { 705 /* used for on-board 8bit eMMC */ 706 pinctrl-0 = <&sdhi3_pins>; 707 pinctrl-1 = <&sdhi3_pins>; 708 pinctrl-names = "default", "state_uhs"; 709 710 vmmc-supply = <®_3p3v>; 711 vqmmc-supply = <®_1p8v>; 712 mmc-hs200-1_8v; 713 mmc-hs400-1_8v; 714 bus-width = <8>; 715 no-sd; 716 no-sdio; 717 non-removable; 718 full-pwr-cycle-in-suspend; 719 status = "okay"; 720}; 721 722&ssi1 { 723 shared-pin; 724}; 725 726&usb2_phy0 { 727 pinctrl-0 = <&usb0_pins>; 728 pinctrl-names = "default"; 729 730 vbus-supply = <&vbus0_usb2>; 731 status = "okay"; 732}; 733 734&usb3_peri0 { 735 companion = <&xhci0>; 736 status = "okay"; 737}; 738 739&vin4 { 740 status = "okay"; 741}; 742 743&vin5 { 744 status = "okay"; 745}; 746 747&xhci0 { 748 pinctrl-0 = <&usb30_pins>; 749 pinctrl-names = "default"; 750 751 status = "okay"; 752}; 753