1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4 16 17#define SOC_HAS_SATA 18 19/ { 20 compatible = "renesas,r8a77965"; 21 #address-cells = <2>; 22 #size-cells = <2>; 23 24 /* 25 * The external audio clocks are configured as 0 Hz fixed frequency 26 * clocks by default. 27 * Boards that provide audio clocks should override them. 28 */ 29 audio_clk_a: audio_clk_a { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 33 }; 34 35 audio_clk_b: audio_clk_b { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 audio_clk_c: audio_clk_c { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 /* External CAN clock - to be overridden by boards that provide it */ 48 can_clk: can { 49 compatible = "fixed-clock"; 50 #clock-cells = <0>; 51 clock-frequency = <0>; 52 }; 53 54 cluster0_opp: opp-table-0 { 55 compatible = "operating-points-v2"; 56 opp-shared; 57 58 opp-500000000 { 59 opp-hz = /bits/ 64 <500000000>; 60 opp-microvolt = <830000>; 61 clock-latency-ns = <300000>; 62 }; 63 opp-1000000000 { 64 opp-hz = /bits/ 64 <1000000000>; 65 opp-microvolt = <830000>; 66 clock-latency-ns = <300000>; 67 }; 68 opp-1500000000 { 69 opp-hz = /bits/ 64 <1500000000>; 70 opp-microvolt = <830000>; 71 clock-latency-ns = <300000>; 72 opp-suspend; 73 }; 74 opp-1600000000 { 75 opp-hz = /bits/ 64 <1600000000>; 76 opp-microvolt = <900000>; 77 clock-latency-ns = <300000>; 78 }; 79 opp-1700000000 { 80 opp-hz = /bits/ 64 <1700000000>; 81 opp-microvolt = <900000>; 82 clock-latency-ns = <300000>; 83 }; 84 opp-1800000000 { 85 opp-hz = /bits/ 64 <1800000000>; 86 opp-microvolt = <960000>; 87 clock-latency-ns = <300000>; 88 turbo-mode; 89 }; 90 }; 91 92 cpus { 93 #address-cells = <1>; 94 #size-cells = <0>; 95 96 a57_0: cpu@0 { 97 compatible = "arm,cortex-a57"; 98 reg = <0x0>; 99 device_type = "cpu"; 100 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 101 next-level-cache = <&L2_CA57>; 102 enable-method = "psci"; 103 cpu-idle-states = <&CPU_SLEEP_0>; 104 #cooling-cells = <2>; 105 dynamic-power-coefficient = <854>; 106 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 107 operating-points-v2 = <&cluster0_opp>; 108 }; 109 110 a57_1: cpu@1 { 111 compatible = "arm,cortex-a57"; 112 reg = <0x1>; 113 device_type = "cpu"; 114 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 115 next-level-cache = <&L2_CA57>; 116 enable-method = "psci"; 117 cpu-idle-states = <&CPU_SLEEP_0>; 118 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 119 operating-points-v2 = <&cluster0_opp>; 120 }; 121 122 L2_CA57: cache-controller-0 { 123 compatible = "cache"; 124 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 125 cache-unified; 126 cache-level = <2>; 127 }; 128 129 idle-states { 130 entry-method = "psci"; 131 132 CPU_SLEEP_0: cpu-sleep-0 { 133 compatible = "arm,idle-state"; 134 arm,psci-suspend-param = <0x0010000>; 135 local-timer-stop; 136 entry-latency-us = <400>; 137 exit-latency-us = <500>; 138 min-residency-us = <4000>; 139 }; 140 }; 141 }; 142 143 extal_clk: extal { 144 compatible = "fixed-clock"; 145 #clock-cells = <0>; 146 /* This value must be overridden by the board */ 147 clock-frequency = <0>; 148 }; 149 150 extalr_clk: extalr { 151 compatible = "fixed-clock"; 152 #clock-cells = <0>; 153 /* This value must be overridden by the board */ 154 clock-frequency = <0>; 155 }; 156 157 /* External PCIe clock - can be overridden by the board */ 158 pcie_bus_clk: pcie_bus { 159 compatible = "fixed-clock"; 160 #clock-cells = <0>; 161 clock-frequency = <0>; 162 }; 163 164 pmu_a57 { 165 compatible = "arm,cortex-a57-pmu"; 166 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 167 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 168 interrupt-affinity = <&a57_0>, 169 <&a57_1>; 170 }; 171 172 psci { 173 compatible = "arm,psci-1.0", "arm,psci-0.2"; 174 method = "smc"; 175 }; 176 177 /* External SCIF clock - to be overridden by boards that provide it */ 178 scif_clk: scif { 179 compatible = "fixed-clock"; 180 #clock-cells = <0>; 181 clock-frequency = <0>; 182 }; 183 184 soc { 185 compatible = "simple-bus"; 186 interrupt-parent = <&gic>; 187 #address-cells = <2>; 188 #size-cells = <2>; 189 ranges; 190 191 rwdt: watchdog@e6020000 { 192 compatible = "renesas,r8a77965-wdt", 193 "renesas,rcar-gen3-wdt"; 194 reg = <0 0xe6020000 0 0x0c>; 195 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 196 clocks = <&cpg CPG_MOD 402>; 197 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 198 resets = <&cpg 402>; 199 status = "disabled"; 200 }; 201 202 gpio0: gpio@e6050000 { 203 compatible = "renesas,gpio-r8a77965", 204 "renesas,rcar-gen3-gpio"; 205 reg = <0 0xe6050000 0 0x50>; 206 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 207 #gpio-cells = <2>; 208 gpio-controller; 209 gpio-ranges = <&pfc 0 0 16>; 210 #interrupt-cells = <2>; 211 interrupt-controller; 212 clocks = <&cpg CPG_MOD 912>; 213 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 214 resets = <&cpg 912>; 215 }; 216 217 gpio1: gpio@e6051000 { 218 compatible = "renesas,gpio-r8a77965", 219 "renesas,rcar-gen3-gpio"; 220 reg = <0 0xe6051000 0 0x50>; 221 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 222 #gpio-cells = <2>; 223 gpio-controller; 224 gpio-ranges = <&pfc 0 32 29>; 225 #interrupt-cells = <2>; 226 interrupt-controller; 227 clocks = <&cpg CPG_MOD 911>; 228 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 229 resets = <&cpg 911>; 230 }; 231 232 gpio2: gpio@e6052000 { 233 compatible = "renesas,gpio-r8a77965", 234 "renesas,rcar-gen3-gpio"; 235 reg = <0 0xe6052000 0 0x50>; 236 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 237 #gpio-cells = <2>; 238 gpio-controller; 239 gpio-ranges = <&pfc 0 64 15>; 240 #interrupt-cells = <2>; 241 interrupt-controller; 242 clocks = <&cpg CPG_MOD 910>; 243 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 244 resets = <&cpg 910>; 245 }; 246 247 gpio3: gpio@e6053000 { 248 compatible = "renesas,gpio-r8a77965", 249 "renesas,rcar-gen3-gpio"; 250 reg = <0 0xe6053000 0 0x50>; 251 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 252 #gpio-cells = <2>; 253 gpio-controller; 254 gpio-ranges = <&pfc 0 96 16>; 255 #interrupt-cells = <2>; 256 interrupt-controller; 257 clocks = <&cpg CPG_MOD 909>; 258 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 259 resets = <&cpg 909>; 260 }; 261 262 gpio4: gpio@e6054000 { 263 compatible = "renesas,gpio-r8a77965", 264 "renesas,rcar-gen3-gpio"; 265 reg = <0 0xe6054000 0 0x50>; 266 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 267 #gpio-cells = <2>; 268 gpio-controller; 269 gpio-ranges = <&pfc 0 128 18>; 270 #interrupt-cells = <2>; 271 interrupt-controller; 272 clocks = <&cpg CPG_MOD 908>; 273 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 274 resets = <&cpg 908>; 275 }; 276 277 gpio5: gpio@e6055000 { 278 compatible = "renesas,gpio-r8a77965", 279 "renesas,rcar-gen3-gpio"; 280 reg = <0 0xe6055000 0 0x50>; 281 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 282 #gpio-cells = <2>; 283 gpio-controller; 284 gpio-ranges = <&pfc 0 160 26>; 285 #interrupt-cells = <2>; 286 interrupt-controller; 287 clocks = <&cpg CPG_MOD 907>; 288 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 289 resets = <&cpg 907>; 290 }; 291 292 gpio6: gpio@e6055400 { 293 compatible = "renesas,gpio-r8a77965", 294 "renesas,rcar-gen3-gpio"; 295 reg = <0 0xe6055400 0 0x50>; 296 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 297 #gpio-cells = <2>; 298 gpio-controller; 299 gpio-ranges = <&pfc 0 192 32>; 300 #interrupt-cells = <2>; 301 interrupt-controller; 302 clocks = <&cpg CPG_MOD 906>; 303 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 304 resets = <&cpg 906>; 305 }; 306 307 gpio7: gpio@e6055800 { 308 compatible = "renesas,gpio-r8a77965", 309 "renesas,rcar-gen3-gpio"; 310 reg = <0 0xe6055800 0 0x50>; 311 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 312 #gpio-cells = <2>; 313 gpio-controller; 314 gpio-ranges = <&pfc 0 224 4>; 315 #interrupt-cells = <2>; 316 interrupt-controller; 317 clocks = <&cpg CPG_MOD 905>; 318 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 319 resets = <&cpg 905>; 320 }; 321 322 pfc: pinctrl@e6060000 { 323 compatible = "renesas,pfc-r8a77965"; 324 reg = <0 0xe6060000 0 0x50c>; 325 }; 326 327 cmt0: timer@e60f0000 { 328 compatible = "renesas,r8a77965-cmt0", 329 "renesas,rcar-gen3-cmt0"; 330 reg = <0 0xe60f0000 0 0x1004>; 331 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 333 clocks = <&cpg CPG_MOD 303>; 334 clock-names = "fck"; 335 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 336 resets = <&cpg 303>; 337 status = "disabled"; 338 }; 339 340 cmt1: timer@e6130000 { 341 compatible = "renesas,r8a77965-cmt1", 342 "renesas,rcar-gen3-cmt1"; 343 reg = <0 0xe6130000 0 0x1004>; 344 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 302>; 353 clock-names = "fck"; 354 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 355 resets = <&cpg 302>; 356 status = "disabled"; 357 }; 358 359 cmt2: timer@e6140000 { 360 compatible = "renesas,r8a77965-cmt1", 361 "renesas,rcar-gen3-cmt1"; 362 reg = <0 0xe6140000 0 0x1004>; 363 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 364 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 365 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 366 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 367 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 368 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 369 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 370 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 371 clocks = <&cpg CPG_MOD 301>; 372 clock-names = "fck"; 373 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 374 resets = <&cpg 301>; 375 status = "disabled"; 376 }; 377 378 cmt3: timer@e6148000 { 379 compatible = "renesas,r8a77965-cmt1", 380 "renesas,rcar-gen3-cmt1"; 381 reg = <0 0xe6148000 0 0x1004>; 382 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 383 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 384 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 386 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 387 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 388 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 389 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 390 clocks = <&cpg CPG_MOD 300>; 391 clock-names = "fck"; 392 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 393 resets = <&cpg 300>; 394 status = "disabled"; 395 }; 396 397 cpg: clock-controller@e6150000 { 398 compatible = "renesas,r8a77965-cpg-mssr"; 399 reg = <0 0xe6150000 0 0x1000>; 400 clocks = <&extal_clk>, <&extalr_clk>; 401 clock-names = "extal", "extalr"; 402 #clock-cells = <2>; 403 #power-domain-cells = <0>; 404 #reset-cells = <1>; 405 }; 406 407 rst: reset-controller@e6160000 { 408 compatible = "renesas,r8a77965-rst"; 409 reg = <0 0xe6160000 0 0x0200>; 410 }; 411 412 sysc: system-controller@e6180000 { 413 compatible = "renesas,r8a77965-sysc"; 414 reg = <0 0xe6180000 0 0x0400>; 415 #power-domain-cells = <1>; 416 }; 417 418 tsc: thermal@e6198000 { 419 compatible = "renesas,r8a77965-thermal"; 420 reg = <0 0xe6198000 0 0x100>, 421 <0 0xe61a0000 0 0x100>, 422 <0 0xe61a8000 0 0x100>; 423 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 424 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 425 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 426 clocks = <&cpg CPG_MOD 522>; 427 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 428 resets = <&cpg 522>; 429 #thermal-sensor-cells = <1>; 430 }; 431 432 intc_ex: interrupt-controller@e61c0000 { 433 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 434 #interrupt-cells = <2>; 435 interrupt-controller; 436 reg = <0 0xe61c0000 0 0x200>; 437 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 438 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 439 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 440 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 441 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 442 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 443 clocks = <&cpg CPG_MOD 407>; 444 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 445 resets = <&cpg 407>; 446 }; 447 448 tmu0: timer@e61e0000 { 449 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 450 reg = <0 0xe61e0000 0 0x30>; 451 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 452 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 453 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 454 clocks = <&cpg CPG_MOD 125>; 455 clock-names = "fck"; 456 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 457 resets = <&cpg 125>; 458 status = "disabled"; 459 }; 460 461 tmu1: timer@e6fc0000 { 462 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 463 reg = <0 0xe6fc0000 0 0x30>; 464 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 465 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 466 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 467 clocks = <&cpg CPG_MOD 124>; 468 clock-names = "fck"; 469 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 470 resets = <&cpg 124>; 471 status = "disabled"; 472 }; 473 474 tmu2: timer@e6fd0000 { 475 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 476 reg = <0 0xe6fd0000 0 0x30>; 477 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 478 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 479 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 480 clocks = <&cpg CPG_MOD 123>; 481 clock-names = "fck"; 482 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 483 resets = <&cpg 123>; 484 status = "disabled"; 485 }; 486 487 tmu3: timer@e6fe0000 { 488 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 489 reg = <0 0xe6fe0000 0 0x30>; 490 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 492 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 493 clocks = <&cpg CPG_MOD 122>; 494 clock-names = "fck"; 495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 496 resets = <&cpg 122>; 497 status = "disabled"; 498 }; 499 500 tmu4: timer@ffc00000 { 501 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 502 reg = <0 0xffc00000 0 0x30>; 503 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 504 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 505 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 506 clocks = <&cpg CPG_MOD 121>; 507 clock-names = "fck"; 508 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 509 resets = <&cpg 121>; 510 status = "disabled"; 511 }; 512 513 i2c0: i2c@e6500000 { 514 #address-cells = <1>; 515 #size-cells = <0>; 516 compatible = "renesas,i2c-r8a77965", 517 "renesas,rcar-gen3-i2c"; 518 reg = <0 0xe6500000 0 0x40>; 519 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 520 clocks = <&cpg CPG_MOD 931>; 521 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 522 resets = <&cpg 931>; 523 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 524 <&dmac2 0x91>, <&dmac2 0x90>; 525 dma-names = "tx", "rx", "tx", "rx"; 526 i2c-scl-internal-delay-ns = <110>; 527 status = "disabled"; 528 }; 529 530 i2c1: i2c@e6508000 { 531 #address-cells = <1>; 532 #size-cells = <0>; 533 compatible = "renesas,i2c-r8a77965", 534 "renesas,rcar-gen3-i2c"; 535 reg = <0 0xe6508000 0 0x40>; 536 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 537 clocks = <&cpg CPG_MOD 930>; 538 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 539 resets = <&cpg 930>; 540 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 541 <&dmac2 0x93>, <&dmac2 0x92>; 542 dma-names = "tx", "rx", "tx", "rx"; 543 i2c-scl-internal-delay-ns = <6>; 544 status = "disabled"; 545 }; 546 547 i2c2: i2c@e6510000 { 548 #address-cells = <1>; 549 #size-cells = <0>; 550 compatible = "renesas,i2c-r8a77965", 551 "renesas,rcar-gen3-i2c"; 552 reg = <0 0xe6510000 0 0x40>; 553 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 554 clocks = <&cpg CPG_MOD 929>; 555 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 556 resets = <&cpg 929>; 557 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 558 <&dmac2 0x95>, <&dmac2 0x94>; 559 dma-names = "tx", "rx", "tx", "rx"; 560 i2c-scl-internal-delay-ns = <6>; 561 status = "disabled"; 562 }; 563 564 i2c3: i2c@e66d0000 { 565 #address-cells = <1>; 566 #size-cells = <0>; 567 compatible = "renesas,i2c-r8a77965", 568 "renesas,rcar-gen3-i2c"; 569 reg = <0 0xe66d0000 0 0x40>; 570 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 571 clocks = <&cpg CPG_MOD 928>; 572 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 573 resets = <&cpg 928>; 574 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 575 dma-names = "tx", "rx"; 576 i2c-scl-internal-delay-ns = <110>; 577 status = "disabled"; 578 }; 579 580 i2c4: i2c@e66d8000 { 581 #address-cells = <1>; 582 #size-cells = <0>; 583 compatible = "renesas,i2c-r8a77965", 584 "renesas,rcar-gen3-i2c"; 585 reg = <0 0xe66d8000 0 0x40>; 586 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 587 clocks = <&cpg CPG_MOD 927>; 588 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 589 resets = <&cpg 927>; 590 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 591 dma-names = "tx", "rx"; 592 i2c-scl-internal-delay-ns = <110>; 593 status = "disabled"; 594 }; 595 596 i2c5: i2c@e66e0000 { 597 #address-cells = <1>; 598 #size-cells = <0>; 599 compatible = "renesas,i2c-r8a77965", 600 "renesas,rcar-gen3-i2c"; 601 reg = <0 0xe66e0000 0 0x40>; 602 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 603 clocks = <&cpg CPG_MOD 919>; 604 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 605 resets = <&cpg 919>; 606 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 607 dma-names = "tx", "rx"; 608 i2c-scl-internal-delay-ns = <110>; 609 status = "disabled"; 610 }; 611 612 i2c6: i2c@e66e8000 { 613 #address-cells = <1>; 614 #size-cells = <0>; 615 compatible = "renesas,i2c-r8a77965", 616 "renesas,rcar-gen3-i2c"; 617 reg = <0 0xe66e8000 0 0x40>; 618 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 619 clocks = <&cpg CPG_MOD 918>; 620 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 621 resets = <&cpg 918>; 622 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 623 dma-names = "tx", "rx"; 624 i2c-scl-internal-delay-ns = <6>; 625 status = "disabled"; 626 }; 627 628 i2c_dvfs: i2c@e60b0000 { 629 #address-cells = <1>; 630 #size-cells = <0>; 631 compatible = "renesas,iic-r8a77965", 632 "renesas,rcar-gen3-iic", 633 "renesas,rmobile-iic"; 634 reg = <0 0xe60b0000 0 0x425>; 635 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 636 clocks = <&cpg CPG_MOD 926>; 637 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 638 resets = <&cpg 926>; 639 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 640 dma-names = "tx", "rx"; 641 status = "disabled"; 642 }; 643 644 hscif0: serial@e6540000 { 645 compatible = "renesas,hscif-r8a77965", 646 "renesas,rcar-gen3-hscif", 647 "renesas,hscif"; 648 reg = <0 0xe6540000 0 0x60>; 649 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 650 clocks = <&cpg CPG_MOD 520>, 651 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 652 <&scif_clk>; 653 clock-names = "fck", "brg_int", "scif_clk"; 654 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 655 <&dmac2 0x31>, <&dmac2 0x30>; 656 dma-names = "tx", "rx", "tx", "rx"; 657 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 658 resets = <&cpg 520>; 659 status = "disabled"; 660 }; 661 662 hscif1: serial@e6550000 { 663 compatible = "renesas,hscif-r8a77965", 664 "renesas,rcar-gen3-hscif", 665 "renesas,hscif"; 666 reg = <0 0xe6550000 0 0x60>; 667 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 668 clocks = <&cpg CPG_MOD 519>, 669 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 670 <&scif_clk>; 671 clock-names = "fck", "brg_int", "scif_clk"; 672 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 673 <&dmac2 0x33>, <&dmac2 0x32>; 674 dma-names = "tx", "rx", "tx", "rx"; 675 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 676 resets = <&cpg 519>; 677 status = "disabled"; 678 }; 679 680 hscif2: serial@e6560000 { 681 compatible = "renesas,hscif-r8a77965", 682 "renesas,rcar-gen3-hscif", 683 "renesas,hscif"; 684 reg = <0 0xe6560000 0 0x60>; 685 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 686 clocks = <&cpg CPG_MOD 518>, 687 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 688 <&scif_clk>; 689 clock-names = "fck", "brg_int", "scif_clk"; 690 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 691 <&dmac2 0x35>, <&dmac2 0x34>; 692 dma-names = "tx", "rx", "tx", "rx"; 693 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 694 resets = <&cpg 518>; 695 status = "disabled"; 696 }; 697 698 hscif3: serial@e66a0000 { 699 compatible = "renesas,hscif-r8a77965", 700 "renesas,rcar-gen3-hscif", 701 "renesas,hscif"; 702 reg = <0 0xe66a0000 0 0x60>; 703 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 704 clocks = <&cpg CPG_MOD 517>, 705 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 706 <&scif_clk>; 707 clock-names = "fck", "brg_int", "scif_clk"; 708 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 709 dma-names = "tx", "rx"; 710 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 711 resets = <&cpg 517>; 712 status = "disabled"; 713 }; 714 715 hscif4: serial@e66b0000 { 716 compatible = "renesas,hscif-r8a77965", 717 "renesas,rcar-gen3-hscif", 718 "renesas,hscif"; 719 reg = <0 0xe66b0000 0 0x60>; 720 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 721 clocks = <&cpg CPG_MOD 516>, 722 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 723 <&scif_clk>; 724 clock-names = "fck", "brg_int", "scif_clk"; 725 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 726 dma-names = "tx", "rx"; 727 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 728 resets = <&cpg 516>; 729 status = "disabled"; 730 }; 731 732 hsusb: usb@e6590000 { 733 compatible = "renesas,usbhs-r8a77965", 734 "renesas,rcar-gen3-usbhs"; 735 reg = <0 0xe6590000 0 0x200>; 736 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 737 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 738 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 739 <&usb_dmac1 0>, <&usb_dmac1 1>; 740 dma-names = "ch0", "ch1", "ch2", "ch3"; 741 renesas,buswait = <11>; 742 phys = <&usb2_phy0 3>; 743 phy-names = "usb"; 744 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 745 resets = <&cpg 704>, <&cpg 703>; 746 status = "disabled"; 747 }; 748 749 usb_dmac0: dma-controller@e65a0000 { 750 compatible = "renesas,r8a77965-usb-dmac", 751 "renesas,usb-dmac"; 752 reg = <0 0xe65a0000 0 0x100>; 753 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 754 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 755 interrupt-names = "ch0", "ch1"; 756 clocks = <&cpg CPG_MOD 330>; 757 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 758 resets = <&cpg 330>; 759 #dma-cells = <1>; 760 dma-channels = <2>; 761 }; 762 763 usb_dmac1: dma-controller@e65b0000 { 764 compatible = "renesas,r8a77965-usb-dmac", 765 "renesas,usb-dmac"; 766 reg = <0 0xe65b0000 0 0x100>; 767 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 769 interrupt-names = "ch0", "ch1"; 770 clocks = <&cpg CPG_MOD 331>; 771 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 772 resets = <&cpg 331>; 773 #dma-cells = <1>; 774 dma-channels = <2>; 775 }; 776 777 usb3_phy0: usb-phy@e65ee000 { 778 compatible = "renesas,r8a77965-usb3-phy", 779 "renesas,rcar-gen3-usb3-phy"; 780 reg = <0 0xe65ee000 0 0x90>; 781 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 782 <&usb_extal_clk>; 783 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 784 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 785 resets = <&cpg 328>; 786 #phy-cells = <0>; 787 status = "disabled"; 788 }; 789 790 arm_cc630p: crypto@e6601000 { 791 compatible = "arm,cryptocell-630p-ree"; 792 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 793 reg = <0x0 0xe6601000 0 0x1000>; 794 clocks = <&cpg CPG_MOD 229>; 795 resets = <&cpg 229>; 796 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 797 }; 798 799 dmac0: dma-controller@e6700000 { 800 compatible = "renesas,dmac-r8a77965", 801 "renesas,rcar-dmac"; 802 reg = <0 0xe6700000 0 0x10000>; 803 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 804 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 805 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 806 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 807 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 808 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 809 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 820 interrupt-names = "error", 821 "ch0", "ch1", "ch2", "ch3", 822 "ch4", "ch5", "ch6", "ch7", 823 "ch8", "ch9", "ch10", "ch11", 824 "ch12", "ch13", "ch14", "ch15"; 825 clocks = <&cpg CPG_MOD 219>; 826 clock-names = "fck"; 827 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 828 resets = <&cpg 219>; 829 #dma-cells = <1>; 830 dma-channels = <16>; 831 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 832 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 833 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 834 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 835 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 836 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 837 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 838 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 839 }; 840 841 dmac1: dma-controller@e7300000 { 842 compatible = "renesas,dmac-r8a77965", 843 "renesas,rcar-dmac"; 844 reg = <0 0xe7300000 0 0x10000>; 845 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 846 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 847 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 848 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 849 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 850 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 851 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 852 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 853 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 854 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 855 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 856 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 862 interrupt-names = "error", 863 "ch0", "ch1", "ch2", "ch3", 864 "ch4", "ch5", "ch6", "ch7", 865 "ch8", "ch9", "ch10", "ch11", 866 "ch12", "ch13", "ch14", "ch15"; 867 clocks = <&cpg CPG_MOD 218>; 868 clock-names = "fck"; 869 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 870 resets = <&cpg 218>; 871 #dma-cells = <1>; 872 dma-channels = <16>; 873 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 874 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 875 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 876 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 877 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 878 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 879 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 880 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 881 }; 882 883 dmac2: dma-controller@e7310000 { 884 compatible = "renesas,dmac-r8a77965", 885 "renesas,rcar-dmac"; 886 reg = <0 0xe7310000 0 0x10000>; 887 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 892 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 893 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 894 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 895 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 896 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 897 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 898 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 899 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 900 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 901 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 904 interrupt-names = "error", 905 "ch0", "ch1", "ch2", "ch3", 906 "ch4", "ch5", "ch6", "ch7", 907 "ch8", "ch9", "ch10", "ch11", 908 "ch12", "ch13", "ch14", "ch15"; 909 clocks = <&cpg CPG_MOD 217>; 910 clock-names = "fck"; 911 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 912 resets = <&cpg 217>; 913 #dma-cells = <1>; 914 dma-channels = <16>; 915 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 916 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 917 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 918 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 919 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 920 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 921 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 922 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 923 }; 924 925 ipmmu_ds0: iommu@e6740000 { 926 compatible = "renesas,ipmmu-r8a77965"; 927 reg = <0 0xe6740000 0 0x1000>; 928 renesas,ipmmu-main = <&ipmmu_mm 0>; 929 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 930 #iommu-cells = <1>; 931 }; 932 933 ipmmu_ds1: iommu@e7740000 { 934 compatible = "renesas,ipmmu-r8a77965"; 935 reg = <0 0xe7740000 0 0x1000>; 936 renesas,ipmmu-main = <&ipmmu_mm 1>; 937 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 938 #iommu-cells = <1>; 939 }; 940 941 ipmmu_hc: iommu@e6570000 { 942 compatible = "renesas,ipmmu-r8a77965"; 943 reg = <0 0xe6570000 0 0x1000>; 944 renesas,ipmmu-main = <&ipmmu_mm 2>; 945 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 946 #iommu-cells = <1>; 947 }; 948 949 ipmmu_mm: iommu@e67b0000 { 950 compatible = "renesas,ipmmu-r8a77965"; 951 reg = <0 0xe67b0000 0 0x1000>; 952 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 953 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 954 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 955 #iommu-cells = <1>; 956 }; 957 958 ipmmu_mp: iommu@ec670000 { 959 compatible = "renesas,ipmmu-r8a77965"; 960 reg = <0 0xec670000 0 0x1000>; 961 renesas,ipmmu-main = <&ipmmu_mm 4>; 962 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 963 #iommu-cells = <1>; 964 }; 965 966 ipmmu_pv0: iommu@fd800000 { 967 compatible = "renesas,ipmmu-r8a77965"; 968 reg = <0 0xfd800000 0 0x1000>; 969 renesas,ipmmu-main = <&ipmmu_mm 6>; 970 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 971 #iommu-cells = <1>; 972 }; 973 974 ipmmu_rt: iommu@ffc80000 { 975 compatible = "renesas,ipmmu-r8a77965"; 976 reg = <0 0xffc80000 0 0x1000>; 977 renesas,ipmmu-main = <&ipmmu_mm 10>; 978 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 979 #iommu-cells = <1>; 980 }; 981 982 ipmmu_vc0: iommu@fe6b0000 { 983 compatible = "renesas,ipmmu-r8a77965"; 984 reg = <0 0xfe6b0000 0 0x1000>; 985 renesas,ipmmu-main = <&ipmmu_mm 12>; 986 power-domains = <&sysc R8A77965_PD_A3VC>; 987 #iommu-cells = <1>; 988 }; 989 990 ipmmu_vi0: iommu@febd0000 { 991 compatible = "renesas,ipmmu-r8a77965"; 992 reg = <0 0xfebd0000 0 0x1000>; 993 renesas,ipmmu-main = <&ipmmu_mm 14>; 994 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 995 #iommu-cells = <1>; 996 }; 997 998 ipmmu_vp0: iommu@fe990000 { 999 compatible = "renesas,ipmmu-r8a77965"; 1000 reg = <0 0xfe990000 0 0x1000>; 1001 renesas,ipmmu-main = <&ipmmu_mm 16>; 1002 power-domains = <&sysc R8A77965_PD_A3VP>; 1003 #iommu-cells = <1>; 1004 }; 1005 1006 avb: ethernet@e6800000 { 1007 compatible = "renesas,etheravb-r8a77965", 1008 "renesas,etheravb-rcar-gen3"; 1009 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1010 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1011 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1012 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1013 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1014 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1015 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1016 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1017 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1018 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1019 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1020 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1021 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1022 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1023 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1024 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1035 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1036 "ch4", "ch5", "ch6", "ch7", 1037 "ch8", "ch9", "ch10", "ch11", 1038 "ch12", "ch13", "ch14", "ch15", 1039 "ch16", "ch17", "ch18", "ch19", 1040 "ch20", "ch21", "ch22", "ch23", 1041 "ch24"; 1042 clocks = <&cpg CPG_MOD 812>; 1043 clock-names = "fck"; 1044 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1045 resets = <&cpg 812>; 1046 phy-mode = "rgmii"; 1047 rx-internal-delay-ps = <0>; 1048 tx-internal-delay-ps = <0>; 1049 iommus = <&ipmmu_ds0 16>; 1050 #address-cells = <1>; 1051 #size-cells = <0>; 1052 status = "disabled"; 1053 }; 1054 1055 can0: can@e6c30000 { 1056 compatible = "renesas,can-r8a77965", 1057 "renesas,rcar-gen3-can"; 1058 reg = <0 0xe6c30000 0 0x1000>; 1059 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1060 clocks = <&cpg CPG_MOD 916>, 1061 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1062 <&can_clk>; 1063 clock-names = "clkp1", "clkp2", "can_clk"; 1064 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1065 assigned-clock-rates = <40000000>; 1066 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1067 resets = <&cpg 916>; 1068 status = "disabled"; 1069 }; 1070 1071 can1: can@e6c38000 { 1072 compatible = "renesas,can-r8a77965", 1073 "renesas,rcar-gen3-can"; 1074 reg = <0 0xe6c38000 0 0x1000>; 1075 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1076 clocks = <&cpg CPG_MOD 915>, 1077 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1078 <&can_clk>; 1079 clock-names = "clkp1", "clkp2", "can_clk"; 1080 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1081 assigned-clock-rates = <40000000>; 1082 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1083 resets = <&cpg 915>; 1084 status = "disabled"; 1085 }; 1086 1087 canfd: can@e66c0000 { 1088 compatible = "renesas,r8a77965-canfd", 1089 "renesas,rcar-gen3-canfd"; 1090 reg = <0 0xe66c0000 0 0x8000>; 1091 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1092 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1093 interrupt-names = "ch_int", "g_int"; 1094 clocks = <&cpg CPG_MOD 914>, 1095 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1096 <&can_clk>; 1097 clock-names = "fck", "canfd", "can_clk"; 1098 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1099 assigned-clock-rates = <40000000>; 1100 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1101 resets = <&cpg 914>; 1102 status = "disabled"; 1103 1104 channel0 { 1105 status = "disabled"; 1106 }; 1107 1108 channel1 { 1109 status = "disabled"; 1110 }; 1111 }; 1112 1113 pwm0: pwm@e6e30000 { 1114 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1115 reg = <0 0xe6e30000 0 8>; 1116 #pwm-cells = <2>; 1117 clocks = <&cpg CPG_MOD 523>; 1118 resets = <&cpg 523>; 1119 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1120 status = "disabled"; 1121 }; 1122 1123 pwm1: pwm@e6e31000 { 1124 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1125 reg = <0 0xe6e31000 0 8>; 1126 #pwm-cells = <2>; 1127 clocks = <&cpg CPG_MOD 523>; 1128 resets = <&cpg 523>; 1129 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1130 status = "disabled"; 1131 }; 1132 1133 pwm2: pwm@e6e32000 { 1134 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1135 reg = <0 0xe6e32000 0 8>; 1136 #pwm-cells = <2>; 1137 clocks = <&cpg CPG_MOD 523>; 1138 resets = <&cpg 523>; 1139 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1140 status = "disabled"; 1141 }; 1142 1143 pwm3: pwm@e6e33000 { 1144 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1145 reg = <0 0xe6e33000 0 8>; 1146 #pwm-cells = <2>; 1147 clocks = <&cpg CPG_MOD 523>; 1148 resets = <&cpg 523>; 1149 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1150 status = "disabled"; 1151 }; 1152 1153 pwm4: pwm@e6e34000 { 1154 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1155 reg = <0 0xe6e34000 0 8>; 1156 #pwm-cells = <2>; 1157 clocks = <&cpg CPG_MOD 523>; 1158 resets = <&cpg 523>; 1159 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1160 status = "disabled"; 1161 }; 1162 1163 pwm5: pwm@e6e35000 { 1164 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1165 reg = <0 0xe6e35000 0 8>; 1166 #pwm-cells = <2>; 1167 clocks = <&cpg CPG_MOD 523>; 1168 resets = <&cpg 523>; 1169 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1170 status = "disabled"; 1171 }; 1172 1173 pwm6: pwm@e6e36000 { 1174 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1175 reg = <0 0xe6e36000 0 8>; 1176 #pwm-cells = <2>; 1177 clocks = <&cpg CPG_MOD 523>; 1178 resets = <&cpg 523>; 1179 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1180 status = "disabled"; 1181 }; 1182 1183 scif0: serial@e6e60000 { 1184 compatible = "renesas,scif-r8a77965", 1185 "renesas,rcar-gen3-scif", "renesas,scif"; 1186 reg = <0 0xe6e60000 0 64>; 1187 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1188 clocks = <&cpg CPG_MOD 207>, 1189 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1190 <&scif_clk>; 1191 clock-names = "fck", "brg_int", "scif_clk"; 1192 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1193 <&dmac2 0x51>, <&dmac2 0x50>; 1194 dma-names = "tx", "rx", "tx", "rx"; 1195 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1196 resets = <&cpg 207>; 1197 status = "disabled"; 1198 }; 1199 1200 scif1: serial@e6e68000 { 1201 compatible = "renesas,scif-r8a77965", 1202 "renesas,rcar-gen3-scif", "renesas,scif"; 1203 reg = <0 0xe6e68000 0 64>; 1204 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1205 clocks = <&cpg CPG_MOD 206>, 1206 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1207 <&scif_clk>; 1208 clock-names = "fck", "brg_int", "scif_clk"; 1209 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1210 <&dmac2 0x53>, <&dmac2 0x52>; 1211 dma-names = "tx", "rx", "tx", "rx"; 1212 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1213 resets = <&cpg 206>; 1214 status = "disabled"; 1215 }; 1216 1217 scif2: serial@e6e88000 { 1218 compatible = "renesas,scif-r8a77965", 1219 "renesas,rcar-gen3-scif", "renesas,scif"; 1220 reg = <0 0xe6e88000 0 64>; 1221 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1222 clocks = <&cpg CPG_MOD 310>, 1223 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1224 <&scif_clk>; 1225 clock-names = "fck", "brg_int", "scif_clk"; 1226 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1227 <&dmac2 0x13>, <&dmac2 0x12>; 1228 dma-names = "tx", "rx", "tx", "rx"; 1229 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1230 resets = <&cpg 310>; 1231 status = "disabled"; 1232 }; 1233 1234 scif3: serial@e6c50000 { 1235 compatible = "renesas,scif-r8a77965", 1236 "renesas,rcar-gen3-scif", "renesas,scif"; 1237 reg = <0 0xe6c50000 0 64>; 1238 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1239 clocks = <&cpg CPG_MOD 204>, 1240 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1241 <&scif_clk>; 1242 clock-names = "fck", "brg_int", "scif_clk"; 1243 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1244 dma-names = "tx", "rx"; 1245 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1246 resets = <&cpg 204>; 1247 status = "disabled"; 1248 }; 1249 1250 scif4: serial@e6c40000 { 1251 compatible = "renesas,scif-r8a77965", 1252 "renesas,rcar-gen3-scif", "renesas,scif"; 1253 reg = <0 0xe6c40000 0 64>; 1254 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1255 clocks = <&cpg CPG_MOD 203>, 1256 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1257 <&scif_clk>; 1258 clock-names = "fck", "brg_int", "scif_clk"; 1259 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1260 dma-names = "tx", "rx"; 1261 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1262 resets = <&cpg 203>; 1263 status = "disabled"; 1264 }; 1265 1266 scif5: serial@e6f30000 { 1267 compatible = "renesas,scif-r8a77965", 1268 "renesas,rcar-gen3-scif", "renesas,scif"; 1269 reg = <0 0xe6f30000 0 64>; 1270 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1271 clocks = <&cpg CPG_MOD 202>, 1272 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1273 <&scif_clk>; 1274 clock-names = "fck", "brg_int", "scif_clk"; 1275 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1276 <&dmac2 0x5b>, <&dmac2 0x5a>; 1277 dma-names = "tx", "rx", "tx", "rx"; 1278 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1279 resets = <&cpg 202>; 1280 status = "disabled"; 1281 }; 1282 1283 tpu: pwm@e6e80000 { 1284 compatible = "renesas,tpu-r8a77965", "renesas,tpu"; 1285 reg = <0 0xe6e80000 0 0x148>; 1286 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1287 clocks = <&cpg CPG_MOD 304>; 1288 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1289 resets = <&cpg 304>; 1290 #pwm-cells = <3>; 1291 status = "disabled"; 1292 }; 1293 1294 msiof0: spi@e6e90000 { 1295 compatible = "renesas,msiof-r8a77965", 1296 "renesas,rcar-gen3-msiof"; 1297 reg = <0 0xe6e90000 0 0x0064>; 1298 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1299 clocks = <&cpg CPG_MOD 211>; 1300 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1301 <&dmac2 0x41>, <&dmac2 0x40>; 1302 dma-names = "tx", "rx", "tx", "rx"; 1303 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1304 resets = <&cpg 211>; 1305 #address-cells = <1>; 1306 #size-cells = <0>; 1307 status = "disabled"; 1308 }; 1309 1310 msiof1: spi@e6ea0000 { 1311 compatible = "renesas,msiof-r8a77965", 1312 "renesas,rcar-gen3-msiof"; 1313 reg = <0 0xe6ea0000 0 0x0064>; 1314 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1315 clocks = <&cpg CPG_MOD 210>; 1316 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1317 <&dmac2 0x43>, <&dmac2 0x42>; 1318 dma-names = "tx", "rx", "tx", "rx"; 1319 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1320 resets = <&cpg 210>; 1321 #address-cells = <1>; 1322 #size-cells = <0>; 1323 status = "disabled"; 1324 }; 1325 1326 msiof2: spi@e6c00000 { 1327 compatible = "renesas,msiof-r8a77965", 1328 "renesas,rcar-gen3-msiof"; 1329 reg = <0 0xe6c00000 0 0x0064>; 1330 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1331 clocks = <&cpg CPG_MOD 209>; 1332 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1333 dma-names = "tx", "rx"; 1334 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1335 resets = <&cpg 209>; 1336 #address-cells = <1>; 1337 #size-cells = <0>; 1338 status = "disabled"; 1339 }; 1340 1341 msiof3: spi@e6c10000 { 1342 compatible = "renesas,msiof-r8a77965", 1343 "renesas,rcar-gen3-msiof"; 1344 reg = <0 0xe6c10000 0 0x0064>; 1345 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1346 clocks = <&cpg CPG_MOD 208>; 1347 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1348 dma-names = "tx", "rx"; 1349 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1350 resets = <&cpg 208>; 1351 #address-cells = <1>; 1352 #size-cells = <0>; 1353 status = "disabled"; 1354 }; 1355 1356 vin0: video@e6ef0000 { 1357 compatible = "renesas,vin-r8a77965"; 1358 reg = <0 0xe6ef0000 0 0x1000>; 1359 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1360 clocks = <&cpg CPG_MOD 811>; 1361 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1362 resets = <&cpg 811>; 1363 renesas,id = <0>; 1364 status = "disabled"; 1365 1366 ports { 1367 #address-cells = <1>; 1368 #size-cells = <0>; 1369 1370 port@1 { 1371 #address-cells = <1>; 1372 #size-cells = <0>; 1373 1374 reg = <1>; 1375 1376 vin0csi20: endpoint@0 { 1377 reg = <0>; 1378 remote-endpoint = <&csi20vin0>; 1379 }; 1380 vin0csi40: endpoint@2 { 1381 reg = <2>; 1382 remote-endpoint = <&csi40vin0>; 1383 }; 1384 }; 1385 }; 1386 }; 1387 1388 vin1: video@e6ef1000 { 1389 compatible = "renesas,vin-r8a77965"; 1390 reg = <0 0xe6ef1000 0 0x1000>; 1391 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1392 clocks = <&cpg CPG_MOD 810>; 1393 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1394 resets = <&cpg 810>; 1395 renesas,id = <1>; 1396 status = "disabled"; 1397 1398 ports { 1399 #address-cells = <1>; 1400 #size-cells = <0>; 1401 1402 port@1 { 1403 #address-cells = <1>; 1404 #size-cells = <0>; 1405 1406 reg = <1>; 1407 1408 vin1csi20: endpoint@0 { 1409 reg = <0>; 1410 remote-endpoint = <&csi20vin1>; 1411 }; 1412 vin1csi40: endpoint@2 { 1413 reg = <2>; 1414 remote-endpoint = <&csi40vin1>; 1415 }; 1416 }; 1417 }; 1418 }; 1419 1420 vin2: video@e6ef2000 { 1421 compatible = "renesas,vin-r8a77965"; 1422 reg = <0 0xe6ef2000 0 0x1000>; 1423 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1424 clocks = <&cpg CPG_MOD 809>; 1425 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1426 resets = <&cpg 809>; 1427 renesas,id = <2>; 1428 status = "disabled"; 1429 1430 ports { 1431 #address-cells = <1>; 1432 #size-cells = <0>; 1433 1434 port@1 { 1435 #address-cells = <1>; 1436 #size-cells = <0>; 1437 1438 reg = <1>; 1439 1440 vin2csi20: endpoint@0 { 1441 reg = <0>; 1442 remote-endpoint = <&csi20vin2>; 1443 }; 1444 vin2csi40: endpoint@2 { 1445 reg = <2>; 1446 remote-endpoint = <&csi40vin2>; 1447 }; 1448 }; 1449 }; 1450 }; 1451 1452 vin3: video@e6ef3000 { 1453 compatible = "renesas,vin-r8a77965"; 1454 reg = <0 0xe6ef3000 0 0x1000>; 1455 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1456 clocks = <&cpg CPG_MOD 808>; 1457 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1458 resets = <&cpg 808>; 1459 renesas,id = <3>; 1460 status = "disabled"; 1461 1462 ports { 1463 #address-cells = <1>; 1464 #size-cells = <0>; 1465 1466 port@1 { 1467 #address-cells = <1>; 1468 #size-cells = <0>; 1469 1470 reg = <1>; 1471 1472 vin3csi20: endpoint@0 { 1473 reg = <0>; 1474 remote-endpoint = <&csi20vin3>; 1475 }; 1476 vin3csi40: endpoint@2 { 1477 reg = <2>; 1478 remote-endpoint = <&csi40vin3>; 1479 }; 1480 }; 1481 }; 1482 }; 1483 1484 vin4: video@e6ef4000 { 1485 compatible = "renesas,vin-r8a77965"; 1486 reg = <0 0xe6ef4000 0 0x1000>; 1487 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1488 clocks = <&cpg CPG_MOD 807>; 1489 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1490 resets = <&cpg 807>; 1491 renesas,id = <4>; 1492 status = "disabled"; 1493 1494 ports { 1495 #address-cells = <1>; 1496 #size-cells = <0>; 1497 1498 port@1 { 1499 #address-cells = <1>; 1500 #size-cells = <0>; 1501 1502 reg = <1>; 1503 1504 vin4csi20: endpoint@0 { 1505 reg = <0>; 1506 remote-endpoint = <&csi20vin4>; 1507 }; 1508 vin4csi40: endpoint@2 { 1509 reg = <2>; 1510 remote-endpoint = <&csi40vin4>; 1511 }; 1512 }; 1513 }; 1514 }; 1515 1516 vin5: video@e6ef5000 { 1517 compatible = "renesas,vin-r8a77965"; 1518 reg = <0 0xe6ef5000 0 0x1000>; 1519 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1520 clocks = <&cpg CPG_MOD 806>; 1521 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1522 resets = <&cpg 806>; 1523 renesas,id = <5>; 1524 status = "disabled"; 1525 1526 ports { 1527 #address-cells = <1>; 1528 #size-cells = <0>; 1529 1530 port@1 { 1531 #address-cells = <1>; 1532 #size-cells = <0>; 1533 1534 reg = <1>; 1535 1536 vin5csi20: endpoint@0 { 1537 reg = <0>; 1538 remote-endpoint = <&csi20vin5>; 1539 }; 1540 vin5csi40: endpoint@2 { 1541 reg = <2>; 1542 remote-endpoint = <&csi40vin5>; 1543 }; 1544 }; 1545 }; 1546 }; 1547 1548 vin6: video@e6ef6000 { 1549 compatible = "renesas,vin-r8a77965"; 1550 reg = <0 0xe6ef6000 0 0x1000>; 1551 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1552 clocks = <&cpg CPG_MOD 805>; 1553 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1554 resets = <&cpg 805>; 1555 renesas,id = <6>; 1556 status = "disabled"; 1557 1558 ports { 1559 #address-cells = <1>; 1560 #size-cells = <0>; 1561 1562 port@1 { 1563 #address-cells = <1>; 1564 #size-cells = <0>; 1565 1566 reg = <1>; 1567 1568 vin6csi20: endpoint@0 { 1569 reg = <0>; 1570 remote-endpoint = <&csi20vin6>; 1571 }; 1572 vin6csi40: endpoint@2 { 1573 reg = <2>; 1574 remote-endpoint = <&csi40vin6>; 1575 }; 1576 }; 1577 }; 1578 }; 1579 1580 vin7: video@e6ef7000 { 1581 compatible = "renesas,vin-r8a77965"; 1582 reg = <0 0xe6ef7000 0 0x1000>; 1583 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1584 clocks = <&cpg CPG_MOD 804>; 1585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1586 resets = <&cpg 804>; 1587 renesas,id = <7>; 1588 status = "disabled"; 1589 1590 ports { 1591 #address-cells = <1>; 1592 #size-cells = <0>; 1593 1594 port@1 { 1595 #address-cells = <1>; 1596 #size-cells = <0>; 1597 1598 reg = <1>; 1599 1600 vin7csi20: endpoint@0 { 1601 reg = <0>; 1602 remote-endpoint = <&csi20vin7>; 1603 }; 1604 vin7csi40: endpoint@2 { 1605 reg = <2>; 1606 remote-endpoint = <&csi40vin7>; 1607 }; 1608 }; 1609 }; 1610 }; 1611 1612 drif00: rif@e6f40000 { 1613 compatible = "renesas,r8a77965-drif", 1614 "renesas,rcar-gen3-drif"; 1615 reg = <0 0xe6f40000 0 0x84>; 1616 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1617 clocks = <&cpg CPG_MOD 515>; 1618 clock-names = "fck"; 1619 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1620 dma-names = "rx", "rx"; 1621 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1622 resets = <&cpg 515>; 1623 renesas,bonding = <&drif01>; 1624 status = "disabled"; 1625 }; 1626 1627 drif01: rif@e6f50000 { 1628 compatible = "renesas,r8a77965-drif", 1629 "renesas,rcar-gen3-drif"; 1630 reg = <0 0xe6f50000 0 0x84>; 1631 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1632 clocks = <&cpg CPG_MOD 514>; 1633 clock-names = "fck"; 1634 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1635 dma-names = "rx", "rx"; 1636 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1637 resets = <&cpg 514>; 1638 renesas,bonding = <&drif00>; 1639 status = "disabled"; 1640 }; 1641 1642 drif10: rif@e6f60000 { 1643 compatible = "renesas,r8a77965-drif", 1644 "renesas,rcar-gen3-drif"; 1645 reg = <0 0xe6f60000 0 0x84>; 1646 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1647 clocks = <&cpg CPG_MOD 513>; 1648 clock-names = "fck"; 1649 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1650 dma-names = "rx", "rx"; 1651 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1652 resets = <&cpg 513>; 1653 renesas,bonding = <&drif11>; 1654 status = "disabled"; 1655 }; 1656 1657 drif11: rif@e6f70000 { 1658 compatible = "renesas,r8a77965-drif", 1659 "renesas,rcar-gen3-drif"; 1660 reg = <0 0xe6f70000 0 0x84>; 1661 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1662 clocks = <&cpg CPG_MOD 512>; 1663 clock-names = "fck"; 1664 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1665 dma-names = "rx", "rx"; 1666 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1667 resets = <&cpg 512>; 1668 renesas,bonding = <&drif10>; 1669 status = "disabled"; 1670 }; 1671 1672 drif20: rif@e6f80000 { 1673 compatible = "renesas,r8a77965-drif", 1674 "renesas,rcar-gen3-drif"; 1675 reg = <0 0xe6f80000 0 0x84>; 1676 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1677 clocks = <&cpg CPG_MOD 511>; 1678 clock-names = "fck"; 1679 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1680 dma-names = "rx", "rx"; 1681 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1682 resets = <&cpg 511>; 1683 renesas,bonding = <&drif21>; 1684 status = "disabled"; 1685 }; 1686 1687 drif21: rif@e6f90000 { 1688 compatible = "renesas,r8a77965-drif", 1689 "renesas,rcar-gen3-drif"; 1690 reg = <0 0xe6f90000 0 0x84>; 1691 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1692 clocks = <&cpg CPG_MOD 510>; 1693 clock-names = "fck"; 1694 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1695 dma-names = "rx", "rx"; 1696 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1697 resets = <&cpg 510>; 1698 renesas,bonding = <&drif20>; 1699 status = "disabled"; 1700 }; 1701 1702 drif30: rif@e6fa0000 { 1703 compatible = "renesas,r8a77965-drif", 1704 "renesas,rcar-gen3-drif"; 1705 reg = <0 0xe6fa0000 0 0x84>; 1706 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1707 clocks = <&cpg CPG_MOD 509>; 1708 clock-names = "fck"; 1709 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1710 dma-names = "rx", "rx"; 1711 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1712 resets = <&cpg 509>; 1713 renesas,bonding = <&drif31>; 1714 status = "disabled"; 1715 }; 1716 1717 drif31: rif@e6fb0000 { 1718 compatible = "renesas,r8a77965-drif", 1719 "renesas,rcar-gen3-drif"; 1720 reg = <0 0xe6fb0000 0 0x84>; 1721 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1722 clocks = <&cpg CPG_MOD 508>; 1723 clock-names = "fck"; 1724 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1725 dma-names = "rx", "rx"; 1726 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1727 resets = <&cpg 508>; 1728 renesas,bonding = <&drif30>; 1729 status = "disabled"; 1730 }; 1731 1732 rcar_sound: sound@ec500000 { 1733 /* 1734 * #sound-dai-cells is required if simple-card 1735 * 1736 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1737 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1738 */ 1739 /* 1740 * #clock-cells is required for audio_clkout0/1/2/3 1741 * 1742 * clkout : #clock-cells = <0>; <&rcar_sound>; 1743 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1744 */ 1745 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; 1746 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1747 <0 0xec5a0000 0 0x100>, /* ADG */ 1748 <0 0xec540000 0 0x1000>, /* SSIU */ 1749 <0 0xec541000 0 0x280>, /* SSI */ 1750 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1751 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1752 1753 clocks = <&cpg CPG_MOD 1005>, 1754 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1755 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1756 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1757 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1758 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1759 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1760 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1761 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1762 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1763 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1764 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1765 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1766 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1767 <&audio_clk_a>, <&audio_clk_b>, 1768 <&audio_clk_c>, 1769 <&cpg CPG_CORE R8A77965_CLK_S0D4>; 1770 clock-names = "ssi-all", 1771 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1772 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1773 "ssi.1", "ssi.0", 1774 "src.9", "src.8", "src.7", "src.6", 1775 "src.5", "src.4", "src.3", "src.2", 1776 "src.1", "src.0", 1777 "mix.1", "mix.0", 1778 "ctu.1", "ctu.0", 1779 "dvc.0", "dvc.1", 1780 "clk_a", "clk_b", "clk_c", "clk_i"; 1781 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1782 resets = <&cpg 1005>, 1783 <&cpg 1006>, <&cpg 1007>, 1784 <&cpg 1008>, <&cpg 1009>, 1785 <&cpg 1010>, <&cpg 1011>, 1786 <&cpg 1012>, <&cpg 1013>, 1787 <&cpg 1014>, <&cpg 1015>; 1788 reset-names = "ssi-all", 1789 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1790 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1791 "ssi.1", "ssi.0"; 1792 status = "disabled"; 1793 1794 rcar_sound,dvc { 1795 dvc0: dvc-0 { 1796 dmas = <&audma1 0xbc>; 1797 dma-names = "tx"; 1798 }; 1799 dvc1: dvc-1 { 1800 dmas = <&audma1 0xbe>; 1801 dma-names = "tx"; 1802 }; 1803 }; 1804 1805 rcar_sound,mix { 1806 mix0: mix-0 { }; 1807 mix1: mix-1 { }; 1808 }; 1809 1810 rcar_sound,ctu { 1811 ctu00: ctu-0 { }; 1812 ctu01: ctu-1 { }; 1813 ctu02: ctu-2 { }; 1814 ctu03: ctu-3 { }; 1815 ctu10: ctu-4 { }; 1816 ctu11: ctu-5 { }; 1817 ctu12: ctu-6 { }; 1818 ctu13: ctu-7 { }; 1819 }; 1820 1821 rcar_sound,src { 1822 src0: src-0 { 1823 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1824 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1825 dma-names = "rx", "tx"; 1826 }; 1827 src1: src-1 { 1828 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1829 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1830 dma-names = "rx", "tx"; 1831 }; 1832 src2: src-2 { 1833 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1834 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1835 dma-names = "rx", "tx"; 1836 }; 1837 src3: src-3 { 1838 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1839 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1840 dma-names = "rx", "tx"; 1841 }; 1842 src4: src-4 { 1843 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1844 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1845 dma-names = "rx", "tx"; 1846 }; 1847 src5: src-5 { 1848 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1849 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1850 dma-names = "rx", "tx"; 1851 }; 1852 src6: src-6 { 1853 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1854 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1855 dma-names = "rx", "tx"; 1856 }; 1857 src7: src-7 { 1858 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1859 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1860 dma-names = "rx", "tx"; 1861 }; 1862 src8: src-8 { 1863 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1864 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1865 dma-names = "rx", "tx"; 1866 }; 1867 src9: src-9 { 1868 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1869 dmas = <&audma0 0x97>, <&audma1 0xba>; 1870 dma-names = "rx", "tx"; 1871 }; 1872 }; 1873 1874 rcar_sound,ssiu { 1875 ssiu00: ssiu-0 { 1876 dmas = <&audma0 0x15>, <&audma1 0x16>; 1877 dma-names = "rx", "tx"; 1878 }; 1879 ssiu01: ssiu-1 { 1880 dmas = <&audma0 0x35>, <&audma1 0x36>; 1881 dma-names = "rx", "tx"; 1882 }; 1883 ssiu02: ssiu-2 { 1884 dmas = <&audma0 0x37>, <&audma1 0x38>; 1885 dma-names = "rx", "tx"; 1886 }; 1887 ssiu03: ssiu-3 { 1888 dmas = <&audma0 0x47>, <&audma1 0x48>; 1889 dma-names = "rx", "tx"; 1890 }; 1891 ssiu04: ssiu-4 { 1892 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1893 dma-names = "rx", "tx"; 1894 }; 1895 ssiu05: ssiu-5 { 1896 dmas = <&audma0 0x43>, <&audma1 0x44>; 1897 dma-names = "rx", "tx"; 1898 }; 1899 ssiu06: ssiu-6 { 1900 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1901 dma-names = "rx", "tx"; 1902 }; 1903 ssiu07: ssiu-7 { 1904 dmas = <&audma0 0x53>, <&audma1 0x54>; 1905 dma-names = "rx", "tx"; 1906 }; 1907 ssiu10: ssiu-8 { 1908 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1909 dma-names = "rx", "tx"; 1910 }; 1911 ssiu11: ssiu-9 { 1912 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1913 dma-names = "rx", "tx"; 1914 }; 1915 ssiu12: ssiu-10 { 1916 dmas = <&audma0 0x57>, <&audma1 0x58>; 1917 dma-names = "rx", "tx"; 1918 }; 1919 ssiu13: ssiu-11 { 1920 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1921 dma-names = "rx", "tx"; 1922 }; 1923 ssiu14: ssiu-12 { 1924 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1925 dma-names = "rx", "tx"; 1926 }; 1927 ssiu15: ssiu-13 { 1928 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1929 dma-names = "rx", "tx"; 1930 }; 1931 ssiu16: ssiu-14 { 1932 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1933 dma-names = "rx", "tx"; 1934 }; 1935 ssiu17: ssiu-15 { 1936 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1937 dma-names = "rx", "tx"; 1938 }; 1939 ssiu20: ssiu-16 { 1940 dmas = <&audma0 0x63>, <&audma1 0x64>; 1941 dma-names = "rx", "tx"; 1942 }; 1943 ssiu21: ssiu-17 { 1944 dmas = <&audma0 0x67>, <&audma1 0x68>; 1945 dma-names = "rx", "tx"; 1946 }; 1947 ssiu22: ssiu-18 { 1948 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1949 dma-names = "rx", "tx"; 1950 }; 1951 ssiu23: ssiu-19 { 1952 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1953 dma-names = "rx", "tx"; 1954 }; 1955 ssiu24: ssiu-20 { 1956 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1957 dma-names = "rx", "tx"; 1958 }; 1959 ssiu25: ssiu-21 { 1960 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1961 dma-names = "rx", "tx"; 1962 }; 1963 ssiu26: ssiu-22 { 1964 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1965 dma-names = "rx", "tx"; 1966 }; 1967 ssiu27: ssiu-23 { 1968 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1969 dma-names = "rx", "tx"; 1970 }; 1971 ssiu30: ssiu-24 { 1972 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1973 dma-names = "rx", "tx"; 1974 }; 1975 ssiu31: ssiu-25 { 1976 dmas = <&audma0 0x21>, <&audma1 0x22>; 1977 dma-names = "rx", "tx"; 1978 }; 1979 ssiu32: ssiu-26 { 1980 dmas = <&audma0 0x23>, <&audma1 0x24>; 1981 dma-names = "rx", "tx"; 1982 }; 1983 ssiu33: ssiu-27 { 1984 dmas = <&audma0 0x25>, <&audma1 0x26>; 1985 dma-names = "rx", "tx"; 1986 }; 1987 ssiu34: ssiu-28 { 1988 dmas = <&audma0 0x27>, <&audma1 0x28>; 1989 dma-names = "rx", "tx"; 1990 }; 1991 ssiu35: ssiu-29 { 1992 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1993 dma-names = "rx", "tx"; 1994 }; 1995 ssiu36: ssiu-30 { 1996 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1997 dma-names = "rx", "tx"; 1998 }; 1999 ssiu37: ssiu-31 { 2000 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2001 dma-names = "rx", "tx"; 2002 }; 2003 ssiu40: ssiu-32 { 2004 dmas = <&audma0 0x71>, <&audma1 0x72>; 2005 dma-names = "rx", "tx"; 2006 }; 2007 ssiu41: ssiu-33 { 2008 dmas = <&audma0 0x17>, <&audma1 0x18>; 2009 dma-names = "rx", "tx"; 2010 }; 2011 ssiu42: ssiu-34 { 2012 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2013 dma-names = "rx", "tx"; 2014 }; 2015 ssiu43: ssiu-35 { 2016 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2017 dma-names = "rx", "tx"; 2018 }; 2019 ssiu44: ssiu-36 { 2020 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2021 dma-names = "rx", "tx"; 2022 }; 2023 ssiu45: ssiu-37 { 2024 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2025 dma-names = "rx", "tx"; 2026 }; 2027 ssiu46: ssiu-38 { 2028 dmas = <&audma0 0x31>, <&audma1 0x32>; 2029 dma-names = "rx", "tx"; 2030 }; 2031 ssiu47: ssiu-39 { 2032 dmas = <&audma0 0x33>, <&audma1 0x34>; 2033 dma-names = "rx", "tx"; 2034 }; 2035 ssiu50: ssiu-40 { 2036 dmas = <&audma0 0x73>, <&audma1 0x74>; 2037 dma-names = "rx", "tx"; 2038 }; 2039 ssiu60: ssiu-41 { 2040 dmas = <&audma0 0x75>, <&audma1 0x76>; 2041 dma-names = "rx", "tx"; 2042 }; 2043 ssiu70: ssiu-42 { 2044 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2045 dma-names = "rx", "tx"; 2046 }; 2047 ssiu80: ssiu-43 { 2048 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2049 dma-names = "rx", "tx"; 2050 }; 2051 ssiu90: ssiu-44 { 2052 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2053 dma-names = "rx", "tx"; 2054 }; 2055 ssiu91: ssiu-45 { 2056 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2057 dma-names = "rx", "tx"; 2058 }; 2059 ssiu92: ssiu-46 { 2060 dmas = <&audma0 0x81>, <&audma1 0x82>; 2061 dma-names = "rx", "tx"; 2062 }; 2063 ssiu93: ssiu-47 { 2064 dmas = <&audma0 0x83>, <&audma1 0x84>; 2065 dma-names = "rx", "tx"; 2066 }; 2067 ssiu94: ssiu-48 { 2068 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2069 dma-names = "rx", "tx"; 2070 }; 2071 ssiu95: ssiu-49 { 2072 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2073 dma-names = "rx", "tx"; 2074 }; 2075 ssiu96: ssiu-50 { 2076 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2077 dma-names = "rx", "tx"; 2078 }; 2079 ssiu97: ssiu-51 { 2080 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2081 dma-names = "rx", "tx"; 2082 }; 2083 }; 2084 2085 rcar_sound,ssi { 2086 ssi0: ssi-0 { 2087 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2088 dmas = <&audma0 0x01>, <&audma1 0x02>; 2089 dma-names = "rx", "tx"; 2090 }; 2091 ssi1: ssi-1 { 2092 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2093 dmas = <&audma0 0x03>, <&audma1 0x04>; 2094 dma-names = "rx", "tx"; 2095 }; 2096 ssi2: ssi-2 { 2097 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2098 dmas = <&audma0 0x05>, <&audma1 0x06>; 2099 dma-names = "rx", "tx"; 2100 }; 2101 ssi3: ssi-3 { 2102 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2103 dmas = <&audma0 0x07>, <&audma1 0x08>; 2104 dma-names = "rx", "tx"; 2105 }; 2106 ssi4: ssi-4 { 2107 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2108 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2109 dma-names = "rx", "tx"; 2110 }; 2111 ssi5: ssi-5 { 2112 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2113 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2114 dma-names = "rx", "tx"; 2115 }; 2116 ssi6: ssi-6 { 2117 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2118 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2119 dma-names = "rx", "tx"; 2120 }; 2121 ssi7: ssi-7 { 2122 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2123 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2124 dma-names = "rx", "tx"; 2125 }; 2126 ssi8: ssi-8 { 2127 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2128 dmas = <&audma0 0x11>, <&audma1 0x12>; 2129 dma-names = "rx", "tx"; 2130 }; 2131 ssi9: ssi-9 { 2132 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2133 dmas = <&audma0 0x13>, <&audma1 0x14>; 2134 dma-names = "rx", "tx"; 2135 }; 2136 }; 2137 }; 2138 2139 mlp: mlp@ec520000 { 2140 compatible = "renesas,r8a77965-mlp", 2141 "renesas,rcar-gen3-mlp"; 2142 reg = <0 0xec520000 0 0x800>; 2143 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2144 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2145 clocks = <&cpg CPG_MOD 802>; 2146 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2147 resets = <&cpg 802>; 2148 status = "disabled"; 2149 }; 2150 2151 audma0: dma-controller@ec700000 { 2152 compatible = "renesas,dmac-r8a77965", 2153 "renesas,rcar-dmac"; 2154 reg = <0 0xec700000 0 0x10000>; 2155 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2156 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2157 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2158 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2159 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2160 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2161 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2162 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2163 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2164 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2165 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2166 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2167 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2168 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2169 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2170 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2171 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2172 interrupt-names = "error", 2173 "ch0", "ch1", "ch2", "ch3", 2174 "ch4", "ch5", "ch6", "ch7", 2175 "ch8", "ch9", "ch10", "ch11", 2176 "ch12", "ch13", "ch14", "ch15"; 2177 clocks = <&cpg CPG_MOD 502>; 2178 clock-names = "fck"; 2179 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2180 resets = <&cpg 502>; 2181 #dma-cells = <1>; 2182 dma-channels = <16>; 2183 }; 2184 2185 audma1: dma-controller@ec720000 { 2186 compatible = "renesas,dmac-r8a77965", 2187 "renesas,rcar-dmac"; 2188 reg = <0 0xec720000 0 0x10000>; 2189 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2190 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2191 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2192 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2193 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2194 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2195 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2196 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2197 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2198 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2199 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2200 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2201 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2202 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2203 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2204 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2205 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2206 interrupt-names = "error", 2207 "ch0", "ch1", "ch2", "ch3", 2208 "ch4", "ch5", "ch6", "ch7", 2209 "ch8", "ch9", "ch10", "ch11", 2210 "ch12", "ch13", "ch14", "ch15"; 2211 clocks = <&cpg CPG_MOD 501>; 2212 clock-names = "fck"; 2213 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2214 resets = <&cpg 501>; 2215 #dma-cells = <1>; 2216 dma-channels = <16>; 2217 }; 2218 2219 xhci0: usb@ee000000 { 2220 compatible = "renesas,xhci-r8a77965", 2221 "renesas,rcar-gen3-xhci"; 2222 reg = <0 0xee000000 0 0xc00>; 2223 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2224 clocks = <&cpg CPG_MOD 328>; 2225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2226 resets = <&cpg 328>; 2227 status = "disabled"; 2228 }; 2229 2230 usb3_peri0: usb@ee020000 { 2231 compatible = "renesas,r8a77965-usb3-peri", 2232 "renesas,rcar-gen3-usb3-peri"; 2233 reg = <0 0xee020000 0 0x400>; 2234 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2235 clocks = <&cpg CPG_MOD 328>; 2236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2237 resets = <&cpg 328>; 2238 status = "disabled"; 2239 }; 2240 2241 ohci0: usb@ee080000 { 2242 compatible = "generic-ohci"; 2243 reg = <0 0xee080000 0 0x100>; 2244 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2245 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2246 phys = <&usb2_phy0 1>; 2247 phy-names = "usb"; 2248 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2249 resets = <&cpg 703>, <&cpg 704>; 2250 status = "disabled"; 2251 }; 2252 2253 ohci1: usb@ee0a0000 { 2254 compatible = "generic-ohci"; 2255 reg = <0 0xee0a0000 0 0x100>; 2256 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2257 clocks = <&cpg CPG_MOD 702>; 2258 phys = <&usb2_phy1 1>; 2259 phy-names = "usb"; 2260 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2261 resets = <&cpg 702>; 2262 status = "disabled"; 2263 }; 2264 2265 ehci0: usb@ee080100 { 2266 compatible = "generic-ehci"; 2267 reg = <0 0xee080100 0 0x100>; 2268 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2269 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2270 phys = <&usb2_phy0 2>; 2271 phy-names = "usb"; 2272 companion = <&ohci0>; 2273 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2274 resets = <&cpg 703>, <&cpg 704>; 2275 status = "disabled"; 2276 }; 2277 2278 ehci1: usb@ee0a0100 { 2279 compatible = "generic-ehci"; 2280 reg = <0 0xee0a0100 0 0x100>; 2281 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2282 clocks = <&cpg CPG_MOD 702>; 2283 phys = <&usb2_phy1 2>; 2284 phy-names = "usb"; 2285 companion = <&ohci1>; 2286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2287 resets = <&cpg 702>; 2288 status = "disabled"; 2289 }; 2290 2291 usb2_phy0: usb-phy@ee080200 { 2292 compatible = "renesas,usb2-phy-r8a77965", 2293 "renesas,rcar-gen3-usb2-phy"; 2294 reg = <0 0xee080200 0 0x700>; 2295 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2296 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2297 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2298 resets = <&cpg 703>, <&cpg 704>; 2299 #phy-cells = <1>; 2300 status = "disabled"; 2301 }; 2302 2303 usb2_phy1: usb-phy@ee0a0200 { 2304 compatible = "renesas,usb2-phy-r8a77965", 2305 "renesas,rcar-gen3-usb2-phy"; 2306 reg = <0 0xee0a0200 0 0x700>; 2307 clocks = <&cpg CPG_MOD 702>; 2308 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2309 resets = <&cpg 702>; 2310 #phy-cells = <1>; 2311 status = "disabled"; 2312 }; 2313 2314 sdhi0: mmc@ee100000 { 2315 compatible = "renesas,sdhi-r8a77965", 2316 "renesas,rcar-gen3-sdhi"; 2317 reg = <0 0xee100000 0 0x2000>; 2318 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2319 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>; 2320 clock-names = "core", "clkh"; 2321 max-frequency = <200000000>; 2322 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2323 resets = <&cpg 314>; 2324 iommus = <&ipmmu_ds1 32>; 2325 status = "disabled"; 2326 }; 2327 2328 sdhi1: mmc@ee120000 { 2329 compatible = "renesas,sdhi-r8a77965", 2330 "renesas,rcar-gen3-sdhi"; 2331 reg = <0 0xee120000 0 0x2000>; 2332 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2333 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>; 2334 clock-names = "core", "clkh"; 2335 max-frequency = <200000000>; 2336 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2337 resets = <&cpg 313>; 2338 iommus = <&ipmmu_ds1 33>; 2339 status = "disabled"; 2340 }; 2341 2342 sdhi2: mmc@ee140000 { 2343 compatible = "renesas,sdhi-r8a77965", 2344 "renesas,rcar-gen3-sdhi"; 2345 reg = <0 0xee140000 0 0x2000>; 2346 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2347 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>; 2348 clock-names = "core", "clkh"; 2349 max-frequency = <200000000>; 2350 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2351 resets = <&cpg 312>; 2352 iommus = <&ipmmu_ds1 34>; 2353 status = "disabled"; 2354 }; 2355 2356 sdhi3: mmc@ee160000 { 2357 compatible = "renesas,sdhi-r8a77965", 2358 "renesas,rcar-gen3-sdhi"; 2359 reg = <0 0xee160000 0 0x2000>; 2360 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2361 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>; 2362 clock-names = "core", "clkh"; 2363 max-frequency = <200000000>; 2364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2365 resets = <&cpg 311>; 2366 iommus = <&ipmmu_ds1 35>; 2367 status = "disabled"; 2368 }; 2369 2370 rpc: spi@ee200000 { 2371 compatible = "renesas,r8a77965-rpc-if", 2372 "renesas,rcar-gen3-rpc-if"; 2373 reg = <0 0xee200000 0 0x200>, 2374 <0 0x08000000 0 0x04000000>, 2375 <0 0xee208000 0 0x100>; 2376 reg-names = "regs", "dirmap", "wbuf"; 2377 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2378 clocks = <&cpg CPG_MOD 917>; 2379 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2380 resets = <&cpg 917>; 2381 #address-cells = <1>; 2382 #size-cells = <0>; 2383 status = "disabled"; 2384 }; 2385 2386 sata: sata@ee300000 { 2387 compatible = "renesas,sata-r8a77965", 2388 "renesas,rcar-gen3-sata"; 2389 reg = <0 0xee300000 0 0x200000>; 2390 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2391 clocks = <&cpg CPG_MOD 815>; 2392 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2393 resets = <&cpg 815>; 2394 status = "disabled"; 2395 }; 2396 2397 gic: interrupt-controller@f1010000 { 2398 compatible = "arm,gic-400"; 2399 #interrupt-cells = <3>; 2400 #address-cells = <0>; 2401 interrupt-controller; 2402 reg = <0x0 0xf1010000 0 0x1000>, 2403 <0x0 0xf1020000 0 0x20000>, 2404 <0x0 0xf1040000 0 0x20000>, 2405 <0x0 0xf1060000 0 0x20000>; 2406 interrupts = <GIC_PPI 9 2407 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2408 clocks = <&cpg CPG_MOD 408>; 2409 clock-names = "clk"; 2410 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2411 resets = <&cpg 408>; 2412 }; 2413 2414 pciec0: pcie@fe000000 { 2415 compatible = "renesas,pcie-r8a77965", 2416 "renesas,pcie-rcar-gen3"; 2417 reg = <0 0xfe000000 0 0x80000>; 2418 #address-cells = <3>; 2419 #size-cells = <2>; 2420 bus-range = <0x00 0xff>; 2421 device_type = "pci"; 2422 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2423 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2424 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2425 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2426 /* Map all possible DDR as inbound ranges */ 2427 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2428 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2429 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2430 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2431 #interrupt-cells = <1>; 2432 interrupt-map-mask = <0 0 0 0>; 2433 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2434 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2435 clock-names = "pcie", "pcie_bus"; 2436 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2437 resets = <&cpg 319>; 2438 status = "disabled"; 2439 }; 2440 2441 pciec1: pcie@ee800000 { 2442 compatible = "renesas,pcie-r8a77965", 2443 "renesas,pcie-rcar-gen3"; 2444 reg = <0 0xee800000 0 0x80000>; 2445 #address-cells = <3>; 2446 #size-cells = <2>; 2447 bus-range = <0x00 0xff>; 2448 device_type = "pci"; 2449 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2450 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2451 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2452 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2453 /* Map all possible DDR as inbound ranges */ 2454 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2455 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2456 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2457 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2458 #interrupt-cells = <1>; 2459 interrupt-map-mask = <0 0 0 0>; 2460 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2461 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2462 clock-names = "pcie", "pcie_bus"; 2463 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2464 resets = <&cpg 318>; 2465 status = "disabled"; 2466 }; 2467 2468 fdp1@fe940000 { 2469 compatible = "renesas,fdp1"; 2470 reg = <0 0xfe940000 0 0x2400>; 2471 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2472 clocks = <&cpg CPG_MOD 119>; 2473 power-domains = <&sysc R8A77965_PD_A3VP>; 2474 resets = <&cpg 119>; 2475 renesas,fcp = <&fcpf0>; 2476 }; 2477 2478 fcpf0: fcp@fe950000 { 2479 compatible = "renesas,fcpf"; 2480 reg = <0 0xfe950000 0 0x200>; 2481 clocks = <&cpg CPG_MOD 615>; 2482 power-domains = <&sysc R8A77965_PD_A3VP>; 2483 resets = <&cpg 615>; 2484 }; 2485 2486 vspb: vsp@fe960000 { 2487 compatible = "renesas,vsp2"; 2488 reg = <0 0xfe960000 0 0x8000>; 2489 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2490 clocks = <&cpg CPG_MOD 626>; 2491 power-domains = <&sysc R8A77965_PD_A3VP>; 2492 resets = <&cpg 626>; 2493 2494 renesas,fcp = <&fcpvb0>; 2495 }; 2496 2497 vspi0: vsp@fe9a0000 { 2498 compatible = "renesas,vsp2"; 2499 reg = <0 0xfe9a0000 0 0x8000>; 2500 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2501 clocks = <&cpg CPG_MOD 631>; 2502 power-domains = <&sysc R8A77965_PD_A3VP>; 2503 resets = <&cpg 631>; 2504 2505 renesas,fcp = <&fcpvi0>; 2506 }; 2507 2508 vspd0: vsp@fea20000 { 2509 compatible = "renesas,vsp2"; 2510 reg = <0 0xfea20000 0 0x5000>; 2511 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2512 clocks = <&cpg CPG_MOD 623>; 2513 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2514 resets = <&cpg 623>; 2515 2516 renesas,fcp = <&fcpvd0>; 2517 }; 2518 2519 vspd1: vsp@fea28000 { 2520 compatible = "renesas,vsp2"; 2521 reg = <0 0xfea28000 0 0x5000>; 2522 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2523 clocks = <&cpg CPG_MOD 622>; 2524 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2525 resets = <&cpg 622>; 2526 2527 renesas,fcp = <&fcpvd1>; 2528 }; 2529 2530 fcpvb0: fcp@fe96f000 { 2531 compatible = "renesas,fcpv"; 2532 reg = <0 0xfe96f000 0 0x200>; 2533 clocks = <&cpg CPG_MOD 607>; 2534 power-domains = <&sysc R8A77965_PD_A3VP>; 2535 resets = <&cpg 607>; 2536 }; 2537 2538 fcpvd0: fcp@fea27000 { 2539 compatible = "renesas,fcpv"; 2540 reg = <0 0xfea27000 0 0x200>; 2541 clocks = <&cpg CPG_MOD 603>; 2542 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2543 resets = <&cpg 603>; 2544 }; 2545 2546 fcpvd1: fcp@fea2f000 { 2547 compatible = "renesas,fcpv"; 2548 reg = <0 0xfea2f000 0 0x200>; 2549 clocks = <&cpg CPG_MOD 602>; 2550 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2551 resets = <&cpg 602>; 2552 }; 2553 2554 fcpvi0: fcp@fe9af000 { 2555 compatible = "renesas,fcpv"; 2556 reg = <0 0xfe9af000 0 0x200>; 2557 clocks = <&cpg CPG_MOD 611>; 2558 power-domains = <&sysc R8A77965_PD_A3VP>; 2559 resets = <&cpg 611>; 2560 }; 2561 2562 cmm0: cmm@fea40000 { 2563 compatible = "renesas,r8a77965-cmm", 2564 "renesas,rcar-gen3-cmm"; 2565 reg = <0 0xfea40000 0 0x1000>; 2566 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2567 clocks = <&cpg CPG_MOD 711>; 2568 resets = <&cpg 711>; 2569 }; 2570 2571 cmm1: cmm@fea50000 { 2572 compatible = "renesas,r8a77965-cmm", 2573 "renesas,rcar-gen3-cmm"; 2574 reg = <0 0xfea50000 0 0x1000>; 2575 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2576 clocks = <&cpg CPG_MOD 710>; 2577 resets = <&cpg 710>; 2578 }; 2579 2580 cmm3: cmm@fea70000 { 2581 compatible = "renesas,r8a77965-cmm", 2582 "renesas,rcar-gen3-cmm"; 2583 reg = <0 0xfea70000 0 0x1000>; 2584 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2585 clocks = <&cpg CPG_MOD 708>; 2586 resets = <&cpg 708>; 2587 }; 2588 2589 csi20: csi2@fea80000 { 2590 compatible = "renesas,r8a77965-csi2"; 2591 reg = <0 0xfea80000 0 0x10000>; 2592 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2593 clocks = <&cpg CPG_MOD 714>; 2594 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2595 resets = <&cpg 714>; 2596 status = "disabled"; 2597 2598 ports { 2599 #address-cells = <1>; 2600 #size-cells = <0>; 2601 2602 port@0 { 2603 reg = <0>; 2604 }; 2605 2606 port@1 { 2607 #address-cells = <1>; 2608 #size-cells = <0>; 2609 2610 reg = <1>; 2611 2612 csi20vin0: endpoint@0 { 2613 reg = <0>; 2614 remote-endpoint = <&vin0csi20>; 2615 }; 2616 csi20vin1: endpoint@1 { 2617 reg = <1>; 2618 remote-endpoint = <&vin1csi20>; 2619 }; 2620 csi20vin2: endpoint@2 { 2621 reg = <2>; 2622 remote-endpoint = <&vin2csi20>; 2623 }; 2624 csi20vin3: endpoint@3 { 2625 reg = <3>; 2626 remote-endpoint = <&vin3csi20>; 2627 }; 2628 csi20vin4: endpoint@4 { 2629 reg = <4>; 2630 remote-endpoint = <&vin4csi20>; 2631 }; 2632 csi20vin5: endpoint@5 { 2633 reg = <5>; 2634 remote-endpoint = <&vin5csi20>; 2635 }; 2636 csi20vin6: endpoint@6 { 2637 reg = <6>; 2638 remote-endpoint = <&vin6csi20>; 2639 }; 2640 csi20vin7: endpoint@7 { 2641 reg = <7>; 2642 remote-endpoint = <&vin7csi20>; 2643 }; 2644 }; 2645 }; 2646 }; 2647 2648 csi40: csi2@feaa0000 { 2649 compatible = "renesas,r8a77965-csi2"; 2650 reg = <0 0xfeaa0000 0 0x10000>; 2651 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2652 clocks = <&cpg CPG_MOD 716>; 2653 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2654 resets = <&cpg 716>; 2655 status = "disabled"; 2656 2657 ports { 2658 #address-cells = <1>; 2659 #size-cells = <0>; 2660 2661 port@0 { 2662 reg = <0>; 2663 }; 2664 2665 port@1 { 2666 #address-cells = <1>; 2667 #size-cells = <0>; 2668 2669 reg = <1>; 2670 2671 csi40vin0: endpoint@0 { 2672 reg = <0>; 2673 remote-endpoint = <&vin0csi40>; 2674 }; 2675 csi40vin1: endpoint@1 { 2676 reg = <1>; 2677 remote-endpoint = <&vin1csi40>; 2678 }; 2679 csi40vin2: endpoint@2 { 2680 reg = <2>; 2681 remote-endpoint = <&vin2csi40>; 2682 }; 2683 csi40vin3: endpoint@3 { 2684 reg = <3>; 2685 remote-endpoint = <&vin3csi40>; 2686 }; 2687 csi40vin4: endpoint@4 { 2688 reg = <4>; 2689 remote-endpoint = <&vin4csi40>; 2690 }; 2691 csi40vin5: endpoint@5 { 2692 reg = <5>; 2693 remote-endpoint = <&vin5csi40>; 2694 }; 2695 csi40vin6: endpoint@6 { 2696 reg = <6>; 2697 remote-endpoint = <&vin6csi40>; 2698 }; 2699 csi40vin7: endpoint@7 { 2700 reg = <7>; 2701 remote-endpoint = <&vin7csi40>; 2702 }; 2703 }; 2704 }; 2705 }; 2706 2707 hdmi0: hdmi@fead0000 { 2708 compatible = "renesas,r8a77965-hdmi", 2709 "renesas,rcar-gen3-hdmi"; 2710 reg = <0 0xfead0000 0 0x10000>; 2711 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2712 clocks = <&cpg CPG_MOD 729>, 2713 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 2714 clock-names = "iahb", "isfr"; 2715 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2716 resets = <&cpg 729>; 2717 status = "disabled"; 2718 2719 ports { 2720 #address-cells = <1>; 2721 #size-cells = <0>; 2722 port@0 { 2723 reg = <0>; 2724 dw_hdmi0_in: endpoint { 2725 remote-endpoint = <&du_out_hdmi0>; 2726 }; 2727 }; 2728 port@1 { 2729 reg = <1>; 2730 }; 2731 }; 2732 }; 2733 2734 du: display@feb00000 { 2735 compatible = "renesas,du-r8a77965"; 2736 reg = <0 0xfeb00000 0 0x80000>; 2737 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2738 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2739 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2740 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2741 <&cpg CPG_MOD 721>; 2742 clock-names = "du.0", "du.1", "du.3"; 2743 resets = <&cpg 724>, <&cpg 722>; 2744 reset-names = "du.0", "du.3"; 2745 2746 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>; 2747 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2748 2749 status = "disabled"; 2750 2751 ports { 2752 #address-cells = <1>; 2753 #size-cells = <0>; 2754 2755 port@0 { 2756 reg = <0>; 2757 }; 2758 port@1 { 2759 reg = <1>; 2760 du_out_hdmi0: endpoint { 2761 remote-endpoint = <&dw_hdmi0_in>; 2762 }; 2763 }; 2764 port@2 { 2765 reg = <2>; 2766 du_out_lvds0: endpoint { 2767 remote-endpoint = <&lvds0_in>; 2768 }; 2769 }; 2770 }; 2771 }; 2772 2773 lvds0: lvds@feb90000 { 2774 compatible = "renesas,r8a77965-lvds"; 2775 reg = <0 0xfeb90000 0 0x14>; 2776 clocks = <&cpg CPG_MOD 727>; 2777 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2778 resets = <&cpg 727>; 2779 status = "disabled"; 2780 2781 ports { 2782 #address-cells = <1>; 2783 #size-cells = <0>; 2784 2785 port@0 { 2786 reg = <0>; 2787 lvds0_in: endpoint { 2788 remote-endpoint = <&du_out_lvds0>; 2789 }; 2790 }; 2791 port@1 { 2792 reg = <1>; 2793 }; 2794 }; 2795 }; 2796 2797 prr: chipid@fff00044 { 2798 compatible = "renesas,prr"; 2799 reg = <0 0xfff00044 0 4>; 2800 }; 2801 }; 2802 2803 thermal-zones { 2804 sensor1_thermal: sensor1-thermal { 2805 polling-delay-passive = <250>; 2806 polling-delay = <1000>; 2807 thermal-sensors = <&tsc 0>; 2808 sustainable-power = <2439>; 2809 2810 trips { 2811 sensor1_crit: sensor1-crit { 2812 temperature = <120000>; 2813 hysteresis = <1000>; 2814 type = "critical"; 2815 }; 2816 }; 2817 }; 2818 2819 sensor2_thermal: sensor2-thermal { 2820 polling-delay-passive = <250>; 2821 polling-delay = <1000>; 2822 thermal-sensors = <&tsc 1>; 2823 sustainable-power = <2439>; 2824 2825 trips { 2826 sensor2_crit: sensor2-crit { 2827 temperature = <120000>; 2828 hysteresis = <1000>; 2829 type = "critical"; 2830 }; 2831 }; 2832 }; 2833 2834 sensor3_thermal: sensor3-thermal { 2835 polling-delay-passive = <250>; 2836 polling-delay = <1000>; 2837 thermal-sensors = <&tsc 2>; 2838 sustainable-power = <2439>; 2839 2840 trips { 2841 target: trip-point1 { 2842 /* miliCelsius */ 2843 temperature = <100000>; 2844 hysteresis = <1000>; 2845 type = "passive"; 2846 }; 2847 2848 sensor3_crit: sensor3-crit { 2849 temperature = <120000>; 2850 hysteresis = <1000>; 2851 type = "critical"; 2852 }; 2853 }; 2854 2855 cooling-maps { 2856 map0 { 2857 trip = <&target>; 2858 cooling-device = <&a57_0 2 4>; 2859 contribution = <1024>; 2860 }; 2861 }; 2862 }; 2863 }; 2864 2865 timer { 2866 compatible = "arm,armv8-timer"; 2867 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2868 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2869 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2870 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2871 }; 2872 2873 /* External USB clocks - can be overridden by the board */ 2874 usb3s0_clk: usb3s0 { 2875 compatible = "fixed-clock"; 2876 #clock-cells = <0>; 2877 clock-frequency = <0>; 2878 }; 2879 2880 usb_extal_clk: usb_extal { 2881 compatible = "fixed-clock"; 2882 #clock-cells = <0>; 2883 clock-frequency = <0>; 2884 }; 2885}; 2886