1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clk_a: audio_clk_a { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 44 audio_clk_b: audio_clk_b { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 audio_clk_c: audio_clk_c { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock - to be overridden by boards that provide it */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 63 cluster0_opp: opp_table0 { 64 compatible = "operating-points-v2"; 65 opp-shared; 66 67 opp-500000000 { 68 opp-hz = /bits/ 64 <500000000>; 69 opp-microvolt = <830000>; 70 clock-latency-ns = <300000>; 71 }; 72 opp-1000000000 { 73 opp-hz = /bits/ 64 <1000000000>; 74 opp-microvolt = <830000>; 75 clock-latency-ns = <300000>; 76 }; 77 opp-1500000000 { 78 opp-hz = /bits/ 64 <1500000000>; 79 opp-microvolt = <830000>; 80 clock-latency-ns = <300000>; 81 opp-suspend; 82 }; 83 opp-1600000000 { 84 opp-hz = /bits/ 64 <1600000000>; 85 opp-microvolt = <900000>; 86 clock-latency-ns = <300000>; 87 turbo-mode; 88 }; 89 opp-1700000000 { 90 opp-hz = /bits/ 64 <1700000000>; 91 opp-microvolt = <900000>; 92 clock-latency-ns = <300000>; 93 turbo-mode; 94 }; 95 opp-1800000000 { 96 opp-hz = /bits/ 64 <1800000000>; 97 opp-microvolt = <960000>; 98 clock-latency-ns = <300000>; 99 turbo-mode; 100 }; 101 }; 102 103 cpus { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 a57_0: cpu@0 { 108 compatible = "arm,cortex-a57"; 109 reg = <0x0>; 110 device_type = "cpu"; 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 112 next-level-cache = <&L2_CA57>; 113 enable-method = "psci"; 114 cpu-idle-states = <&CPU_SLEEP_0>; 115 #cooling-cells = <2>; 116 dynamic-power-coefficient = <854>; 117 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 118 operating-points-v2 = <&cluster0_opp>; 119 }; 120 121 a57_1: cpu@1 { 122 compatible = "arm,cortex-a57"; 123 reg = <0x1>; 124 device_type = "cpu"; 125 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 126 next-level-cache = <&L2_CA57>; 127 enable-method = "psci"; 128 cpu-idle-states = <&CPU_SLEEP_0>; 129 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 130 operating-points-v2 = <&cluster0_opp>; 131 }; 132 133 L2_CA57: cache-controller-0 { 134 compatible = "cache"; 135 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 136 cache-unified; 137 cache-level = <2>; 138 }; 139 140 idle-states { 141 entry-method = "psci"; 142 143 CPU_SLEEP_0: cpu-sleep-0 { 144 compatible = "arm,idle-state"; 145 arm,psci-suspend-param = <0x0010000>; 146 local-timer-stop; 147 entry-latency-us = <400>; 148 exit-latency-us = <500>; 149 min-residency-us = <4000>; 150 }; 151 }; 152 }; 153 154 extal_clk: extal { 155 compatible = "fixed-clock"; 156 #clock-cells = <0>; 157 /* This value must be overridden by the board */ 158 clock-frequency = <0>; 159 }; 160 161 extalr_clk: extalr { 162 compatible = "fixed-clock"; 163 #clock-cells = <0>; 164 /* This value must be overridden by the board */ 165 clock-frequency = <0>; 166 }; 167 168 /* External PCIe clock - can be overridden by the board */ 169 pcie_bus_clk: pcie_bus { 170 compatible = "fixed-clock"; 171 #clock-cells = <0>; 172 clock-frequency = <0>; 173 }; 174 175 pmu_a57 { 176 compatible = "arm,cortex-a57-pmu"; 177 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 178 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 179 interrupt-affinity = <&a57_0>, 180 <&a57_1>; 181 }; 182 183 psci { 184 compatible = "arm,psci-1.0", "arm,psci-0.2"; 185 method = "smc"; 186 }; 187 188 /* External SCIF clock - to be overridden by boards that provide it */ 189 scif_clk: scif { 190 compatible = "fixed-clock"; 191 #clock-cells = <0>; 192 clock-frequency = <0>; 193 }; 194 195 soc { 196 compatible = "simple-bus"; 197 interrupt-parent = <&gic>; 198 #address-cells = <2>; 199 #size-cells = <2>; 200 ranges; 201 202 rwdt: watchdog@e6020000 { 203 compatible = "renesas,r8a77965-wdt", 204 "renesas,rcar-gen3-wdt"; 205 reg = <0 0xe6020000 0 0x0c>; 206 clocks = <&cpg CPG_MOD 402>; 207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 208 resets = <&cpg 402>; 209 status = "disabled"; 210 }; 211 212 gpio0: gpio@e6050000 { 213 compatible = "renesas,gpio-r8a77965", 214 "renesas,rcar-gen3-gpio"; 215 reg = <0 0xe6050000 0 0x50>; 216 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 217 #gpio-cells = <2>; 218 gpio-controller; 219 gpio-ranges = <&pfc 0 0 16>; 220 #interrupt-cells = <2>; 221 interrupt-controller; 222 clocks = <&cpg CPG_MOD 912>; 223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 224 resets = <&cpg 912>; 225 }; 226 227 gpio1: gpio@e6051000 { 228 compatible = "renesas,gpio-r8a77965", 229 "renesas,rcar-gen3-gpio"; 230 reg = <0 0xe6051000 0 0x50>; 231 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 232 #gpio-cells = <2>; 233 gpio-controller; 234 gpio-ranges = <&pfc 0 32 29>; 235 #interrupt-cells = <2>; 236 interrupt-controller; 237 clocks = <&cpg CPG_MOD 911>; 238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 239 resets = <&cpg 911>; 240 }; 241 242 gpio2: gpio@e6052000 { 243 compatible = "renesas,gpio-r8a77965", 244 "renesas,rcar-gen3-gpio"; 245 reg = <0 0xe6052000 0 0x50>; 246 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 247 #gpio-cells = <2>; 248 gpio-controller; 249 gpio-ranges = <&pfc 0 64 15>; 250 #interrupt-cells = <2>; 251 interrupt-controller; 252 clocks = <&cpg CPG_MOD 910>; 253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 254 resets = <&cpg 910>; 255 }; 256 257 gpio3: gpio@e6053000 { 258 compatible = "renesas,gpio-r8a77965", 259 "renesas,rcar-gen3-gpio"; 260 reg = <0 0xe6053000 0 0x50>; 261 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 262 #gpio-cells = <2>; 263 gpio-controller; 264 gpio-ranges = <&pfc 0 96 16>; 265 #interrupt-cells = <2>; 266 interrupt-controller; 267 clocks = <&cpg CPG_MOD 909>; 268 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 269 resets = <&cpg 909>; 270 }; 271 272 gpio4: gpio@e6054000 { 273 compatible = "renesas,gpio-r8a77965", 274 "renesas,rcar-gen3-gpio"; 275 reg = <0 0xe6054000 0 0x50>; 276 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 277 #gpio-cells = <2>; 278 gpio-controller; 279 gpio-ranges = <&pfc 0 128 18>; 280 #interrupt-cells = <2>; 281 interrupt-controller; 282 clocks = <&cpg CPG_MOD 908>; 283 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 284 resets = <&cpg 908>; 285 }; 286 287 gpio5: gpio@e6055000 { 288 compatible = "renesas,gpio-r8a77965", 289 "renesas,rcar-gen3-gpio"; 290 reg = <0 0xe6055000 0 0x50>; 291 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 292 #gpio-cells = <2>; 293 gpio-controller; 294 gpio-ranges = <&pfc 0 160 26>; 295 #interrupt-cells = <2>; 296 interrupt-controller; 297 clocks = <&cpg CPG_MOD 907>; 298 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 299 resets = <&cpg 907>; 300 }; 301 302 gpio6: gpio@e6055400 { 303 compatible = "renesas,gpio-r8a77965", 304 "renesas,rcar-gen3-gpio"; 305 reg = <0 0xe6055400 0 0x50>; 306 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 307 #gpio-cells = <2>; 308 gpio-controller; 309 gpio-ranges = <&pfc 0 192 32>; 310 #interrupt-cells = <2>; 311 interrupt-controller; 312 clocks = <&cpg CPG_MOD 906>; 313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 314 resets = <&cpg 906>; 315 }; 316 317 gpio7: gpio@e6055800 { 318 compatible = "renesas,gpio-r8a77965", 319 "renesas,rcar-gen3-gpio"; 320 reg = <0 0xe6055800 0 0x50>; 321 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 322 #gpio-cells = <2>; 323 gpio-controller; 324 gpio-ranges = <&pfc 0 224 4>; 325 #interrupt-cells = <2>; 326 interrupt-controller; 327 clocks = <&cpg CPG_MOD 905>; 328 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 329 resets = <&cpg 905>; 330 }; 331 332 pfc: pinctrl@e6060000 { 333 compatible = "renesas,pfc-r8a77965"; 334 reg = <0 0xe6060000 0 0x50c>; 335 }; 336 337 cmt0: timer@e60f0000 { 338 compatible = "renesas,r8a77965-cmt0", 339 "renesas,rcar-gen3-cmt0"; 340 reg = <0 0xe60f0000 0 0x1004>; 341 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 343 clocks = <&cpg CPG_MOD 303>; 344 clock-names = "fck"; 345 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 346 resets = <&cpg 303>; 347 status = "disabled"; 348 }; 349 350 cmt1: timer@e6130000 { 351 compatible = "renesas,r8a77965-cmt1", 352 "renesas,rcar-gen3-cmt1"; 353 reg = <0 0xe6130000 0 0x1004>; 354 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 355 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 356 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 357 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 362 clocks = <&cpg CPG_MOD 302>; 363 clock-names = "fck"; 364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 365 resets = <&cpg 302>; 366 status = "disabled"; 367 }; 368 369 cmt2: timer@e6140000 { 370 compatible = "renesas,r8a77965-cmt1", 371 "renesas,rcar-gen3-cmt1"; 372 reg = <0 0xe6140000 0 0x1004>; 373 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 374 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 375 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 376 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 377 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 378 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 379 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 380 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 381 clocks = <&cpg CPG_MOD 301>; 382 clock-names = "fck"; 383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 384 resets = <&cpg 301>; 385 status = "disabled"; 386 }; 387 388 cmt3: timer@e6148000 { 389 compatible = "renesas,r8a77965-cmt1", 390 "renesas,rcar-gen3-cmt1"; 391 reg = <0 0xe6148000 0 0x1004>; 392 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 393 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 394 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 395 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 400 clocks = <&cpg CPG_MOD 300>; 401 clock-names = "fck"; 402 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 403 resets = <&cpg 300>; 404 status = "disabled"; 405 }; 406 407 cpg: clock-controller@e6150000 { 408 compatible = "renesas,r8a77965-cpg-mssr"; 409 reg = <0 0xe6150000 0 0x1000>; 410 clocks = <&extal_clk>, <&extalr_clk>; 411 clock-names = "extal", "extalr"; 412 #clock-cells = <2>; 413 #power-domain-cells = <0>; 414 #reset-cells = <1>; 415 }; 416 417 rst: reset-controller@e6160000 { 418 compatible = "renesas,r8a77965-rst"; 419 reg = <0 0xe6160000 0 0x0200>; 420 }; 421 422 sysc: system-controller@e6180000 { 423 compatible = "renesas,r8a77965-sysc"; 424 reg = <0 0xe6180000 0 0x0400>; 425 #power-domain-cells = <1>; 426 }; 427 428 tsc: thermal@e6198000 { 429 compatible = "renesas,r8a77965-thermal"; 430 reg = <0 0xe6198000 0 0x100>, 431 <0 0xe61a0000 0 0x100>, 432 <0 0xe61a8000 0 0x100>; 433 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 434 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 435 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 436 clocks = <&cpg CPG_MOD 522>; 437 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 438 resets = <&cpg 522>; 439 #thermal-sensor-cells = <1>; 440 }; 441 442 intc_ex: interrupt-controller@e61c0000 { 443 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 444 #interrupt-cells = <2>; 445 interrupt-controller; 446 reg = <0 0xe61c0000 0 0x200>; 447 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 448 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 449 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 450 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 451 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 452 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 453 clocks = <&cpg CPG_MOD 407>; 454 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 455 resets = <&cpg 407>; 456 }; 457 458 tmu0: timer@e61e0000 { 459 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 460 reg = <0 0xe61e0000 0 0x30>; 461 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 462 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 463 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 464 clocks = <&cpg CPG_MOD 125>; 465 clock-names = "fck"; 466 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 467 resets = <&cpg 125>; 468 status = "disabled"; 469 }; 470 471 tmu1: timer@e6fc0000 { 472 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 473 reg = <0 0xe6fc0000 0 0x30>; 474 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 475 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 476 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 477 clocks = <&cpg CPG_MOD 124>; 478 clock-names = "fck"; 479 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 480 resets = <&cpg 124>; 481 status = "disabled"; 482 }; 483 484 tmu2: timer@e6fd0000 { 485 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 486 reg = <0 0xe6fd0000 0 0x30>; 487 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 489 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 490 clocks = <&cpg CPG_MOD 123>; 491 clock-names = "fck"; 492 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 493 resets = <&cpg 123>; 494 status = "disabled"; 495 }; 496 497 tmu3: timer@e6fe0000 { 498 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 499 reg = <0 0xe6fe0000 0 0x30>; 500 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 501 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 502 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 503 clocks = <&cpg CPG_MOD 122>; 504 clock-names = "fck"; 505 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 506 resets = <&cpg 122>; 507 status = "disabled"; 508 }; 509 510 tmu4: timer@ffc00000 { 511 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 512 reg = <0 0xffc00000 0 0x30>; 513 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 514 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 516 clocks = <&cpg CPG_MOD 121>; 517 clock-names = "fck"; 518 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 519 resets = <&cpg 121>; 520 status = "disabled"; 521 }; 522 523 i2c0: i2c@e6500000 { 524 #address-cells = <1>; 525 #size-cells = <0>; 526 compatible = "renesas,i2c-r8a77965", 527 "renesas,rcar-gen3-i2c"; 528 reg = <0 0xe6500000 0 0x40>; 529 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 931>; 531 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 532 resets = <&cpg 931>; 533 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 534 <&dmac2 0x91>, <&dmac2 0x90>; 535 dma-names = "tx", "rx", "tx", "rx"; 536 i2c-scl-internal-delay-ns = <110>; 537 status = "disabled"; 538 }; 539 540 i2c1: i2c@e6508000 { 541 #address-cells = <1>; 542 #size-cells = <0>; 543 compatible = "renesas,i2c-r8a77965", 544 "renesas,rcar-gen3-i2c"; 545 reg = <0 0xe6508000 0 0x40>; 546 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 547 clocks = <&cpg CPG_MOD 930>; 548 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 549 resets = <&cpg 930>; 550 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 551 <&dmac2 0x93>, <&dmac2 0x92>; 552 dma-names = "tx", "rx", "tx", "rx"; 553 i2c-scl-internal-delay-ns = <6>; 554 status = "disabled"; 555 }; 556 557 i2c2: i2c@e6510000 { 558 #address-cells = <1>; 559 #size-cells = <0>; 560 compatible = "renesas,i2c-r8a77965", 561 "renesas,rcar-gen3-i2c"; 562 reg = <0 0xe6510000 0 0x40>; 563 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 564 clocks = <&cpg CPG_MOD 929>; 565 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 566 resets = <&cpg 929>; 567 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 568 <&dmac2 0x95>, <&dmac2 0x94>; 569 dma-names = "tx", "rx", "tx", "rx"; 570 i2c-scl-internal-delay-ns = <6>; 571 status = "disabled"; 572 }; 573 574 i2c3: i2c@e66d0000 { 575 #address-cells = <1>; 576 #size-cells = <0>; 577 compatible = "renesas,i2c-r8a77965", 578 "renesas,rcar-gen3-i2c"; 579 reg = <0 0xe66d0000 0 0x40>; 580 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 581 clocks = <&cpg CPG_MOD 928>; 582 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 583 resets = <&cpg 928>; 584 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 585 dma-names = "tx", "rx"; 586 i2c-scl-internal-delay-ns = <110>; 587 status = "disabled"; 588 }; 589 590 i2c4: i2c@e66d8000 { 591 #address-cells = <1>; 592 #size-cells = <0>; 593 compatible = "renesas,i2c-r8a77965", 594 "renesas,rcar-gen3-i2c"; 595 reg = <0 0xe66d8000 0 0x40>; 596 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 597 clocks = <&cpg CPG_MOD 927>; 598 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 599 resets = <&cpg 927>; 600 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 601 dma-names = "tx", "rx"; 602 i2c-scl-internal-delay-ns = <110>; 603 status = "disabled"; 604 }; 605 606 i2c5: i2c@e66e0000 { 607 #address-cells = <1>; 608 #size-cells = <0>; 609 compatible = "renesas,i2c-r8a77965", 610 "renesas,rcar-gen3-i2c"; 611 reg = <0 0xe66e0000 0 0x40>; 612 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 613 clocks = <&cpg CPG_MOD 919>; 614 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 615 resets = <&cpg 919>; 616 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 617 dma-names = "tx", "rx"; 618 i2c-scl-internal-delay-ns = <110>; 619 status = "disabled"; 620 }; 621 622 i2c6: i2c@e66e8000 { 623 #address-cells = <1>; 624 #size-cells = <0>; 625 compatible = "renesas,i2c-r8a77965", 626 "renesas,rcar-gen3-i2c"; 627 reg = <0 0xe66e8000 0 0x40>; 628 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 629 clocks = <&cpg CPG_MOD 918>; 630 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 631 resets = <&cpg 918>; 632 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 633 dma-names = "tx", "rx"; 634 i2c-scl-internal-delay-ns = <6>; 635 status = "disabled"; 636 }; 637 638 i2c_dvfs: i2c@e60b0000 { 639 #address-cells = <1>; 640 #size-cells = <0>; 641 compatible = "renesas,iic-r8a77965", 642 "renesas,rcar-gen3-iic", 643 "renesas,rmobile-iic"; 644 reg = <0 0xe60b0000 0 0x425>; 645 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 646 clocks = <&cpg CPG_MOD 926>; 647 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 648 resets = <&cpg 926>; 649 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 650 dma-names = "tx", "rx"; 651 status = "disabled"; 652 }; 653 654 hscif0: serial@e6540000 { 655 compatible = "renesas,hscif-r8a77965", 656 "renesas,rcar-gen3-hscif", 657 "renesas,hscif"; 658 reg = <0 0xe6540000 0 0x60>; 659 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 660 clocks = <&cpg CPG_MOD 520>, 661 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 662 <&scif_clk>; 663 clock-names = "fck", "brg_int", "scif_clk"; 664 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 665 <&dmac2 0x31>, <&dmac2 0x30>; 666 dma-names = "tx", "rx", "tx", "rx"; 667 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 668 resets = <&cpg 520>; 669 status = "disabled"; 670 }; 671 672 hscif1: serial@e6550000 { 673 compatible = "renesas,hscif-r8a77965", 674 "renesas,rcar-gen3-hscif", 675 "renesas,hscif"; 676 reg = <0 0xe6550000 0 0x60>; 677 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 678 clocks = <&cpg CPG_MOD 519>, 679 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 680 <&scif_clk>; 681 clock-names = "fck", "brg_int", "scif_clk"; 682 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 683 <&dmac2 0x33>, <&dmac2 0x32>; 684 dma-names = "tx", "rx", "tx", "rx"; 685 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 686 resets = <&cpg 519>; 687 status = "disabled"; 688 }; 689 690 hscif2: serial@e6560000 { 691 compatible = "renesas,hscif-r8a77965", 692 "renesas,rcar-gen3-hscif", 693 "renesas,hscif"; 694 reg = <0 0xe6560000 0 0x60>; 695 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 696 clocks = <&cpg CPG_MOD 518>, 697 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 698 <&scif_clk>; 699 clock-names = "fck", "brg_int", "scif_clk"; 700 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 701 <&dmac2 0x35>, <&dmac2 0x34>; 702 dma-names = "tx", "rx", "tx", "rx"; 703 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 704 resets = <&cpg 518>; 705 status = "disabled"; 706 }; 707 708 hscif3: serial@e66a0000 { 709 compatible = "renesas,hscif-r8a77965", 710 "renesas,rcar-gen3-hscif", 711 "renesas,hscif"; 712 reg = <0 0xe66a0000 0 0x60>; 713 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 714 clocks = <&cpg CPG_MOD 517>, 715 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 716 <&scif_clk>; 717 clock-names = "fck", "brg_int", "scif_clk"; 718 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 719 dma-names = "tx", "rx"; 720 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 721 resets = <&cpg 517>; 722 status = "disabled"; 723 }; 724 725 hscif4: serial@e66b0000 { 726 compatible = "renesas,hscif-r8a77965", 727 "renesas,rcar-gen3-hscif", 728 "renesas,hscif"; 729 reg = <0 0xe66b0000 0 0x60>; 730 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 731 clocks = <&cpg CPG_MOD 516>, 732 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 733 <&scif_clk>; 734 clock-names = "fck", "brg_int", "scif_clk"; 735 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 736 dma-names = "tx", "rx"; 737 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 738 resets = <&cpg 516>; 739 status = "disabled"; 740 }; 741 742 hsusb: usb@e6590000 { 743 compatible = "renesas,usbhs-r8a77965", 744 "renesas,rcar-gen3-usbhs"; 745 reg = <0 0xe6590000 0 0x200>; 746 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 747 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 748 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 749 <&usb_dmac1 0>, <&usb_dmac1 1>; 750 dma-names = "ch0", "ch1", "ch2", "ch3"; 751 renesas,buswait = <11>; 752 phys = <&usb2_phy0 3>; 753 phy-names = "usb"; 754 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 755 resets = <&cpg 704>, <&cpg 703>; 756 status = "disabled"; 757 }; 758 759 usb_dmac0: dma-controller@e65a0000 { 760 compatible = "renesas,r8a77965-usb-dmac", 761 "renesas,usb-dmac"; 762 reg = <0 0xe65a0000 0 0x100>; 763 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 765 interrupt-names = "ch0", "ch1"; 766 clocks = <&cpg CPG_MOD 330>; 767 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 768 resets = <&cpg 330>; 769 #dma-cells = <1>; 770 dma-channels = <2>; 771 }; 772 773 usb_dmac1: dma-controller@e65b0000 { 774 compatible = "renesas,r8a77965-usb-dmac", 775 "renesas,usb-dmac"; 776 reg = <0 0xe65b0000 0 0x100>; 777 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 779 interrupt-names = "ch0", "ch1"; 780 clocks = <&cpg CPG_MOD 331>; 781 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 782 resets = <&cpg 331>; 783 #dma-cells = <1>; 784 dma-channels = <2>; 785 }; 786 787 usb3_phy0: usb-phy@e65ee000 { 788 compatible = "renesas,r8a77965-usb3-phy", 789 "renesas,rcar-gen3-usb3-phy"; 790 reg = <0 0xe65ee000 0 0x90>; 791 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 792 <&usb_extal_clk>; 793 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 795 resets = <&cpg 328>; 796 #phy-cells = <0>; 797 status = "disabled"; 798 }; 799 800 arm_cc630p: crypto@e6601000 { 801 compatible = "arm,cryptocell-630p-ree"; 802 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 803 reg = <0x0 0xe6601000 0 0x1000>; 804 clocks = <&cpg CPG_MOD 229>; 805 resets = <&cpg 229>; 806 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 807 }; 808 809 dmac0: dma-controller@e6700000 { 810 compatible = "renesas,dmac-r8a77965", 811 "renesas,rcar-dmac"; 812 reg = <0 0xe6700000 0 0x10000>; 813 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 830 interrupt-names = "error", 831 "ch0", "ch1", "ch2", "ch3", 832 "ch4", "ch5", "ch6", "ch7", 833 "ch8", "ch9", "ch10", "ch11", 834 "ch12", "ch13", "ch14", "ch15"; 835 clocks = <&cpg CPG_MOD 219>; 836 clock-names = "fck"; 837 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 838 resets = <&cpg 219>; 839 #dma-cells = <1>; 840 dma-channels = <16>; 841 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 842 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 843 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 844 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 845 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 846 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 847 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 848 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 849 }; 850 851 dmac1: dma-controller@e7300000 { 852 compatible = "renesas,dmac-r8a77965", 853 "renesas,rcar-dmac"; 854 reg = <0 0xe7300000 0 0x10000>; 855 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 856 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 872 interrupt-names = "error", 873 "ch0", "ch1", "ch2", "ch3", 874 "ch4", "ch5", "ch6", "ch7", 875 "ch8", "ch9", "ch10", "ch11", 876 "ch12", "ch13", "ch14", "ch15"; 877 clocks = <&cpg CPG_MOD 218>; 878 clock-names = "fck"; 879 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 880 resets = <&cpg 218>; 881 #dma-cells = <1>; 882 dma-channels = <16>; 883 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 884 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 885 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 886 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 887 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 888 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 889 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 890 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 891 }; 892 893 dmac2: dma-controller@e7310000 { 894 compatible = "renesas,dmac-r8a77965", 895 "renesas,rcar-dmac"; 896 reg = <0 0xe7310000 0 0x10000>; 897 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 898 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 899 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 900 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 901 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 904 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 906 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 907 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 908 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 909 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 910 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 911 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 912 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 914 interrupt-names = "error", 915 "ch0", "ch1", "ch2", "ch3", 916 "ch4", "ch5", "ch6", "ch7", 917 "ch8", "ch9", "ch10", "ch11", 918 "ch12", "ch13", "ch14", "ch15"; 919 clocks = <&cpg CPG_MOD 217>; 920 clock-names = "fck"; 921 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 922 resets = <&cpg 217>; 923 #dma-cells = <1>; 924 dma-channels = <16>; 925 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 926 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 927 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 928 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 929 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 930 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 931 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 932 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 933 }; 934 935 ipmmu_ds0: iommu@e6740000 { 936 compatible = "renesas,ipmmu-r8a77965"; 937 reg = <0 0xe6740000 0 0x1000>; 938 renesas,ipmmu-main = <&ipmmu_mm 0>; 939 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 940 #iommu-cells = <1>; 941 }; 942 943 ipmmu_ds1: iommu@e7740000 { 944 compatible = "renesas,ipmmu-r8a77965"; 945 reg = <0 0xe7740000 0 0x1000>; 946 renesas,ipmmu-main = <&ipmmu_mm 1>; 947 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 948 #iommu-cells = <1>; 949 }; 950 951 ipmmu_hc: iommu@e6570000 { 952 compatible = "renesas,ipmmu-r8a77965"; 953 reg = <0 0xe6570000 0 0x1000>; 954 renesas,ipmmu-main = <&ipmmu_mm 2>; 955 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 956 #iommu-cells = <1>; 957 }; 958 959 ipmmu_mm: iommu@e67b0000 { 960 compatible = "renesas,ipmmu-r8a77965"; 961 reg = <0 0xe67b0000 0 0x1000>; 962 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 965 #iommu-cells = <1>; 966 }; 967 968 ipmmu_mp: iommu@ec670000 { 969 compatible = "renesas,ipmmu-r8a77965"; 970 reg = <0 0xec670000 0 0x1000>; 971 renesas,ipmmu-main = <&ipmmu_mm 4>; 972 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 973 #iommu-cells = <1>; 974 }; 975 976 ipmmu_pv0: iommu@fd800000 { 977 compatible = "renesas,ipmmu-r8a77965"; 978 reg = <0 0xfd800000 0 0x1000>; 979 renesas,ipmmu-main = <&ipmmu_mm 6>; 980 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 981 #iommu-cells = <1>; 982 }; 983 984 ipmmu_rt: iommu@ffc80000 { 985 compatible = "renesas,ipmmu-r8a77965"; 986 reg = <0 0xffc80000 0 0x1000>; 987 renesas,ipmmu-main = <&ipmmu_mm 10>; 988 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 989 #iommu-cells = <1>; 990 }; 991 992 ipmmu_vc0: iommu@fe6b0000 { 993 compatible = "renesas,ipmmu-r8a77965"; 994 reg = <0 0xfe6b0000 0 0x1000>; 995 renesas,ipmmu-main = <&ipmmu_mm 12>; 996 power-domains = <&sysc R8A77965_PD_A3VC>; 997 #iommu-cells = <1>; 998 }; 999 1000 ipmmu_vi0: iommu@febd0000 { 1001 compatible = "renesas,ipmmu-r8a77965"; 1002 reg = <0 0xfebd0000 0 0x1000>; 1003 renesas,ipmmu-main = <&ipmmu_mm 14>; 1004 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1005 #iommu-cells = <1>; 1006 }; 1007 1008 ipmmu_vp0: iommu@fe990000 { 1009 compatible = "renesas,ipmmu-r8a77965"; 1010 reg = <0 0xfe990000 0 0x1000>; 1011 renesas,ipmmu-main = <&ipmmu_mm 16>; 1012 power-domains = <&sysc R8A77965_PD_A3VP>; 1013 #iommu-cells = <1>; 1014 }; 1015 1016 avb: ethernet@e6800000 { 1017 compatible = "renesas,etheravb-r8a77965", 1018 "renesas,etheravb-rcar-gen3"; 1019 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1020 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1021 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1022 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1023 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1024 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1045 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1046 "ch4", "ch5", "ch6", "ch7", 1047 "ch8", "ch9", "ch10", "ch11", 1048 "ch12", "ch13", "ch14", "ch15", 1049 "ch16", "ch17", "ch18", "ch19", 1050 "ch20", "ch21", "ch22", "ch23", 1051 "ch24"; 1052 clocks = <&cpg CPG_MOD 812>; 1053 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1054 resets = <&cpg 812>; 1055 phy-mode = "rgmii"; 1056 rx-internal-delay-ps = <0>; 1057 tx-internal-delay-ps = <0>; 1058 iommus = <&ipmmu_ds0 16>; 1059 #address-cells = <1>; 1060 #size-cells = <0>; 1061 status = "disabled"; 1062 }; 1063 1064 can0: can@e6c30000 { 1065 compatible = "renesas,can-r8a77965", 1066 "renesas,rcar-gen3-can"; 1067 reg = <0 0xe6c30000 0 0x1000>; 1068 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1069 clocks = <&cpg CPG_MOD 916>, 1070 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1071 <&can_clk>; 1072 clock-names = "clkp1", "clkp2", "can_clk"; 1073 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1074 assigned-clock-rates = <40000000>; 1075 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1076 resets = <&cpg 916>; 1077 status = "disabled"; 1078 }; 1079 1080 can1: can@e6c38000 { 1081 compatible = "renesas,can-r8a77965", 1082 "renesas,rcar-gen3-can"; 1083 reg = <0 0xe6c38000 0 0x1000>; 1084 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1085 clocks = <&cpg CPG_MOD 915>, 1086 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1087 <&can_clk>; 1088 clock-names = "clkp1", "clkp2", "can_clk"; 1089 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1090 assigned-clock-rates = <40000000>; 1091 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1092 resets = <&cpg 915>; 1093 status = "disabled"; 1094 }; 1095 1096 canfd: can@e66c0000 { 1097 compatible = "renesas,r8a77965-canfd", 1098 "renesas,rcar-gen3-canfd"; 1099 reg = <0 0xe66c0000 0 0x8000>; 1100 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1101 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1102 clocks = <&cpg CPG_MOD 914>, 1103 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1104 <&can_clk>; 1105 clock-names = "fck", "canfd", "can_clk"; 1106 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1107 assigned-clock-rates = <40000000>; 1108 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1109 resets = <&cpg 914>; 1110 status = "disabled"; 1111 1112 channel0 { 1113 status = "disabled"; 1114 }; 1115 1116 channel1 { 1117 status = "disabled"; 1118 }; 1119 }; 1120 1121 pwm0: pwm@e6e30000 { 1122 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1123 reg = <0 0xe6e30000 0 8>; 1124 #pwm-cells = <2>; 1125 clocks = <&cpg CPG_MOD 523>; 1126 resets = <&cpg 523>; 1127 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1128 status = "disabled"; 1129 }; 1130 1131 pwm1: pwm@e6e31000 { 1132 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1133 reg = <0 0xe6e31000 0 8>; 1134 #pwm-cells = <2>; 1135 clocks = <&cpg CPG_MOD 523>; 1136 resets = <&cpg 523>; 1137 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1138 status = "disabled"; 1139 }; 1140 1141 pwm2: pwm@e6e32000 { 1142 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1143 reg = <0 0xe6e32000 0 8>; 1144 #pwm-cells = <2>; 1145 clocks = <&cpg CPG_MOD 523>; 1146 resets = <&cpg 523>; 1147 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1148 status = "disabled"; 1149 }; 1150 1151 pwm3: pwm@e6e33000 { 1152 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1153 reg = <0 0xe6e33000 0 8>; 1154 #pwm-cells = <2>; 1155 clocks = <&cpg CPG_MOD 523>; 1156 resets = <&cpg 523>; 1157 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1158 status = "disabled"; 1159 }; 1160 1161 pwm4: pwm@e6e34000 { 1162 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1163 reg = <0 0xe6e34000 0 8>; 1164 #pwm-cells = <2>; 1165 clocks = <&cpg CPG_MOD 523>; 1166 resets = <&cpg 523>; 1167 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1168 status = "disabled"; 1169 }; 1170 1171 pwm5: pwm@e6e35000 { 1172 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1173 reg = <0 0xe6e35000 0 8>; 1174 #pwm-cells = <2>; 1175 clocks = <&cpg CPG_MOD 523>; 1176 resets = <&cpg 523>; 1177 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1178 status = "disabled"; 1179 }; 1180 1181 pwm6: pwm@e6e36000 { 1182 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1183 reg = <0 0xe6e36000 0 8>; 1184 #pwm-cells = <2>; 1185 clocks = <&cpg CPG_MOD 523>; 1186 resets = <&cpg 523>; 1187 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1188 status = "disabled"; 1189 }; 1190 1191 scif0: serial@e6e60000 { 1192 compatible = "renesas,scif-r8a77965", 1193 "renesas,rcar-gen3-scif", "renesas,scif"; 1194 reg = <0 0xe6e60000 0 64>; 1195 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1196 clocks = <&cpg CPG_MOD 207>, 1197 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1198 <&scif_clk>; 1199 clock-names = "fck", "brg_int", "scif_clk"; 1200 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1201 <&dmac2 0x51>, <&dmac2 0x50>; 1202 dma-names = "tx", "rx", "tx", "rx"; 1203 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1204 resets = <&cpg 207>; 1205 status = "disabled"; 1206 }; 1207 1208 scif1: serial@e6e68000 { 1209 compatible = "renesas,scif-r8a77965", 1210 "renesas,rcar-gen3-scif", "renesas,scif"; 1211 reg = <0 0xe6e68000 0 64>; 1212 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1213 clocks = <&cpg CPG_MOD 206>, 1214 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1215 <&scif_clk>; 1216 clock-names = "fck", "brg_int", "scif_clk"; 1217 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1218 <&dmac2 0x53>, <&dmac2 0x52>; 1219 dma-names = "tx", "rx", "tx", "rx"; 1220 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1221 resets = <&cpg 206>; 1222 status = "disabled"; 1223 }; 1224 1225 scif2: serial@e6e88000 { 1226 compatible = "renesas,scif-r8a77965", 1227 "renesas,rcar-gen3-scif", "renesas,scif"; 1228 reg = <0 0xe6e88000 0 64>; 1229 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1230 clocks = <&cpg CPG_MOD 310>, 1231 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1232 <&scif_clk>; 1233 clock-names = "fck", "brg_int", "scif_clk"; 1234 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1235 <&dmac2 0x13>, <&dmac2 0x12>; 1236 dma-names = "tx", "rx", "tx", "rx"; 1237 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1238 resets = <&cpg 310>; 1239 status = "disabled"; 1240 }; 1241 1242 scif3: serial@e6c50000 { 1243 compatible = "renesas,scif-r8a77965", 1244 "renesas,rcar-gen3-scif", "renesas,scif"; 1245 reg = <0 0xe6c50000 0 64>; 1246 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1247 clocks = <&cpg CPG_MOD 204>, 1248 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1249 <&scif_clk>; 1250 clock-names = "fck", "brg_int", "scif_clk"; 1251 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1252 dma-names = "tx", "rx"; 1253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1254 resets = <&cpg 204>; 1255 status = "disabled"; 1256 }; 1257 1258 scif4: serial@e6c40000 { 1259 compatible = "renesas,scif-r8a77965", 1260 "renesas,rcar-gen3-scif", "renesas,scif"; 1261 reg = <0 0xe6c40000 0 64>; 1262 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1263 clocks = <&cpg CPG_MOD 203>, 1264 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1265 <&scif_clk>; 1266 clock-names = "fck", "brg_int", "scif_clk"; 1267 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1268 dma-names = "tx", "rx"; 1269 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1270 resets = <&cpg 203>; 1271 status = "disabled"; 1272 }; 1273 1274 scif5: serial@e6f30000 { 1275 compatible = "renesas,scif-r8a77965", 1276 "renesas,rcar-gen3-scif", "renesas,scif"; 1277 reg = <0 0xe6f30000 0 64>; 1278 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1279 clocks = <&cpg CPG_MOD 202>, 1280 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1281 <&scif_clk>; 1282 clock-names = "fck", "brg_int", "scif_clk"; 1283 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1284 <&dmac2 0x5b>, <&dmac2 0x5a>; 1285 dma-names = "tx", "rx", "tx", "rx"; 1286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1287 resets = <&cpg 202>; 1288 status = "disabled"; 1289 }; 1290 1291 tpu: pwm@e6e80000 { 1292 compatible = "renesas,tpu-r8a77965", "renesas,tpu"; 1293 reg = <0 0xe6e80000 0 0x148>; 1294 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1295 clocks = <&cpg CPG_MOD 304>; 1296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1297 resets = <&cpg 304>; 1298 #pwm-cells = <3>; 1299 status = "disabled"; 1300 }; 1301 1302 msiof0: spi@e6e90000 { 1303 compatible = "renesas,msiof-r8a77965", 1304 "renesas,rcar-gen3-msiof"; 1305 reg = <0 0xe6e90000 0 0x0064>; 1306 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1307 clocks = <&cpg CPG_MOD 211>; 1308 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1309 <&dmac2 0x41>, <&dmac2 0x40>; 1310 dma-names = "tx", "rx", "tx", "rx"; 1311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1312 resets = <&cpg 211>; 1313 #address-cells = <1>; 1314 #size-cells = <0>; 1315 status = "disabled"; 1316 }; 1317 1318 msiof1: spi@e6ea0000 { 1319 compatible = "renesas,msiof-r8a77965", 1320 "renesas,rcar-gen3-msiof"; 1321 reg = <0 0xe6ea0000 0 0x0064>; 1322 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1323 clocks = <&cpg CPG_MOD 210>; 1324 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1325 <&dmac2 0x43>, <&dmac2 0x42>; 1326 dma-names = "tx", "rx", "tx", "rx"; 1327 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1328 resets = <&cpg 210>; 1329 #address-cells = <1>; 1330 #size-cells = <0>; 1331 status = "disabled"; 1332 }; 1333 1334 msiof2: spi@e6c00000 { 1335 compatible = "renesas,msiof-r8a77965", 1336 "renesas,rcar-gen3-msiof"; 1337 reg = <0 0xe6c00000 0 0x0064>; 1338 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1339 clocks = <&cpg CPG_MOD 209>; 1340 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1341 dma-names = "tx", "rx"; 1342 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1343 resets = <&cpg 209>; 1344 #address-cells = <1>; 1345 #size-cells = <0>; 1346 status = "disabled"; 1347 }; 1348 1349 msiof3: spi@e6c10000 { 1350 compatible = "renesas,msiof-r8a77965", 1351 "renesas,rcar-gen3-msiof"; 1352 reg = <0 0xe6c10000 0 0x0064>; 1353 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1354 clocks = <&cpg CPG_MOD 208>; 1355 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1356 dma-names = "tx", "rx"; 1357 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1358 resets = <&cpg 208>; 1359 #address-cells = <1>; 1360 #size-cells = <0>; 1361 status = "disabled"; 1362 }; 1363 1364 vin0: video@e6ef0000 { 1365 compatible = "renesas,vin-r8a77965"; 1366 reg = <0 0xe6ef0000 0 0x1000>; 1367 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1368 clocks = <&cpg CPG_MOD 811>; 1369 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1370 resets = <&cpg 811>; 1371 renesas,id = <0>; 1372 status = "disabled"; 1373 1374 ports { 1375 #address-cells = <1>; 1376 #size-cells = <0>; 1377 1378 port@1 { 1379 #address-cells = <1>; 1380 #size-cells = <0>; 1381 1382 reg = <1>; 1383 1384 vin0csi20: endpoint@0 { 1385 reg = <0>; 1386 remote-endpoint = <&csi20vin0>; 1387 }; 1388 vin0csi40: endpoint@2 { 1389 reg = <2>; 1390 remote-endpoint = <&csi40vin0>; 1391 }; 1392 }; 1393 }; 1394 }; 1395 1396 vin1: video@e6ef1000 { 1397 compatible = "renesas,vin-r8a77965"; 1398 reg = <0 0xe6ef1000 0 0x1000>; 1399 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1400 clocks = <&cpg CPG_MOD 810>; 1401 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1402 resets = <&cpg 810>; 1403 renesas,id = <1>; 1404 status = "disabled"; 1405 1406 ports { 1407 #address-cells = <1>; 1408 #size-cells = <0>; 1409 1410 port@1 { 1411 #address-cells = <1>; 1412 #size-cells = <0>; 1413 1414 reg = <1>; 1415 1416 vin1csi20: endpoint@0 { 1417 reg = <0>; 1418 remote-endpoint = <&csi20vin1>; 1419 }; 1420 vin1csi40: endpoint@2 { 1421 reg = <2>; 1422 remote-endpoint = <&csi40vin1>; 1423 }; 1424 }; 1425 }; 1426 }; 1427 1428 vin2: video@e6ef2000 { 1429 compatible = "renesas,vin-r8a77965"; 1430 reg = <0 0xe6ef2000 0 0x1000>; 1431 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1432 clocks = <&cpg CPG_MOD 809>; 1433 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1434 resets = <&cpg 809>; 1435 renesas,id = <2>; 1436 status = "disabled"; 1437 1438 ports { 1439 #address-cells = <1>; 1440 #size-cells = <0>; 1441 1442 port@1 { 1443 #address-cells = <1>; 1444 #size-cells = <0>; 1445 1446 reg = <1>; 1447 1448 vin2csi20: endpoint@0 { 1449 reg = <0>; 1450 remote-endpoint = <&csi20vin2>; 1451 }; 1452 vin2csi40: endpoint@2 { 1453 reg = <2>; 1454 remote-endpoint = <&csi40vin2>; 1455 }; 1456 }; 1457 }; 1458 }; 1459 1460 vin3: video@e6ef3000 { 1461 compatible = "renesas,vin-r8a77965"; 1462 reg = <0 0xe6ef3000 0 0x1000>; 1463 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1464 clocks = <&cpg CPG_MOD 808>; 1465 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1466 resets = <&cpg 808>; 1467 renesas,id = <3>; 1468 status = "disabled"; 1469 1470 ports { 1471 #address-cells = <1>; 1472 #size-cells = <0>; 1473 1474 port@1 { 1475 #address-cells = <1>; 1476 #size-cells = <0>; 1477 1478 reg = <1>; 1479 1480 vin3csi20: endpoint@0 { 1481 reg = <0>; 1482 remote-endpoint = <&csi20vin3>; 1483 }; 1484 vin3csi40: endpoint@2 { 1485 reg = <2>; 1486 remote-endpoint = <&csi40vin3>; 1487 }; 1488 }; 1489 }; 1490 }; 1491 1492 vin4: video@e6ef4000 { 1493 compatible = "renesas,vin-r8a77965"; 1494 reg = <0 0xe6ef4000 0 0x1000>; 1495 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1496 clocks = <&cpg CPG_MOD 807>; 1497 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1498 resets = <&cpg 807>; 1499 renesas,id = <4>; 1500 status = "disabled"; 1501 1502 ports { 1503 #address-cells = <1>; 1504 #size-cells = <0>; 1505 1506 port@1 { 1507 #address-cells = <1>; 1508 #size-cells = <0>; 1509 1510 reg = <1>; 1511 1512 vin4csi20: endpoint@0 { 1513 reg = <0>; 1514 remote-endpoint = <&csi20vin4>; 1515 }; 1516 vin4csi40: endpoint@2 { 1517 reg = <2>; 1518 remote-endpoint = <&csi40vin4>; 1519 }; 1520 }; 1521 }; 1522 }; 1523 1524 vin5: video@e6ef5000 { 1525 compatible = "renesas,vin-r8a77965"; 1526 reg = <0 0xe6ef5000 0 0x1000>; 1527 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1528 clocks = <&cpg CPG_MOD 806>; 1529 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1530 resets = <&cpg 806>; 1531 renesas,id = <5>; 1532 status = "disabled"; 1533 1534 ports { 1535 #address-cells = <1>; 1536 #size-cells = <0>; 1537 1538 port@1 { 1539 #address-cells = <1>; 1540 #size-cells = <0>; 1541 1542 reg = <1>; 1543 1544 vin5csi20: endpoint@0 { 1545 reg = <0>; 1546 remote-endpoint = <&csi20vin5>; 1547 }; 1548 vin5csi40: endpoint@2 { 1549 reg = <2>; 1550 remote-endpoint = <&csi40vin5>; 1551 }; 1552 }; 1553 }; 1554 }; 1555 1556 vin6: video@e6ef6000 { 1557 compatible = "renesas,vin-r8a77965"; 1558 reg = <0 0xe6ef6000 0 0x1000>; 1559 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1560 clocks = <&cpg CPG_MOD 805>; 1561 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1562 resets = <&cpg 805>; 1563 renesas,id = <6>; 1564 status = "disabled"; 1565 1566 ports { 1567 #address-cells = <1>; 1568 #size-cells = <0>; 1569 1570 port@1 { 1571 #address-cells = <1>; 1572 #size-cells = <0>; 1573 1574 reg = <1>; 1575 1576 vin6csi20: endpoint@0 { 1577 reg = <0>; 1578 remote-endpoint = <&csi20vin6>; 1579 }; 1580 vin6csi40: endpoint@2 { 1581 reg = <2>; 1582 remote-endpoint = <&csi40vin6>; 1583 }; 1584 }; 1585 }; 1586 }; 1587 1588 vin7: video@e6ef7000 { 1589 compatible = "renesas,vin-r8a77965"; 1590 reg = <0 0xe6ef7000 0 0x1000>; 1591 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1592 clocks = <&cpg CPG_MOD 804>; 1593 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1594 resets = <&cpg 804>; 1595 renesas,id = <7>; 1596 status = "disabled"; 1597 1598 ports { 1599 #address-cells = <1>; 1600 #size-cells = <0>; 1601 1602 port@1 { 1603 #address-cells = <1>; 1604 #size-cells = <0>; 1605 1606 reg = <1>; 1607 1608 vin7csi20: endpoint@0 { 1609 reg = <0>; 1610 remote-endpoint = <&csi20vin7>; 1611 }; 1612 vin7csi40: endpoint@2 { 1613 reg = <2>; 1614 remote-endpoint = <&csi40vin7>; 1615 }; 1616 }; 1617 }; 1618 }; 1619 1620 drif00: rif@e6f40000 { 1621 compatible = "renesas,r8a77965-drif", 1622 "renesas,rcar-gen3-drif"; 1623 reg = <0 0xe6f40000 0 0x84>; 1624 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1625 clocks = <&cpg CPG_MOD 515>; 1626 clock-names = "fck"; 1627 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1628 dma-names = "rx", "rx"; 1629 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1630 resets = <&cpg 515>; 1631 renesas,bonding = <&drif01>; 1632 status = "disabled"; 1633 }; 1634 1635 drif01: rif@e6f50000 { 1636 compatible = "renesas,r8a77965-drif", 1637 "renesas,rcar-gen3-drif"; 1638 reg = <0 0xe6f50000 0 0x84>; 1639 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1640 clocks = <&cpg CPG_MOD 514>; 1641 clock-names = "fck"; 1642 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1643 dma-names = "rx", "rx"; 1644 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1645 resets = <&cpg 514>; 1646 renesas,bonding = <&drif00>; 1647 status = "disabled"; 1648 }; 1649 1650 drif10: rif@e6f60000 { 1651 compatible = "renesas,r8a77965-drif", 1652 "renesas,rcar-gen3-drif"; 1653 reg = <0 0xe6f60000 0 0x84>; 1654 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1655 clocks = <&cpg CPG_MOD 513>; 1656 clock-names = "fck"; 1657 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1658 dma-names = "rx", "rx"; 1659 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1660 resets = <&cpg 513>; 1661 renesas,bonding = <&drif11>; 1662 status = "disabled"; 1663 }; 1664 1665 drif11: rif@e6f70000 { 1666 compatible = "renesas,r8a77965-drif", 1667 "renesas,rcar-gen3-drif"; 1668 reg = <0 0xe6f70000 0 0x84>; 1669 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1670 clocks = <&cpg CPG_MOD 512>; 1671 clock-names = "fck"; 1672 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1673 dma-names = "rx", "rx"; 1674 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1675 resets = <&cpg 512>; 1676 renesas,bonding = <&drif10>; 1677 status = "disabled"; 1678 }; 1679 1680 drif20: rif@e6f80000 { 1681 compatible = "renesas,r8a77965-drif", 1682 "renesas,rcar-gen3-drif"; 1683 reg = <0 0xe6f80000 0 0x84>; 1684 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1685 clocks = <&cpg CPG_MOD 511>; 1686 clock-names = "fck"; 1687 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1688 dma-names = "rx", "rx"; 1689 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1690 resets = <&cpg 511>; 1691 renesas,bonding = <&drif21>; 1692 status = "disabled"; 1693 }; 1694 1695 drif21: rif@e6f90000 { 1696 compatible = "renesas,r8a77965-drif", 1697 "renesas,rcar-gen3-drif"; 1698 reg = <0 0xe6f90000 0 0x84>; 1699 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1700 clocks = <&cpg CPG_MOD 510>; 1701 clock-names = "fck"; 1702 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1703 dma-names = "rx", "rx"; 1704 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1705 resets = <&cpg 510>; 1706 renesas,bonding = <&drif20>; 1707 status = "disabled"; 1708 }; 1709 1710 drif30: rif@e6fa0000 { 1711 compatible = "renesas,r8a77965-drif", 1712 "renesas,rcar-gen3-drif"; 1713 reg = <0 0xe6fa0000 0 0x84>; 1714 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1715 clocks = <&cpg CPG_MOD 509>; 1716 clock-names = "fck"; 1717 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1718 dma-names = "rx", "rx"; 1719 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1720 resets = <&cpg 509>; 1721 renesas,bonding = <&drif31>; 1722 status = "disabled"; 1723 }; 1724 1725 drif31: rif@e6fb0000 { 1726 compatible = "renesas,r8a77965-drif", 1727 "renesas,rcar-gen3-drif"; 1728 reg = <0 0xe6fb0000 0 0x84>; 1729 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1730 clocks = <&cpg CPG_MOD 508>; 1731 clock-names = "fck"; 1732 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1733 dma-names = "rx", "rx"; 1734 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1735 resets = <&cpg 508>; 1736 renesas,bonding = <&drif30>; 1737 status = "disabled"; 1738 }; 1739 1740 rcar_sound: sound@ec500000 { 1741 /* 1742 * #sound-dai-cells is required 1743 * 1744 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1745 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1746 */ 1747 /* 1748 * #clock-cells is required for audio_clkout0/1/2/3 1749 * 1750 * clkout : #clock-cells = <0>; <&rcar_sound>; 1751 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1752 */ 1753 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; 1754 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1755 <0 0xec5a0000 0 0x100>, /* ADG */ 1756 <0 0xec540000 0 0x1000>, /* SSIU */ 1757 <0 0xec541000 0 0x280>, /* SSI */ 1758 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1759 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1760 1761 clocks = <&cpg CPG_MOD 1005>, 1762 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1763 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1764 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1765 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1766 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1767 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1768 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1769 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1770 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1771 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1772 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1773 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1774 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1775 <&audio_clk_a>, <&audio_clk_b>, 1776 <&audio_clk_c>, 1777 <&cpg CPG_CORE R8A77965_CLK_S0D4>; 1778 clock-names = "ssi-all", 1779 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1780 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1781 "ssi.1", "ssi.0", 1782 "src.9", "src.8", "src.7", "src.6", 1783 "src.5", "src.4", "src.3", "src.2", 1784 "src.1", "src.0", 1785 "mix.1", "mix.0", 1786 "ctu.1", "ctu.0", 1787 "dvc.0", "dvc.1", 1788 "clk_a", "clk_b", "clk_c", "clk_i"; 1789 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1790 resets = <&cpg 1005>, 1791 <&cpg 1006>, <&cpg 1007>, 1792 <&cpg 1008>, <&cpg 1009>, 1793 <&cpg 1010>, <&cpg 1011>, 1794 <&cpg 1012>, <&cpg 1013>, 1795 <&cpg 1014>, <&cpg 1015>; 1796 reset-names = "ssi-all", 1797 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1798 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1799 "ssi.1", "ssi.0"; 1800 status = "disabled"; 1801 1802 rcar_sound,dvc { 1803 dvc0: dvc-0 { 1804 dmas = <&audma1 0xbc>; 1805 dma-names = "tx"; 1806 }; 1807 dvc1: dvc-1 { 1808 dmas = <&audma1 0xbe>; 1809 dma-names = "tx"; 1810 }; 1811 }; 1812 1813 rcar_sound,mix { 1814 mix0: mix-0 { }; 1815 mix1: mix-1 { }; 1816 }; 1817 1818 rcar_sound,ctu { 1819 ctu00: ctu-0 { }; 1820 ctu01: ctu-1 { }; 1821 ctu02: ctu-2 { }; 1822 ctu03: ctu-3 { }; 1823 ctu10: ctu-4 { }; 1824 ctu11: ctu-5 { }; 1825 ctu12: ctu-6 { }; 1826 ctu13: ctu-7 { }; 1827 }; 1828 1829 rcar_sound,src { 1830 src0: src-0 { 1831 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1832 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1833 dma-names = "rx", "tx"; 1834 }; 1835 src1: src-1 { 1836 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1837 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1838 dma-names = "rx", "tx"; 1839 }; 1840 src2: src-2 { 1841 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1842 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1843 dma-names = "rx", "tx"; 1844 }; 1845 src3: src-3 { 1846 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1847 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1848 dma-names = "rx", "tx"; 1849 }; 1850 src4: src-4 { 1851 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1852 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1853 dma-names = "rx", "tx"; 1854 }; 1855 src5: src-5 { 1856 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1857 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1858 dma-names = "rx", "tx"; 1859 }; 1860 src6: src-6 { 1861 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1862 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1863 dma-names = "rx", "tx"; 1864 }; 1865 src7: src-7 { 1866 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1867 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1868 dma-names = "rx", "tx"; 1869 }; 1870 src8: src-8 { 1871 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1872 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1873 dma-names = "rx", "tx"; 1874 }; 1875 src9: src-9 { 1876 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1877 dmas = <&audma0 0x97>, <&audma1 0xba>; 1878 dma-names = "rx", "tx"; 1879 }; 1880 }; 1881 1882 rcar_sound,ssiu { 1883 ssiu00: ssiu-0 { 1884 dmas = <&audma0 0x15>, <&audma1 0x16>; 1885 dma-names = "rx", "tx"; 1886 }; 1887 ssiu01: ssiu-1 { 1888 dmas = <&audma0 0x35>, <&audma1 0x36>; 1889 dma-names = "rx", "tx"; 1890 }; 1891 ssiu02: ssiu-2 { 1892 dmas = <&audma0 0x37>, <&audma1 0x38>; 1893 dma-names = "rx", "tx"; 1894 }; 1895 ssiu03: ssiu-3 { 1896 dmas = <&audma0 0x47>, <&audma1 0x48>; 1897 dma-names = "rx", "tx"; 1898 }; 1899 ssiu04: ssiu-4 { 1900 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1901 dma-names = "rx", "tx"; 1902 }; 1903 ssiu05: ssiu-5 { 1904 dmas = <&audma0 0x43>, <&audma1 0x44>; 1905 dma-names = "rx", "tx"; 1906 }; 1907 ssiu06: ssiu-6 { 1908 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1909 dma-names = "rx", "tx"; 1910 }; 1911 ssiu07: ssiu-7 { 1912 dmas = <&audma0 0x53>, <&audma1 0x54>; 1913 dma-names = "rx", "tx"; 1914 }; 1915 ssiu10: ssiu-8 { 1916 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1917 dma-names = "rx", "tx"; 1918 }; 1919 ssiu11: ssiu-9 { 1920 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1921 dma-names = "rx", "tx"; 1922 }; 1923 ssiu12: ssiu-10 { 1924 dmas = <&audma0 0x57>, <&audma1 0x58>; 1925 dma-names = "rx", "tx"; 1926 }; 1927 ssiu13: ssiu-11 { 1928 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1929 dma-names = "rx", "tx"; 1930 }; 1931 ssiu14: ssiu-12 { 1932 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1933 dma-names = "rx", "tx"; 1934 }; 1935 ssiu15: ssiu-13 { 1936 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1937 dma-names = "rx", "tx"; 1938 }; 1939 ssiu16: ssiu-14 { 1940 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1941 dma-names = "rx", "tx"; 1942 }; 1943 ssiu17: ssiu-15 { 1944 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1945 dma-names = "rx", "tx"; 1946 }; 1947 ssiu20: ssiu-16 { 1948 dmas = <&audma0 0x63>, <&audma1 0x64>; 1949 dma-names = "rx", "tx"; 1950 }; 1951 ssiu21: ssiu-17 { 1952 dmas = <&audma0 0x67>, <&audma1 0x68>; 1953 dma-names = "rx", "tx"; 1954 }; 1955 ssiu22: ssiu-18 { 1956 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1957 dma-names = "rx", "tx"; 1958 }; 1959 ssiu23: ssiu-19 { 1960 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1961 dma-names = "rx", "tx"; 1962 }; 1963 ssiu24: ssiu-20 { 1964 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1965 dma-names = "rx", "tx"; 1966 }; 1967 ssiu25: ssiu-21 { 1968 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1969 dma-names = "rx", "tx"; 1970 }; 1971 ssiu26: ssiu-22 { 1972 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1973 dma-names = "rx", "tx"; 1974 }; 1975 ssiu27: ssiu-23 { 1976 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1977 dma-names = "rx", "tx"; 1978 }; 1979 ssiu30: ssiu-24 { 1980 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1981 dma-names = "rx", "tx"; 1982 }; 1983 ssiu31: ssiu-25 { 1984 dmas = <&audma0 0x21>, <&audma1 0x22>; 1985 dma-names = "rx", "tx"; 1986 }; 1987 ssiu32: ssiu-26 { 1988 dmas = <&audma0 0x23>, <&audma1 0x24>; 1989 dma-names = "rx", "tx"; 1990 }; 1991 ssiu33: ssiu-27 { 1992 dmas = <&audma0 0x25>, <&audma1 0x26>; 1993 dma-names = "rx", "tx"; 1994 }; 1995 ssiu34: ssiu-28 { 1996 dmas = <&audma0 0x27>, <&audma1 0x28>; 1997 dma-names = "rx", "tx"; 1998 }; 1999 ssiu35: ssiu-29 { 2000 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2001 dma-names = "rx", "tx"; 2002 }; 2003 ssiu36: ssiu-30 { 2004 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2005 dma-names = "rx", "tx"; 2006 }; 2007 ssiu37: ssiu-31 { 2008 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2009 dma-names = "rx", "tx"; 2010 }; 2011 ssiu40: ssiu-32 { 2012 dmas = <&audma0 0x71>, <&audma1 0x72>; 2013 dma-names = "rx", "tx"; 2014 }; 2015 ssiu41: ssiu-33 { 2016 dmas = <&audma0 0x17>, <&audma1 0x18>; 2017 dma-names = "rx", "tx"; 2018 }; 2019 ssiu42: ssiu-34 { 2020 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2021 dma-names = "rx", "tx"; 2022 }; 2023 ssiu43: ssiu-35 { 2024 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2025 dma-names = "rx", "tx"; 2026 }; 2027 ssiu44: ssiu-36 { 2028 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2029 dma-names = "rx", "tx"; 2030 }; 2031 ssiu45: ssiu-37 { 2032 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2033 dma-names = "rx", "tx"; 2034 }; 2035 ssiu46: ssiu-38 { 2036 dmas = <&audma0 0x31>, <&audma1 0x32>; 2037 dma-names = "rx", "tx"; 2038 }; 2039 ssiu47: ssiu-39 { 2040 dmas = <&audma0 0x33>, <&audma1 0x34>; 2041 dma-names = "rx", "tx"; 2042 }; 2043 ssiu50: ssiu-40 { 2044 dmas = <&audma0 0x73>, <&audma1 0x74>; 2045 dma-names = "rx", "tx"; 2046 }; 2047 ssiu60: ssiu-41 { 2048 dmas = <&audma0 0x75>, <&audma1 0x76>; 2049 dma-names = "rx", "tx"; 2050 }; 2051 ssiu70: ssiu-42 { 2052 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2053 dma-names = "rx", "tx"; 2054 }; 2055 ssiu80: ssiu-43 { 2056 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2057 dma-names = "rx", "tx"; 2058 }; 2059 ssiu90: ssiu-44 { 2060 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2061 dma-names = "rx", "tx"; 2062 }; 2063 ssiu91: ssiu-45 { 2064 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2065 dma-names = "rx", "tx"; 2066 }; 2067 ssiu92: ssiu-46 { 2068 dmas = <&audma0 0x81>, <&audma1 0x82>; 2069 dma-names = "rx", "tx"; 2070 }; 2071 ssiu93: ssiu-47 { 2072 dmas = <&audma0 0x83>, <&audma1 0x84>; 2073 dma-names = "rx", "tx"; 2074 }; 2075 ssiu94: ssiu-48 { 2076 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2077 dma-names = "rx", "tx"; 2078 }; 2079 ssiu95: ssiu-49 { 2080 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2081 dma-names = "rx", "tx"; 2082 }; 2083 ssiu96: ssiu-50 { 2084 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2085 dma-names = "rx", "tx"; 2086 }; 2087 ssiu97: ssiu-51 { 2088 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2089 dma-names = "rx", "tx"; 2090 }; 2091 }; 2092 2093 rcar_sound,ssi { 2094 ssi0: ssi-0 { 2095 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2096 dmas = <&audma0 0x01>, <&audma1 0x02>; 2097 dma-names = "rx", "tx"; 2098 }; 2099 ssi1: ssi-1 { 2100 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2101 dmas = <&audma0 0x03>, <&audma1 0x04>; 2102 dma-names = "rx", "tx"; 2103 }; 2104 ssi2: ssi-2 { 2105 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2106 dmas = <&audma0 0x05>, <&audma1 0x06>; 2107 dma-names = "rx", "tx"; 2108 }; 2109 ssi3: ssi-3 { 2110 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2111 dmas = <&audma0 0x07>, <&audma1 0x08>; 2112 dma-names = "rx", "tx"; 2113 }; 2114 ssi4: ssi-4 { 2115 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2116 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2117 dma-names = "rx", "tx"; 2118 }; 2119 ssi5: ssi-5 { 2120 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2121 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2122 dma-names = "rx", "tx"; 2123 }; 2124 ssi6: ssi-6 { 2125 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2126 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2127 dma-names = "rx", "tx"; 2128 }; 2129 ssi7: ssi-7 { 2130 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2131 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2132 dma-names = "rx", "tx"; 2133 }; 2134 ssi8: ssi-8 { 2135 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2136 dmas = <&audma0 0x11>, <&audma1 0x12>; 2137 dma-names = "rx", "tx"; 2138 }; 2139 ssi9: ssi-9 { 2140 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2141 dmas = <&audma0 0x13>, <&audma1 0x14>; 2142 dma-names = "rx", "tx"; 2143 }; 2144 }; 2145 }; 2146 2147 audma0: dma-controller@ec700000 { 2148 compatible = "renesas,dmac-r8a77965", 2149 "renesas,rcar-dmac"; 2150 reg = <0 0xec700000 0 0x10000>; 2151 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2152 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2153 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2154 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2155 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2156 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2157 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2158 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2159 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2160 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2161 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2162 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2163 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2164 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2165 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2166 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2167 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2168 interrupt-names = "error", 2169 "ch0", "ch1", "ch2", "ch3", 2170 "ch4", "ch5", "ch6", "ch7", 2171 "ch8", "ch9", "ch10", "ch11", 2172 "ch12", "ch13", "ch14", "ch15"; 2173 clocks = <&cpg CPG_MOD 502>; 2174 clock-names = "fck"; 2175 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2176 resets = <&cpg 502>; 2177 #dma-cells = <1>; 2178 dma-channels = <16>; 2179 }; 2180 2181 audma1: dma-controller@ec720000 { 2182 compatible = "renesas,dmac-r8a77965", 2183 "renesas,rcar-dmac"; 2184 reg = <0 0xec720000 0 0x10000>; 2185 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2186 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2187 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2188 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2189 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2190 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2191 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2192 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2193 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2194 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2195 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2196 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2197 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2198 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2199 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2200 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2201 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2202 interrupt-names = "error", 2203 "ch0", "ch1", "ch2", "ch3", 2204 "ch4", "ch5", "ch6", "ch7", 2205 "ch8", "ch9", "ch10", "ch11", 2206 "ch12", "ch13", "ch14", "ch15"; 2207 clocks = <&cpg CPG_MOD 501>; 2208 clock-names = "fck"; 2209 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2210 resets = <&cpg 501>; 2211 #dma-cells = <1>; 2212 dma-channels = <16>; 2213 }; 2214 2215 xhci0: usb@ee000000 { 2216 compatible = "renesas,xhci-r8a77965", 2217 "renesas,rcar-gen3-xhci"; 2218 reg = <0 0xee000000 0 0xc00>; 2219 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2220 clocks = <&cpg CPG_MOD 328>; 2221 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2222 resets = <&cpg 328>; 2223 status = "disabled"; 2224 }; 2225 2226 usb3_peri0: usb@ee020000 { 2227 compatible = "renesas,r8a77965-usb3-peri", 2228 "renesas,rcar-gen3-usb3-peri"; 2229 reg = <0 0xee020000 0 0x400>; 2230 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2231 clocks = <&cpg CPG_MOD 328>; 2232 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2233 resets = <&cpg 328>; 2234 status = "disabled"; 2235 }; 2236 2237 ohci0: usb@ee080000 { 2238 compatible = "generic-ohci"; 2239 reg = <0 0xee080000 0 0x100>; 2240 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2241 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2242 phys = <&usb2_phy0 1>; 2243 phy-names = "usb"; 2244 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2245 resets = <&cpg 703>, <&cpg 704>; 2246 status = "disabled"; 2247 }; 2248 2249 ohci1: usb@ee0a0000 { 2250 compatible = "generic-ohci"; 2251 reg = <0 0xee0a0000 0 0x100>; 2252 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2253 clocks = <&cpg CPG_MOD 702>; 2254 phys = <&usb2_phy1 1>; 2255 phy-names = "usb"; 2256 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2257 resets = <&cpg 702>; 2258 status = "disabled"; 2259 }; 2260 2261 ehci0: usb@ee080100 { 2262 compatible = "generic-ehci"; 2263 reg = <0 0xee080100 0 0x100>; 2264 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2265 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2266 phys = <&usb2_phy0 2>; 2267 phy-names = "usb"; 2268 companion = <&ohci0>; 2269 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2270 resets = <&cpg 703>, <&cpg 704>; 2271 status = "disabled"; 2272 }; 2273 2274 ehci1: usb@ee0a0100 { 2275 compatible = "generic-ehci"; 2276 reg = <0 0xee0a0100 0 0x100>; 2277 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2278 clocks = <&cpg CPG_MOD 702>; 2279 phys = <&usb2_phy1 2>; 2280 phy-names = "usb"; 2281 companion = <&ohci1>; 2282 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2283 resets = <&cpg 702>; 2284 status = "disabled"; 2285 }; 2286 2287 usb2_phy0: usb-phy@ee080200 { 2288 compatible = "renesas,usb2-phy-r8a77965", 2289 "renesas,rcar-gen3-usb2-phy"; 2290 reg = <0 0xee080200 0 0x700>; 2291 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2292 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2293 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2294 resets = <&cpg 703>, <&cpg 704>; 2295 #phy-cells = <1>; 2296 status = "disabled"; 2297 }; 2298 2299 usb2_phy1: usb-phy@ee0a0200 { 2300 compatible = "renesas,usb2-phy-r8a77965", 2301 "renesas,rcar-gen3-usb2-phy"; 2302 reg = <0 0xee0a0200 0 0x700>; 2303 clocks = <&cpg CPG_MOD 702>; 2304 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2305 resets = <&cpg 702>; 2306 #phy-cells = <1>; 2307 status = "disabled"; 2308 }; 2309 2310 sdhi0: mmc@ee100000 { 2311 compatible = "renesas,sdhi-r8a77965", 2312 "renesas,rcar-gen3-sdhi"; 2313 reg = <0 0xee100000 0 0x2000>; 2314 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2315 clocks = <&cpg CPG_MOD 314>; 2316 max-frequency = <200000000>; 2317 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2318 resets = <&cpg 314>; 2319 iommus = <&ipmmu_ds1 32>; 2320 status = "disabled"; 2321 }; 2322 2323 sdhi1: mmc@ee120000 { 2324 compatible = "renesas,sdhi-r8a77965", 2325 "renesas,rcar-gen3-sdhi"; 2326 reg = <0 0xee120000 0 0x2000>; 2327 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2328 clocks = <&cpg CPG_MOD 313>; 2329 max-frequency = <200000000>; 2330 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2331 resets = <&cpg 313>; 2332 iommus = <&ipmmu_ds1 33>; 2333 status = "disabled"; 2334 }; 2335 2336 sdhi2: mmc@ee140000 { 2337 compatible = "renesas,sdhi-r8a77965", 2338 "renesas,rcar-gen3-sdhi"; 2339 reg = <0 0xee140000 0 0x2000>; 2340 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2341 clocks = <&cpg CPG_MOD 312>; 2342 max-frequency = <200000000>; 2343 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2344 resets = <&cpg 312>; 2345 iommus = <&ipmmu_ds1 34>; 2346 status = "disabled"; 2347 }; 2348 2349 sdhi3: mmc@ee160000 { 2350 compatible = "renesas,sdhi-r8a77965", 2351 "renesas,rcar-gen3-sdhi"; 2352 reg = <0 0xee160000 0 0x2000>; 2353 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2354 clocks = <&cpg CPG_MOD 311>; 2355 max-frequency = <200000000>; 2356 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2357 resets = <&cpg 311>; 2358 iommus = <&ipmmu_ds1 35>; 2359 status = "disabled"; 2360 }; 2361 2362 sata: sata@ee300000 { 2363 compatible = "renesas,sata-r8a77965", 2364 "renesas,rcar-gen3-sata"; 2365 reg = <0 0xee300000 0 0x200000>; 2366 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2367 clocks = <&cpg CPG_MOD 815>; 2368 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2369 resets = <&cpg 815>; 2370 status = "disabled"; 2371 }; 2372 2373 gic: interrupt-controller@f1010000 { 2374 compatible = "arm,gic-400"; 2375 #interrupt-cells = <3>; 2376 #address-cells = <0>; 2377 interrupt-controller; 2378 reg = <0x0 0xf1010000 0 0x1000>, 2379 <0x0 0xf1020000 0 0x20000>, 2380 <0x0 0xf1040000 0 0x20000>, 2381 <0x0 0xf1060000 0 0x20000>; 2382 interrupts = <GIC_PPI 9 2383 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2384 clocks = <&cpg CPG_MOD 408>; 2385 clock-names = "clk"; 2386 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2387 resets = <&cpg 408>; 2388 }; 2389 2390 pciec0: pcie@fe000000 { 2391 compatible = "renesas,pcie-r8a77965", 2392 "renesas,pcie-rcar-gen3"; 2393 reg = <0 0xfe000000 0 0x80000>; 2394 #address-cells = <3>; 2395 #size-cells = <2>; 2396 bus-range = <0x00 0xff>; 2397 device_type = "pci"; 2398 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2399 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2400 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2401 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2402 /* Map all possible DDR as inbound ranges */ 2403 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2404 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2405 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2406 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2407 #interrupt-cells = <1>; 2408 interrupt-map-mask = <0 0 0 0>; 2409 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2410 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2411 clock-names = "pcie", "pcie_bus"; 2412 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2413 resets = <&cpg 319>; 2414 status = "disabled"; 2415 }; 2416 2417 pciec1: pcie@ee800000 { 2418 compatible = "renesas,pcie-r8a77965", 2419 "renesas,pcie-rcar-gen3"; 2420 reg = <0 0xee800000 0 0x80000>; 2421 #address-cells = <3>; 2422 #size-cells = <2>; 2423 bus-range = <0x00 0xff>; 2424 device_type = "pci"; 2425 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2426 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2427 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2428 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2429 /* Map all possible DDR as inbound ranges */ 2430 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2431 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2432 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2433 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2434 #interrupt-cells = <1>; 2435 interrupt-map-mask = <0 0 0 0>; 2436 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2437 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2438 clock-names = "pcie", "pcie_bus"; 2439 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2440 resets = <&cpg 318>; 2441 status = "disabled"; 2442 }; 2443 2444 fdp1@fe940000 { 2445 compatible = "renesas,fdp1"; 2446 reg = <0 0xfe940000 0 0x2400>; 2447 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2448 clocks = <&cpg CPG_MOD 119>; 2449 power-domains = <&sysc R8A77965_PD_A3VP>; 2450 resets = <&cpg 119>; 2451 renesas,fcp = <&fcpf0>; 2452 }; 2453 2454 fcpf0: fcp@fe950000 { 2455 compatible = "renesas,fcpf"; 2456 reg = <0 0xfe950000 0 0x200>; 2457 clocks = <&cpg CPG_MOD 615>; 2458 power-domains = <&sysc R8A77965_PD_A3VP>; 2459 resets = <&cpg 615>; 2460 }; 2461 2462 vspb: vsp@fe960000 { 2463 compatible = "renesas,vsp2"; 2464 reg = <0 0xfe960000 0 0x8000>; 2465 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2466 clocks = <&cpg CPG_MOD 626>; 2467 power-domains = <&sysc R8A77965_PD_A3VP>; 2468 resets = <&cpg 626>; 2469 2470 renesas,fcp = <&fcpvb0>; 2471 }; 2472 2473 vspi0: vsp@fe9a0000 { 2474 compatible = "renesas,vsp2"; 2475 reg = <0 0xfe9a0000 0 0x8000>; 2476 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2477 clocks = <&cpg CPG_MOD 631>; 2478 power-domains = <&sysc R8A77965_PD_A3VP>; 2479 resets = <&cpg 631>; 2480 2481 renesas,fcp = <&fcpvi0>; 2482 }; 2483 2484 vspd0: vsp@fea20000 { 2485 compatible = "renesas,vsp2"; 2486 reg = <0 0xfea20000 0 0x5000>; 2487 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2488 clocks = <&cpg CPG_MOD 623>; 2489 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2490 resets = <&cpg 623>; 2491 2492 renesas,fcp = <&fcpvd0>; 2493 }; 2494 2495 vspd1: vsp@fea28000 { 2496 compatible = "renesas,vsp2"; 2497 reg = <0 0xfea28000 0 0x5000>; 2498 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2499 clocks = <&cpg CPG_MOD 622>; 2500 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2501 resets = <&cpg 622>; 2502 2503 renesas,fcp = <&fcpvd1>; 2504 }; 2505 2506 fcpvb0: fcp@fe96f000 { 2507 compatible = "renesas,fcpv"; 2508 reg = <0 0xfe96f000 0 0x200>; 2509 clocks = <&cpg CPG_MOD 607>; 2510 power-domains = <&sysc R8A77965_PD_A3VP>; 2511 resets = <&cpg 607>; 2512 }; 2513 2514 fcpvd0: fcp@fea27000 { 2515 compatible = "renesas,fcpv"; 2516 reg = <0 0xfea27000 0 0x200>; 2517 clocks = <&cpg CPG_MOD 603>; 2518 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2519 resets = <&cpg 603>; 2520 }; 2521 2522 fcpvd1: fcp@fea2f000 { 2523 compatible = "renesas,fcpv"; 2524 reg = <0 0xfea2f000 0 0x200>; 2525 clocks = <&cpg CPG_MOD 602>; 2526 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2527 resets = <&cpg 602>; 2528 }; 2529 2530 fcpvi0: fcp@fe9af000 { 2531 compatible = "renesas,fcpv"; 2532 reg = <0 0xfe9af000 0 0x200>; 2533 clocks = <&cpg CPG_MOD 611>; 2534 power-domains = <&sysc R8A77965_PD_A3VP>; 2535 resets = <&cpg 611>; 2536 }; 2537 2538 cmm0: cmm@fea40000 { 2539 compatible = "renesas,r8a77965-cmm", 2540 "renesas,rcar-gen3-cmm"; 2541 reg = <0 0xfea40000 0 0x1000>; 2542 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2543 clocks = <&cpg CPG_MOD 711>; 2544 resets = <&cpg 711>; 2545 }; 2546 2547 cmm1: cmm@fea50000 { 2548 compatible = "renesas,r8a77965-cmm", 2549 "renesas,rcar-gen3-cmm"; 2550 reg = <0 0xfea50000 0 0x1000>; 2551 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2552 clocks = <&cpg CPG_MOD 710>; 2553 resets = <&cpg 710>; 2554 }; 2555 2556 cmm3: cmm@fea70000 { 2557 compatible = "renesas,r8a77965-cmm", 2558 "renesas,rcar-gen3-cmm"; 2559 reg = <0 0xfea70000 0 0x1000>; 2560 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2561 clocks = <&cpg CPG_MOD 708>; 2562 resets = <&cpg 708>; 2563 }; 2564 2565 csi20: csi2@fea80000 { 2566 compatible = "renesas,r8a77965-csi2"; 2567 reg = <0 0xfea80000 0 0x10000>; 2568 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2569 clocks = <&cpg CPG_MOD 714>; 2570 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2571 resets = <&cpg 714>; 2572 status = "disabled"; 2573 2574 ports { 2575 #address-cells = <1>; 2576 #size-cells = <0>; 2577 2578 port@0 { 2579 reg = <0>; 2580 }; 2581 2582 port@1 { 2583 #address-cells = <1>; 2584 #size-cells = <0>; 2585 2586 reg = <1>; 2587 2588 csi20vin0: endpoint@0 { 2589 reg = <0>; 2590 remote-endpoint = <&vin0csi20>; 2591 }; 2592 csi20vin1: endpoint@1 { 2593 reg = <1>; 2594 remote-endpoint = <&vin1csi20>; 2595 }; 2596 csi20vin2: endpoint@2 { 2597 reg = <2>; 2598 remote-endpoint = <&vin2csi20>; 2599 }; 2600 csi20vin3: endpoint@3 { 2601 reg = <3>; 2602 remote-endpoint = <&vin3csi20>; 2603 }; 2604 csi20vin4: endpoint@4 { 2605 reg = <4>; 2606 remote-endpoint = <&vin4csi20>; 2607 }; 2608 csi20vin5: endpoint@5 { 2609 reg = <5>; 2610 remote-endpoint = <&vin5csi20>; 2611 }; 2612 csi20vin6: endpoint@6 { 2613 reg = <6>; 2614 remote-endpoint = <&vin6csi20>; 2615 }; 2616 csi20vin7: endpoint@7 { 2617 reg = <7>; 2618 remote-endpoint = <&vin7csi20>; 2619 }; 2620 }; 2621 }; 2622 }; 2623 2624 csi40: csi2@feaa0000 { 2625 compatible = "renesas,r8a77965-csi2"; 2626 reg = <0 0xfeaa0000 0 0x10000>; 2627 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2628 clocks = <&cpg CPG_MOD 716>; 2629 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2630 resets = <&cpg 716>; 2631 status = "disabled"; 2632 2633 ports { 2634 #address-cells = <1>; 2635 #size-cells = <0>; 2636 2637 port@0 { 2638 reg = <0>; 2639 }; 2640 2641 port@1 { 2642 #address-cells = <1>; 2643 #size-cells = <0>; 2644 2645 reg = <1>; 2646 2647 csi40vin0: endpoint@0 { 2648 reg = <0>; 2649 remote-endpoint = <&vin0csi40>; 2650 }; 2651 csi40vin1: endpoint@1 { 2652 reg = <1>; 2653 remote-endpoint = <&vin1csi40>; 2654 }; 2655 csi40vin2: endpoint@2 { 2656 reg = <2>; 2657 remote-endpoint = <&vin2csi40>; 2658 }; 2659 csi40vin3: endpoint@3 { 2660 reg = <3>; 2661 remote-endpoint = <&vin3csi40>; 2662 }; 2663 csi40vin4: endpoint@4 { 2664 reg = <4>; 2665 remote-endpoint = <&vin4csi40>; 2666 }; 2667 csi40vin5: endpoint@5 { 2668 reg = <5>; 2669 remote-endpoint = <&vin5csi40>; 2670 }; 2671 csi40vin6: endpoint@6 { 2672 reg = <6>; 2673 remote-endpoint = <&vin6csi40>; 2674 }; 2675 csi40vin7: endpoint@7 { 2676 reg = <7>; 2677 remote-endpoint = <&vin7csi40>; 2678 }; 2679 }; 2680 }; 2681 }; 2682 2683 hdmi0: hdmi@fead0000 { 2684 compatible = "renesas,r8a77965-hdmi", 2685 "renesas,rcar-gen3-hdmi"; 2686 reg = <0 0xfead0000 0 0x10000>; 2687 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2688 clocks = <&cpg CPG_MOD 729>, 2689 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 2690 clock-names = "iahb", "isfr"; 2691 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2692 resets = <&cpg 729>; 2693 status = "disabled"; 2694 2695 ports { 2696 #address-cells = <1>; 2697 #size-cells = <0>; 2698 port@0 { 2699 reg = <0>; 2700 dw_hdmi0_in: endpoint { 2701 remote-endpoint = <&du_out_hdmi0>; 2702 }; 2703 }; 2704 port@1 { 2705 reg = <1>; 2706 }; 2707 }; 2708 }; 2709 2710 du: display@feb00000 { 2711 compatible = "renesas,du-r8a77965"; 2712 reg = <0 0xfeb00000 0 0x80000>; 2713 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2714 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2715 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2716 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2717 <&cpg CPG_MOD 721>; 2718 clock-names = "du.0", "du.1", "du.3"; 2719 resets = <&cpg 724>, <&cpg 722>; 2720 reset-names = "du.0", "du.3"; 2721 2722 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>; 2723 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2724 2725 status = "disabled"; 2726 2727 ports { 2728 #address-cells = <1>; 2729 #size-cells = <0>; 2730 2731 port@0 { 2732 reg = <0>; 2733 du_out_rgb: endpoint { 2734 }; 2735 }; 2736 port@1 { 2737 reg = <1>; 2738 du_out_hdmi0: endpoint { 2739 remote-endpoint = <&dw_hdmi0_in>; 2740 }; 2741 }; 2742 port@2 { 2743 reg = <2>; 2744 du_out_lvds0: endpoint { 2745 remote-endpoint = <&lvds0_in>; 2746 }; 2747 }; 2748 }; 2749 }; 2750 2751 lvds0: lvds@feb90000 { 2752 compatible = "renesas,r8a77965-lvds"; 2753 reg = <0 0xfeb90000 0 0x14>; 2754 clocks = <&cpg CPG_MOD 727>; 2755 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2756 resets = <&cpg 727>; 2757 status = "disabled"; 2758 2759 ports { 2760 #address-cells = <1>; 2761 #size-cells = <0>; 2762 2763 port@0 { 2764 reg = <0>; 2765 lvds0_in: endpoint { 2766 remote-endpoint = <&du_out_lvds0>; 2767 }; 2768 }; 2769 port@1 { 2770 reg = <1>; 2771 lvds0_out: endpoint { 2772 }; 2773 }; 2774 }; 2775 }; 2776 2777 prr: chipid@fff00044 { 2778 compatible = "renesas,prr"; 2779 reg = <0 0xfff00044 0 4>; 2780 }; 2781 }; 2782 2783 thermal-zones { 2784 sensor_thermal1: sensor-thermal1 { 2785 polling-delay-passive = <250>; 2786 polling-delay = <1000>; 2787 thermal-sensors = <&tsc 0>; 2788 sustainable-power = <2439>; 2789 2790 trips { 2791 sensor1_crit: sensor1-crit { 2792 temperature = <120000>; 2793 hysteresis = <1000>; 2794 type = "critical"; 2795 }; 2796 }; 2797 }; 2798 2799 sensor_thermal2: sensor-thermal2 { 2800 polling-delay-passive = <250>; 2801 polling-delay = <1000>; 2802 thermal-sensors = <&tsc 1>; 2803 sustainable-power = <2439>; 2804 2805 trips { 2806 sensor2_crit: sensor2-crit { 2807 temperature = <120000>; 2808 hysteresis = <1000>; 2809 type = "critical"; 2810 }; 2811 }; 2812 }; 2813 2814 sensor_thermal3: sensor-thermal3 { 2815 polling-delay-passive = <250>; 2816 polling-delay = <1000>; 2817 thermal-sensors = <&tsc 2>; 2818 sustainable-power = <2439>; 2819 2820 trips { 2821 target: trip-point1 { 2822 /* miliCelsius */ 2823 temperature = <100000>; 2824 hysteresis = <1000>; 2825 type = "passive"; 2826 }; 2827 2828 sensor3_crit: sensor3-crit { 2829 temperature = <120000>; 2830 hysteresis = <1000>; 2831 type = "critical"; 2832 }; 2833 }; 2834 2835 cooling-maps { 2836 map0 { 2837 trip = <&target>; 2838 cooling-device = <&a57_0 2 4>; 2839 contribution = <1024>; 2840 }; 2841 }; 2842 }; 2843 }; 2844 2845 timer { 2846 compatible = "arm,armv8-timer"; 2847 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2848 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2849 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2850 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2851 }; 2852 2853 /* External USB clocks - can be overridden by the board */ 2854 usb3s0_clk: usb3s0 { 2855 compatible = "fixed-clock"; 2856 #clock-cells = <0>; 2857 clock-frequency = <0>; 2858 }; 2859 2860 usb_extal_clk: usb_extal { 2861 compatible = "fixed-clock"; 2862 #clock-cells = <0>; 2863 clock-frequency = <0>; 2864 }; 2865}; 2866