1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car H3 (R8A77951) SoC 4 * 5 * Copyright (C) 2015 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7795-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7795-sysc.h> 11 12#define SOC_HAS_HDMI1 13#define SOC_HAS_SATA 14#define SOC_HAS_USB2_CH2 15#define SOC_HAS_USB2_CH3 16 17/ { 18 compatible = "renesas,r8a7795"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 /* 23 * The external audio clocks are configured as 0 Hz fixed frequency 24 * clocks by default. 25 * Boards that provide audio clocks should override them. 26 */ 27 audio_clk_a: audio_clk_a { 28 compatible = "fixed-clock"; 29 #clock-cells = <0>; 30 clock-frequency = <0>; 31 }; 32 33 audio_clk_b: audio_clk_b { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_c: audio_clk_c { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 /* External CAN clock - to be overridden by boards that provide it */ 46 can_clk: can { 47 compatible = "fixed-clock"; 48 #clock-cells = <0>; 49 clock-frequency = <0>; 50 }; 51 52 cluster0_opp: opp-table-0 { 53 compatible = "operating-points-v2"; 54 opp-shared; 55 56 opp-500000000 { 57 opp-hz = /bits/ 64 <500000000>; 58 opp-microvolt = <830000>; 59 clock-latency-ns = <300000>; 60 }; 61 opp-1000000000 { 62 opp-hz = /bits/ 64 <1000000000>; 63 opp-microvolt = <830000>; 64 clock-latency-ns = <300000>; 65 }; 66 opp-1500000000 { 67 opp-hz = /bits/ 64 <1500000000>; 68 opp-microvolt = <830000>; 69 clock-latency-ns = <300000>; 70 opp-suspend; 71 }; 72 opp-1600000000 { 73 opp-hz = /bits/ 64 <1600000000>; 74 opp-microvolt = <900000>; 75 clock-latency-ns = <300000>; 76 }; 77 opp-1700000000 { 78 opp-hz = /bits/ 64 <1700000000>; 79 opp-microvolt = <960000>; 80 clock-latency-ns = <300000>; 81 turbo-mode; 82 }; 83 }; 84 85 cluster1_opp: opp-table-1 { 86 compatible = "operating-points-v2"; 87 opp-shared; 88 89 opp-800000000 { 90 opp-hz = /bits/ 64 <800000000>; 91 opp-microvolt = <820000>; 92 clock-latency-ns = <300000>; 93 }; 94 opp-1000000000 { 95 opp-hz = /bits/ 64 <1000000000>; 96 opp-microvolt = <820000>; 97 clock-latency-ns = <300000>; 98 }; 99 opp-1200000000 { 100 opp-hz = /bits/ 64 <1200000000>; 101 opp-microvolt = <820000>; 102 clock-latency-ns = <300000>; 103 }; 104 }; 105 106 cpus { 107 #address-cells = <1>; 108 #size-cells = <0>; 109 110 cpu-map { 111 cluster0 { 112 core0 { 113 cpu = <&a57_0>; 114 }; 115 core1 { 116 cpu = <&a57_1>; 117 }; 118 core2 { 119 cpu = <&a57_2>; 120 }; 121 core3 { 122 cpu = <&a57_3>; 123 }; 124 }; 125 126 cluster1 { 127 core0 { 128 cpu = <&a53_0>; 129 }; 130 core1 { 131 cpu = <&a53_1>; 132 }; 133 core2 { 134 cpu = <&a53_2>; 135 }; 136 core3 { 137 cpu = <&a53_3>; 138 }; 139 }; 140 }; 141 142 a57_0: cpu@0 { 143 compatible = "arm,cortex-a57"; 144 reg = <0x0>; 145 device_type = "cpu"; 146 power-domains = <&sysc R8A7795_PD_CA57_CPU0>; 147 next-level-cache = <&L2_CA57>; 148 enable-method = "psci"; 149 cpu-idle-states = <&CPU_SLEEP_0>; 150 dynamic-power-coefficient = <854>; 151 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 152 operating-points-v2 = <&cluster0_opp>; 153 capacity-dmips-mhz = <1024>; 154 #cooling-cells = <2>; 155 }; 156 157 a57_1: cpu@1 { 158 compatible = "arm,cortex-a57"; 159 reg = <0x1>; 160 device_type = "cpu"; 161 power-domains = <&sysc R8A7795_PD_CA57_CPU1>; 162 next-level-cache = <&L2_CA57>; 163 enable-method = "psci"; 164 cpu-idle-states = <&CPU_SLEEP_0>; 165 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 166 operating-points-v2 = <&cluster0_opp>; 167 capacity-dmips-mhz = <1024>; 168 #cooling-cells = <2>; 169 }; 170 171 a57_2: cpu@2 { 172 compatible = "arm,cortex-a57"; 173 reg = <0x2>; 174 device_type = "cpu"; 175 power-domains = <&sysc R8A7795_PD_CA57_CPU2>; 176 next-level-cache = <&L2_CA57>; 177 enable-method = "psci"; 178 cpu-idle-states = <&CPU_SLEEP_0>; 179 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 180 operating-points-v2 = <&cluster0_opp>; 181 capacity-dmips-mhz = <1024>; 182 #cooling-cells = <2>; 183 }; 184 185 a57_3: cpu@3 { 186 compatible = "arm,cortex-a57"; 187 reg = <0x3>; 188 device_type = "cpu"; 189 power-domains = <&sysc R8A7795_PD_CA57_CPU3>; 190 next-level-cache = <&L2_CA57>; 191 enable-method = "psci"; 192 cpu-idle-states = <&CPU_SLEEP_0>; 193 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 194 operating-points-v2 = <&cluster0_opp>; 195 capacity-dmips-mhz = <1024>; 196 #cooling-cells = <2>; 197 }; 198 199 a53_0: cpu@100 { 200 compatible = "arm,cortex-a53"; 201 reg = <0x100>; 202 device_type = "cpu"; 203 power-domains = <&sysc R8A7795_PD_CA53_CPU0>; 204 next-level-cache = <&L2_CA53>; 205 enable-method = "psci"; 206 cpu-idle-states = <&CPU_SLEEP_1>; 207 #cooling-cells = <2>; 208 dynamic-power-coefficient = <277>; 209 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 210 operating-points-v2 = <&cluster1_opp>; 211 capacity-dmips-mhz = <535>; 212 }; 213 214 a53_1: cpu@101 { 215 compatible = "arm,cortex-a53"; 216 reg = <0x101>; 217 device_type = "cpu"; 218 power-domains = <&sysc R8A7795_PD_CA53_CPU1>; 219 next-level-cache = <&L2_CA53>; 220 enable-method = "psci"; 221 cpu-idle-states = <&CPU_SLEEP_1>; 222 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 223 operating-points-v2 = <&cluster1_opp>; 224 capacity-dmips-mhz = <535>; 225 }; 226 227 a53_2: cpu@102 { 228 compatible = "arm,cortex-a53"; 229 reg = <0x102>; 230 device_type = "cpu"; 231 power-domains = <&sysc R8A7795_PD_CA53_CPU2>; 232 next-level-cache = <&L2_CA53>; 233 enable-method = "psci"; 234 cpu-idle-states = <&CPU_SLEEP_1>; 235 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 236 operating-points-v2 = <&cluster1_opp>; 237 capacity-dmips-mhz = <535>; 238 }; 239 240 a53_3: cpu@103 { 241 compatible = "arm,cortex-a53"; 242 reg = <0x103>; 243 device_type = "cpu"; 244 power-domains = <&sysc R8A7795_PD_CA53_CPU3>; 245 next-level-cache = <&L2_CA53>; 246 enable-method = "psci"; 247 cpu-idle-states = <&CPU_SLEEP_1>; 248 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 249 operating-points-v2 = <&cluster1_opp>; 250 capacity-dmips-mhz = <535>; 251 }; 252 253 L2_CA57: cache-controller-0 { 254 compatible = "cache"; 255 power-domains = <&sysc R8A7795_PD_CA57_SCU>; 256 cache-unified; 257 cache-level = <2>; 258 }; 259 260 L2_CA53: cache-controller-1 { 261 compatible = "cache"; 262 power-domains = <&sysc R8A7795_PD_CA53_SCU>; 263 cache-unified; 264 cache-level = <2>; 265 }; 266 267 idle-states { 268 entry-method = "psci"; 269 270 CPU_SLEEP_0: cpu-sleep-0 { 271 compatible = "arm,idle-state"; 272 arm,psci-suspend-param = <0x0010000>; 273 local-timer-stop; 274 entry-latency-us = <400>; 275 exit-latency-us = <500>; 276 min-residency-us = <4000>; 277 }; 278 279 CPU_SLEEP_1: cpu-sleep-1 { 280 compatible = "arm,idle-state"; 281 arm,psci-suspend-param = <0x0010000>; 282 local-timer-stop; 283 entry-latency-us = <700>; 284 exit-latency-us = <700>; 285 min-residency-us = <5000>; 286 }; 287 }; 288 }; 289 290 extal_clk: extal { 291 compatible = "fixed-clock"; 292 #clock-cells = <0>; 293 /* This value must be overridden by the board */ 294 clock-frequency = <0>; 295 }; 296 297 extalr_clk: extalr { 298 compatible = "fixed-clock"; 299 #clock-cells = <0>; 300 /* This value must be overridden by the board */ 301 clock-frequency = <0>; 302 }; 303 304 /* External PCIe clock - can be overridden by the board */ 305 pcie_bus_clk: pcie_bus { 306 compatible = "fixed-clock"; 307 #clock-cells = <0>; 308 clock-frequency = <0>; 309 }; 310 311 pmu_a53 { 312 compatible = "arm,cortex-a53-pmu"; 313 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 314 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 315 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 316 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 317 interrupt-affinity = <&a53_0>, 318 <&a53_1>, 319 <&a53_2>, 320 <&a53_3>; 321 }; 322 323 pmu_a57 { 324 compatible = "arm,cortex-a57-pmu"; 325 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 326 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, 327 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, 328 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 329 interrupt-affinity = <&a57_0>, 330 <&a57_1>, 331 <&a57_2>, 332 <&a57_3>; 333 }; 334 335 psci { 336 compatible = "arm,psci-1.0", "arm,psci-0.2"; 337 method = "smc"; 338 }; 339 340 /* External SCIF clock - to be overridden by boards that provide it */ 341 scif_clk: scif { 342 compatible = "fixed-clock"; 343 #clock-cells = <0>; 344 clock-frequency = <0>; 345 }; 346 347 soc: soc { 348 compatible = "simple-bus"; 349 interrupt-parent = <&gic>; 350 351 #address-cells = <2>; 352 #size-cells = <2>; 353 ranges; 354 355 rwdt: watchdog@e6020000 { 356 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; 357 reg = <0 0xe6020000 0 0x0c>; 358 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 359 clocks = <&cpg CPG_MOD 402>; 360 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 361 resets = <&cpg 402>; 362 status = "disabled"; 363 }; 364 365 gpio0: gpio@e6050000 { 366 compatible = "renesas,gpio-r8a7795", 367 "renesas,rcar-gen3-gpio"; 368 reg = <0 0xe6050000 0 0x50>; 369 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 370 #gpio-cells = <2>; 371 gpio-controller; 372 gpio-ranges = <&pfc 0 0 16>; 373 #interrupt-cells = <2>; 374 interrupt-controller; 375 clocks = <&cpg CPG_MOD 912>; 376 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 377 resets = <&cpg 912>; 378 }; 379 380 gpio1: gpio@e6051000 { 381 compatible = "renesas,gpio-r8a7795", 382 "renesas,rcar-gen3-gpio"; 383 reg = <0 0xe6051000 0 0x50>; 384 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 385 #gpio-cells = <2>; 386 gpio-controller; 387 gpio-ranges = <&pfc 0 32 29>; 388 #interrupt-cells = <2>; 389 interrupt-controller; 390 clocks = <&cpg CPG_MOD 911>; 391 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 392 resets = <&cpg 911>; 393 }; 394 395 gpio2: gpio@e6052000 { 396 compatible = "renesas,gpio-r8a7795", 397 "renesas,rcar-gen3-gpio"; 398 reg = <0 0xe6052000 0 0x50>; 399 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 400 #gpio-cells = <2>; 401 gpio-controller; 402 gpio-ranges = <&pfc 0 64 15>; 403 #interrupt-cells = <2>; 404 interrupt-controller; 405 clocks = <&cpg CPG_MOD 910>; 406 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 407 resets = <&cpg 910>; 408 }; 409 410 gpio3: gpio@e6053000 { 411 compatible = "renesas,gpio-r8a7795", 412 "renesas,rcar-gen3-gpio"; 413 reg = <0 0xe6053000 0 0x50>; 414 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 415 #gpio-cells = <2>; 416 gpio-controller; 417 gpio-ranges = <&pfc 0 96 16>; 418 #interrupt-cells = <2>; 419 interrupt-controller; 420 clocks = <&cpg CPG_MOD 909>; 421 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 422 resets = <&cpg 909>; 423 }; 424 425 gpio4: gpio@e6054000 { 426 compatible = "renesas,gpio-r8a7795", 427 "renesas,rcar-gen3-gpio"; 428 reg = <0 0xe6054000 0 0x50>; 429 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 430 #gpio-cells = <2>; 431 gpio-controller; 432 gpio-ranges = <&pfc 0 128 18>; 433 #interrupt-cells = <2>; 434 interrupt-controller; 435 clocks = <&cpg CPG_MOD 908>; 436 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 437 resets = <&cpg 908>; 438 }; 439 440 gpio5: gpio@e6055000 { 441 compatible = "renesas,gpio-r8a7795", 442 "renesas,rcar-gen3-gpio"; 443 reg = <0 0xe6055000 0 0x50>; 444 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 445 #gpio-cells = <2>; 446 gpio-controller; 447 gpio-ranges = <&pfc 0 160 26>; 448 #interrupt-cells = <2>; 449 interrupt-controller; 450 clocks = <&cpg CPG_MOD 907>; 451 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 452 resets = <&cpg 907>; 453 }; 454 455 gpio6: gpio@e6055400 { 456 compatible = "renesas,gpio-r8a7795", 457 "renesas,rcar-gen3-gpio"; 458 reg = <0 0xe6055400 0 0x50>; 459 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 460 #gpio-cells = <2>; 461 gpio-controller; 462 gpio-ranges = <&pfc 0 192 32>; 463 #interrupt-cells = <2>; 464 interrupt-controller; 465 clocks = <&cpg CPG_MOD 906>; 466 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 467 resets = <&cpg 906>; 468 }; 469 470 gpio7: gpio@e6055800 { 471 compatible = "renesas,gpio-r8a7795", 472 "renesas,rcar-gen3-gpio"; 473 reg = <0 0xe6055800 0 0x50>; 474 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 475 #gpio-cells = <2>; 476 gpio-controller; 477 gpio-ranges = <&pfc 0 224 4>; 478 #interrupt-cells = <2>; 479 interrupt-controller; 480 clocks = <&cpg CPG_MOD 905>; 481 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 482 resets = <&cpg 905>; 483 }; 484 485 pfc: pinctrl@e6060000 { 486 compatible = "renesas,pfc-r8a7795"; 487 reg = <0 0xe6060000 0 0x50c>; 488 }; 489 490 cmt0: timer@e60f0000 { 491 compatible = "renesas,r8a7795-cmt0", 492 "renesas,rcar-gen3-cmt0"; 493 reg = <0 0xe60f0000 0 0x1004>; 494 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 495 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 496 clocks = <&cpg CPG_MOD 303>; 497 clock-names = "fck"; 498 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 499 resets = <&cpg 303>; 500 status = "disabled"; 501 }; 502 503 cmt1: timer@e6130000 { 504 compatible = "renesas,r8a7795-cmt1", 505 "renesas,rcar-gen3-cmt1"; 506 reg = <0 0xe6130000 0 0x1004>; 507 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 508 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 509 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 510 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 511 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 513 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 514 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 515 clocks = <&cpg CPG_MOD 302>; 516 clock-names = "fck"; 517 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 518 resets = <&cpg 302>; 519 status = "disabled"; 520 }; 521 522 cmt2: timer@e6140000 { 523 compatible = "renesas,r8a7795-cmt1", 524 "renesas,rcar-gen3-cmt1"; 525 reg = <0 0xe6140000 0 0x1004>; 526 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 529 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 530 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 531 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 532 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 533 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 534 clocks = <&cpg CPG_MOD 301>; 535 clock-names = "fck"; 536 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 537 resets = <&cpg 301>; 538 status = "disabled"; 539 }; 540 541 cmt3: timer@e6148000 { 542 compatible = "renesas,r8a7795-cmt1", 543 "renesas,rcar-gen3-cmt1"; 544 reg = <0 0xe6148000 0 0x1004>; 545 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 546 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 547 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 548 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 549 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 550 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 551 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 552 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 553 clocks = <&cpg CPG_MOD 300>; 554 clock-names = "fck"; 555 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 556 resets = <&cpg 300>; 557 status = "disabled"; 558 }; 559 560 cpg: clock-controller@e6150000 { 561 compatible = "renesas,r8a7795-cpg-mssr"; 562 reg = <0 0xe6150000 0 0x1000>; 563 clocks = <&extal_clk>, <&extalr_clk>; 564 clock-names = "extal", "extalr"; 565 #clock-cells = <2>; 566 #power-domain-cells = <0>; 567 #reset-cells = <1>; 568 }; 569 570 rst: reset-controller@e6160000 { 571 compatible = "renesas,r8a7795-rst"; 572 reg = <0 0xe6160000 0 0x0200>; 573 }; 574 575 sysc: system-controller@e6180000 { 576 compatible = "renesas,r8a7795-sysc"; 577 reg = <0 0xe6180000 0 0x0400>; 578 #power-domain-cells = <1>; 579 }; 580 581 tsc: thermal@e6198000 { 582 compatible = "renesas,r8a7795-thermal"; 583 reg = <0 0xe6198000 0 0x100>, 584 <0 0xe61a0000 0 0x100>, 585 <0 0xe61a8000 0 0x100>; 586 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 587 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 588 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 589 clocks = <&cpg CPG_MOD 522>; 590 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 591 resets = <&cpg 522>; 592 #thermal-sensor-cells = <1>; 593 }; 594 595 intc_ex: interrupt-controller@e61c0000 { 596 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc"; 597 #interrupt-cells = <2>; 598 interrupt-controller; 599 reg = <0 0xe61c0000 0 0x200>; 600 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 601 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 602 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 603 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 604 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 605 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 606 clocks = <&cpg CPG_MOD 407>; 607 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 608 resets = <&cpg 407>; 609 }; 610 611 tmu0: timer@e61e0000 { 612 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 613 reg = <0 0xe61e0000 0 0x30>; 614 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 615 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 616 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 617 clocks = <&cpg CPG_MOD 125>; 618 clock-names = "fck"; 619 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 620 resets = <&cpg 125>; 621 status = "disabled"; 622 }; 623 624 tmu1: timer@e6fc0000 { 625 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 626 reg = <0 0xe6fc0000 0 0x30>; 627 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 628 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 629 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 630 clocks = <&cpg CPG_MOD 124>; 631 clock-names = "fck"; 632 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 633 resets = <&cpg 124>; 634 status = "disabled"; 635 }; 636 637 tmu2: timer@e6fd0000 { 638 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 639 reg = <0 0xe6fd0000 0 0x30>; 640 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 643 clocks = <&cpg CPG_MOD 123>; 644 clock-names = "fck"; 645 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 646 resets = <&cpg 123>; 647 status = "disabled"; 648 }; 649 650 tmu3: timer@e6fe0000 { 651 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 652 reg = <0 0xe6fe0000 0 0x30>; 653 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 654 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 655 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 656 clocks = <&cpg CPG_MOD 122>; 657 clock-names = "fck"; 658 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 659 resets = <&cpg 122>; 660 status = "disabled"; 661 }; 662 663 tmu4: timer@ffc00000 { 664 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 665 reg = <0 0xffc00000 0 0x30>; 666 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 667 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 668 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 669 clocks = <&cpg CPG_MOD 121>; 670 clock-names = "fck"; 671 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 672 resets = <&cpg 121>; 673 status = "disabled"; 674 }; 675 676 i2c0: i2c@e6500000 { 677 #address-cells = <1>; 678 #size-cells = <0>; 679 compatible = "renesas,i2c-r8a7795", 680 "renesas,rcar-gen3-i2c"; 681 reg = <0 0xe6500000 0 0x40>; 682 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 683 clocks = <&cpg CPG_MOD 931>; 684 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 685 resets = <&cpg 931>; 686 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 687 <&dmac2 0x91>, <&dmac2 0x90>; 688 dma-names = "tx", "rx", "tx", "rx"; 689 i2c-scl-internal-delay-ns = <110>; 690 status = "disabled"; 691 }; 692 693 i2c1: i2c@e6508000 { 694 #address-cells = <1>; 695 #size-cells = <0>; 696 compatible = "renesas,i2c-r8a7795", 697 "renesas,rcar-gen3-i2c"; 698 reg = <0 0xe6508000 0 0x40>; 699 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 700 clocks = <&cpg CPG_MOD 930>; 701 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 702 resets = <&cpg 930>; 703 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 704 <&dmac2 0x93>, <&dmac2 0x92>; 705 dma-names = "tx", "rx", "tx", "rx"; 706 i2c-scl-internal-delay-ns = <6>; 707 status = "disabled"; 708 }; 709 710 i2c2: i2c@e6510000 { 711 #address-cells = <1>; 712 #size-cells = <0>; 713 compatible = "renesas,i2c-r8a7795", 714 "renesas,rcar-gen3-i2c"; 715 reg = <0 0xe6510000 0 0x40>; 716 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 717 clocks = <&cpg CPG_MOD 929>; 718 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 719 resets = <&cpg 929>; 720 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 721 <&dmac2 0x95>, <&dmac2 0x94>; 722 dma-names = "tx", "rx", "tx", "rx"; 723 i2c-scl-internal-delay-ns = <6>; 724 status = "disabled"; 725 }; 726 727 i2c3: i2c@e66d0000 { 728 #address-cells = <1>; 729 #size-cells = <0>; 730 compatible = "renesas,i2c-r8a7795", 731 "renesas,rcar-gen3-i2c"; 732 reg = <0 0xe66d0000 0 0x40>; 733 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 734 clocks = <&cpg CPG_MOD 928>; 735 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 736 resets = <&cpg 928>; 737 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 738 dma-names = "tx", "rx"; 739 i2c-scl-internal-delay-ns = <110>; 740 status = "disabled"; 741 }; 742 743 i2c4: i2c@e66d8000 { 744 #address-cells = <1>; 745 #size-cells = <0>; 746 compatible = "renesas,i2c-r8a7795", 747 "renesas,rcar-gen3-i2c"; 748 reg = <0 0xe66d8000 0 0x40>; 749 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 750 clocks = <&cpg CPG_MOD 927>; 751 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 752 resets = <&cpg 927>; 753 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 754 dma-names = "tx", "rx"; 755 i2c-scl-internal-delay-ns = <110>; 756 status = "disabled"; 757 }; 758 759 i2c5: i2c@e66e0000 { 760 #address-cells = <1>; 761 #size-cells = <0>; 762 compatible = "renesas,i2c-r8a7795", 763 "renesas,rcar-gen3-i2c"; 764 reg = <0 0xe66e0000 0 0x40>; 765 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 766 clocks = <&cpg CPG_MOD 919>; 767 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 768 resets = <&cpg 919>; 769 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 770 dma-names = "tx", "rx"; 771 i2c-scl-internal-delay-ns = <110>; 772 status = "disabled"; 773 }; 774 775 i2c6: i2c@e66e8000 { 776 #address-cells = <1>; 777 #size-cells = <0>; 778 compatible = "renesas,i2c-r8a7795", 779 "renesas,rcar-gen3-i2c"; 780 reg = <0 0xe66e8000 0 0x40>; 781 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 782 clocks = <&cpg CPG_MOD 918>; 783 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 784 resets = <&cpg 918>; 785 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 786 dma-names = "tx", "rx"; 787 i2c-scl-internal-delay-ns = <6>; 788 status = "disabled"; 789 }; 790 791 i2c_dvfs: i2c@e60b0000 { 792 #address-cells = <1>; 793 #size-cells = <0>; 794 compatible = "renesas,iic-r8a7795", 795 "renesas,rcar-gen3-iic", 796 "renesas,rmobile-iic"; 797 reg = <0 0xe60b0000 0 0x425>; 798 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 799 clocks = <&cpg CPG_MOD 926>; 800 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 801 resets = <&cpg 926>; 802 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 803 dma-names = "tx", "rx"; 804 status = "disabled"; 805 }; 806 807 hscif0: serial@e6540000 { 808 compatible = "renesas,hscif-r8a7795", 809 "renesas,rcar-gen3-hscif", 810 "renesas,hscif"; 811 reg = <0 0xe6540000 0 96>; 812 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 813 clocks = <&cpg CPG_MOD 520>, 814 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 815 <&scif_clk>; 816 clock-names = "fck", "brg_int", "scif_clk"; 817 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 818 <&dmac2 0x31>, <&dmac2 0x30>; 819 dma-names = "tx", "rx", "tx", "rx"; 820 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 821 resets = <&cpg 520>; 822 status = "disabled"; 823 }; 824 825 hscif1: serial@e6550000 { 826 compatible = "renesas,hscif-r8a7795", 827 "renesas,rcar-gen3-hscif", 828 "renesas,hscif"; 829 reg = <0 0xe6550000 0 96>; 830 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 831 clocks = <&cpg CPG_MOD 519>, 832 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 833 <&scif_clk>; 834 clock-names = "fck", "brg_int", "scif_clk"; 835 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 836 <&dmac2 0x33>, <&dmac2 0x32>; 837 dma-names = "tx", "rx", "tx", "rx"; 838 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 839 resets = <&cpg 519>; 840 status = "disabled"; 841 }; 842 843 hscif2: serial@e6560000 { 844 compatible = "renesas,hscif-r8a7795", 845 "renesas,rcar-gen3-hscif", 846 "renesas,hscif"; 847 reg = <0 0xe6560000 0 96>; 848 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 849 clocks = <&cpg CPG_MOD 518>, 850 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 851 <&scif_clk>; 852 clock-names = "fck", "brg_int", "scif_clk"; 853 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 854 <&dmac2 0x35>, <&dmac2 0x34>; 855 dma-names = "tx", "rx", "tx", "rx"; 856 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 857 resets = <&cpg 518>; 858 status = "disabled"; 859 }; 860 861 hscif3: serial@e66a0000 { 862 compatible = "renesas,hscif-r8a7795", 863 "renesas,rcar-gen3-hscif", 864 "renesas,hscif"; 865 reg = <0 0xe66a0000 0 96>; 866 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 867 clocks = <&cpg CPG_MOD 517>, 868 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 869 <&scif_clk>; 870 clock-names = "fck", "brg_int", "scif_clk"; 871 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 872 dma-names = "tx", "rx"; 873 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 874 resets = <&cpg 517>; 875 status = "disabled"; 876 }; 877 878 hscif4: serial@e66b0000 { 879 compatible = "renesas,hscif-r8a7795", 880 "renesas,rcar-gen3-hscif", 881 "renesas,hscif"; 882 reg = <0 0xe66b0000 0 96>; 883 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 884 clocks = <&cpg CPG_MOD 516>, 885 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 886 <&scif_clk>; 887 clock-names = "fck", "brg_int", "scif_clk"; 888 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 889 dma-names = "tx", "rx"; 890 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 891 resets = <&cpg 516>; 892 status = "disabled"; 893 }; 894 895 hsusb: usb@e6590000 { 896 compatible = "renesas,usbhs-r8a7795", 897 "renesas,rcar-gen3-usbhs"; 898 reg = <0 0xe6590000 0 0x200>; 899 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 900 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 901 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 902 <&usb_dmac1 0>, <&usb_dmac1 1>; 903 dma-names = "ch0", "ch1", "ch2", "ch3"; 904 renesas,buswait = <11>; 905 phys = <&usb2_phy0 3>; 906 phy-names = "usb"; 907 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 908 resets = <&cpg 704>, <&cpg 703>; 909 status = "disabled"; 910 }; 911 912 hsusb3: usb@e659c000 { 913 compatible = "renesas,usbhs-r8a7795", 914 "renesas,rcar-gen3-usbhs"; 915 reg = <0 0xe659c000 0 0x200>; 916 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 917 clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>; 918 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>, 919 <&usb_dmac3 0>, <&usb_dmac3 1>; 920 dma-names = "ch0", "ch1", "ch2", "ch3"; 921 renesas,buswait = <11>; 922 phys = <&usb2_phy3 3>; 923 phy-names = "usb"; 924 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 925 resets = <&cpg 705>, <&cpg 700>; 926 status = "disabled"; 927 }; 928 929 usb_dmac0: dma-controller@e65a0000 { 930 compatible = "renesas,r8a7795-usb-dmac", 931 "renesas,usb-dmac"; 932 reg = <0 0xe65a0000 0 0x100>; 933 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 934 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 935 interrupt-names = "ch0", "ch1"; 936 clocks = <&cpg CPG_MOD 330>; 937 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 938 resets = <&cpg 330>; 939 #dma-cells = <1>; 940 dma-channels = <2>; 941 }; 942 943 usb_dmac1: dma-controller@e65b0000 { 944 compatible = "renesas,r8a7795-usb-dmac", 945 "renesas,usb-dmac"; 946 reg = <0 0xe65b0000 0 0x100>; 947 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 948 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 949 interrupt-names = "ch0", "ch1"; 950 clocks = <&cpg CPG_MOD 331>; 951 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 952 resets = <&cpg 331>; 953 #dma-cells = <1>; 954 dma-channels = <2>; 955 }; 956 957 usb_dmac2: dma-controller@e6460000 { 958 compatible = "renesas,r8a7795-usb-dmac", 959 "renesas,usb-dmac"; 960 reg = <0 0xe6460000 0 0x100>; 961 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 963 interrupt-names = "ch0", "ch1"; 964 clocks = <&cpg CPG_MOD 326>; 965 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 966 resets = <&cpg 326>; 967 #dma-cells = <1>; 968 dma-channels = <2>; 969 }; 970 971 usb_dmac3: dma-controller@e6470000 { 972 compatible = "renesas,r8a7795-usb-dmac", 973 "renesas,usb-dmac"; 974 reg = <0 0xe6470000 0 0x100>; 975 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 977 interrupt-names = "ch0", "ch1"; 978 clocks = <&cpg CPG_MOD 329>; 979 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 980 resets = <&cpg 329>; 981 #dma-cells = <1>; 982 dma-channels = <2>; 983 }; 984 985 usb3_phy0: usb-phy@e65ee000 { 986 compatible = "renesas,r8a7795-usb3-phy", 987 "renesas,rcar-gen3-usb3-phy"; 988 reg = <0 0xe65ee000 0 0x90>; 989 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 990 <&usb_extal_clk>; 991 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 992 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 993 resets = <&cpg 328>; 994 #phy-cells = <0>; 995 status = "disabled"; 996 }; 997 998 arm_cc630p: crypto@e6601000 { 999 compatible = "arm,cryptocell-630p-ree"; 1000 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 1001 reg = <0x0 0xe6601000 0 0x1000>; 1002 clocks = <&cpg CPG_MOD 229>; 1003 resets = <&cpg 229>; 1004 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1005 }; 1006 1007 dmac0: dma-controller@e6700000 { 1008 compatible = "renesas,dmac-r8a7795", 1009 "renesas,rcar-dmac"; 1010 reg = <0 0xe6700000 0 0x10000>; 1011 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 1012 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 1013 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 1014 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 1015 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 1016 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 1017 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 1018 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 1019 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 1020 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 1021 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 1022 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 1023 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 1024 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 1028 interrupt-names = "error", 1029 "ch0", "ch1", "ch2", "ch3", 1030 "ch4", "ch5", "ch6", "ch7", 1031 "ch8", "ch9", "ch10", "ch11", 1032 "ch12", "ch13", "ch14", "ch15"; 1033 clocks = <&cpg CPG_MOD 219>; 1034 clock-names = "fck"; 1035 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1036 resets = <&cpg 219>; 1037 #dma-cells = <1>; 1038 dma-channels = <16>; 1039 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1040 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1041 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1042 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1043 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1044 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1045 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1046 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1047 }; 1048 1049 dmac1: dma-controller@e7300000 { 1050 compatible = "renesas,dmac-r8a7795", 1051 "renesas,rcar-dmac"; 1052 reg = <0 0xe7300000 0 0x10000>; 1053 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 1054 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 1055 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 1056 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 1057 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 1058 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 1059 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 1060 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 1061 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 1062 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 1063 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 1064 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 1065 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 1066 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1067 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1068 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1069 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 1070 interrupt-names = "error", 1071 "ch0", "ch1", "ch2", "ch3", 1072 "ch4", "ch5", "ch6", "ch7", 1073 "ch8", "ch9", "ch10", "ch11", 1074 "ch12", "ch13", "ch14", "ch15"; 1075 clocks = <&cpg CPG_MOD 218>; 1076 clock-names = "fck"; 1077 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1078 resets = <&cpg 218>; 1079 #dma-cells = <1>; 1080 dma-channels = <16>; 1081 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 1082 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 1083 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 1084 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 1085 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 1086 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 1087 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 1088 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 1089 }; 1090 1091 dmac2: dma-controller@e7310000 { 1092 compatible = "renesas,dmac-r8a7795", 1093 "renesas,rcar-dmac"; 1094 reg = <0 0xe7310000 0 0x10000>; 1095 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 1096 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 1097 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1098 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1099 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 1100 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1101 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 1102 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1103 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1104 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1105 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 1106 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 1107 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 1108 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 1109 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 1110 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 1111 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1112 interrupt-names = "error", 1113 "ch0", "ch1", "ch2", "ch3", 1114 "ch4", "ch5", "ch6", "ch7", 1115 "ch8", "ch9", "ch10", "ch11", 1116 "ch12", "ch13", "ch14", "ch15"; 1117 clocks = <&cpg CPG_MOD 217>; 1118 clock-names = "fck"; 1119 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1120 resets = <&cpg 217>; 1121 #dma-cells = <1>; 1122 dma-channels = <16>; 1123 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 1124 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 1125 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 1126 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 1127 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 1128 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 1129 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 1130 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 1131 }; 1132 1133 ipmmu_ds0: iommu@e6740000 { 1134 compatible = "renesas,ipmmu-r8a7795"; 1135 reg = <0 0xe6740000 0 0x1000>; 1136 renesas,ipmmu-main = <&ipmmu_mm 0>; 1137 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1138 #iommu-cells = <1>; 1139 }; 1140 1141 ipmmu_ds1: iommu@e7740000 { 1142 compatible = "renesas,ipmmu-r8a7795"; 1143 reg = <0 0xe7740000 0 0x1000>; 1144 renesas,ipmmu-main = <&ipmmu_mm 1>; 1145 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1146 #iommu-cells = <1>; 1147 }; 1148 1149 ipmmu_hc: iommu@e6570000 { 1150 compatible = "renesas,ipmmu-r8a7795"; 1151 reg = <0 0xe6570000 0 0x1000>; 1152 renesas,ipmmu-main = <&ipmmu_mm 2>; 1153 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1154 #iommu-cells = <1>; 1155 }; 1156 1157 ipmmu_ir: iommu@ff8b0000 { 1158 compatible = "renesas,ipmmu-r8a7795"; 1159 reg = <0 0xff8b0000 0 0x1000>; 1160 renesas,ipmmu-main = <&ipmmu_mm 3>; 1161 power-domains = <&sysc R8A7795_PD_A3IR>; 1162 #iommu-cells = <1>; 1163 }; 1164 1165 ipmmu_mm: iommu@e67b0000 { 1166 compatible = "renesas,ipmmu-r8a7795"; 1167 reg = <0 0xe67b0000 0 0x1000>; 1168 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1169 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1170 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1171 #iommu-cells = <1>; 1172 }; 1173 1174 ipmmu_mp0: iommu@ec670000 { 1175 compatible = "renesas,ipmmu-r8a7795"; 1176 reg = <0 0xec670000 0 0x1000>; 1177 renesas,ipmmu-main = <&ipmmu_mm 4>; 1178 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1179 #iommu-cells = <1>; 1180 }; 1181 1182 ipmmu_pv0: iommu@fd800000 { 1183 compatible = "renesas,ipmmu-r8a7795"; 1184 reg = <0 0xfd800000 0 0x1000>; 1185 renesas,ipmmu-main = <&ipmmu_mm 6>; 1186 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1187 #iommu-cells = <1>; 1188 }; 1189 1190 ipmmu_pv1: iommu@fd950000 { 1191 compatible = "renesas,ipmmu-r8a7795"; 1192 reg = <0 0xfd950000 0 0x1000>; 1193 renesas,ipmmu-main = <&ipmmu_mm 7>; 1194 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1195 #iommu-cells = <1>; 1196 }; 1197 1198 ipmmu_pv2: iommu@fd960000 { 1199 compatible = "renesas,ipmmu-r8a7795"; 1200 reg = <0 0xfd960000 0 0x1000>; 1201 renesas,ipmmu-main = <&ipmmu_mm 8>; 1202 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1203 #iommu-cells = <1>; 1204 }; 1205 1206 ipmmu_pv3: iommu@fd970000 { 1207 compatible = "renesas,ipmmu-r8a7795"; 1208 reg = <0 0xfd970000 0 0x1000>; 1209 renesas,ipmmu-main = <&ipmmu_mm 9>; 1210 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1211 #iommu-cells = <1>; 1212 }; 1213 1214 ipmmu_rt: iommu@ffc80000 { 1215 compatible = "renesas,ipmmu-r8a7795"; 1216 reg = <0 0xffc80000 0 0x1000>; 1217 renesas,ipmmu-main = <&ipmmu_mm 10>; 1218 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1219 #iommu-cells = <1>; 1220 }; 1221 1222 ipmmu_vc0: iommu@fe6b0000 { 1223 compatible = "renesas,ipmmu-r8a7795"; 1224 reg = <0 0xfe6b0000 0 0x1000>; 1225 renesas,ipmmu-main = <&ipmmu_mm 12>; 1226 power-domains = <&sysc R8A7795_PD_A3VC>; 1227 #iommu-cells = <1>; 1228 }; 1229 1230 ipmmu_vc1: iommu@fe6f0000 { 1231 compatible = "renesas,ipmmu-r8a7795"; 1232 reg = <0 0xfe6f0000 0 0x1000>; 1233 renesas,ipmmu-main = <&ipmmu_mm 13>; 1234 power-domains = <&sysc R8A7795_PD_A3VC>; 1235 #iommu-cells = <1>; 1236 }; 1237 1238 ipmmu_vi0: iommu@febd0000 { 1239 compatible = "renesas,ipmmu-r8a7795"; 1240 reg = <0 0xfebd0000 0 0x1000>; 1241 renesas,ipmmu-main = <&ipmmu_mm 14>; 1242 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1243 #iommu-cells = <1>; 1244 }; 1245 1246 ipmmu_vi1: iommu@febe0000 { 1247 compatible = "renesas,ipmmu-r8a7795"; 1248 reg = <0 0xfebe0000 0 0x1000>; 1249 renesas,ipmmu-main = <&ipmmu_mm 15>; 1250 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1251 #iommu-cells = <1>; 1252 }; 1253 1254 ipmmu_vp0: iommu@fe990000 { 1255 compatible = "renesas,ipmmu-r8a7795"; 1256 reg = <0 0xfe990000 0 0x1000>; 1257 renesas,ipmmu-main = <&ipmmu_mm 16>; 1258 power-domains = <&sysc R8A7795_PD_A3VP>; 1259 #iommu-cells = <1>; 1260 }; 1261 1262 ipmmu_vp1: iommu@fe980000 { 1263 compatible = "renesas,ipmmu-r8a7795"; 1264 reg = <0 0xfe980000 0 0x1000>; 1265 renesas,ipmmu-main = <&ipmmu_mm 17>; 1266 power-domains = <&sysc R8A7795_PD_A3VP>; 1267 #iommu-cells = <1>; 1268 }; 1269 1270 avb: ethernet@e6800000 { 1271 compatible = "renesas,etheravb-r8a7795", 1272 "renesas,etheravb-rcar-gen3"; 1273 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1274 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1275 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1276 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1277 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1278 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1279 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1280 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1281 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1282 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1283 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1284 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1285 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1286 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1287 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1288 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1289 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1290 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1291 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1292 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1293 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1294 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1295 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1296 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1297 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1298 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1299 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1300 "ch4", "ch5", "ch6", "ch7", 1301 "ch8", "ch9", "ch10", "ch11", 1302 "ch12", "ch13", "ch14", "ch15", 1303 "ch16", "ch17", "ch18", "ch19", 1304 "ch20", "ch21", "ch22", "ch23", 1305 "ch24"; 1306 clocks = <&cpg CPG_MOD 812>; 1307 clock-names = "fck"; 1308 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1309 resets = <&cpg 812>; 1310 phy-mode = "rgmii"; 1311 rx-internal-delay-ps = <0>; 1312 tx-internal-delay-ps = <0>; 1313 iommus = <&ipmmu_ds0 16>; 1314 #address-cells = <1>; 1315 #size-cells = <0>; 1316 status = "disabled"; 1317 }; 1318 1319 can0: can@e6c30000 { 1320 compatible = "renesas,can-r8a7795", 1321 "renesas,rcar-gen3-can"; 1322 reg = <0 0xe6c30000 0 0x1000>; 1323 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1324 clocks = <&cpg CPG_MOD 916>, 1325 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1326 <&can_clk>; 1327 clock-names = "clkp1", "clkp2", "can_clk"; 1328 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1329 assigned-clock-rates = <40000000>; 1330 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1331 resets = <&cpg 916>; 1332 status = "disabled"; 1333 }; 1334 1335 can1: can@e6c38000 { 1336 compatible = "renesas,can-r8a7795", 1337 "renesas,rcar-gen3-can"; 1338 reg = <0 0xe6c38000 0 0x1000>; 1339 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1340 clocks = <&cpg CPG_MOD 915>, 1341 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1342 <&can_clk>; 1343 clock-names = "clkp1", "clkp2", "can_clk"; 1344 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1345 assigned-clock-rates = <40000000>; 1346 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1347 resets = <&cpg 915>; 1348 status = "disabled"; 1349 }; 1350 1351 canfd: can@e66c0000 { 1352 compatible = "renesas,r8a7795-canfd", 1353 "renesas,rcar-gen3-canfd"; 1354 reg = <0 0xe66c0000 0 0x8000>; 1355 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1356 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1357 interrupt-names = "ch_int", "g_int"; 1358 clocks = <&cpg CPG_MOD 914>, 1359 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1360 <&can_clk>; 1361 clock-names = "fck", "canfd", "can_clk"; 1362 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1363 assigned-clock-rates = <40000000>; 1364 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1365 resets = <&cpg 914>; 1366 status = "disabled"; 1367 1368 channel0 { 1369 status = "disabled"; 1370 }; 1371 1372 channel1 { 1373 status = "disabled"; 1374 }; 1375 }; 1376 1377 pwm0: pwm@e6e30000 { 1378 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1379 reg = <0 0xe6e30000 0 0x8>; 1380 clocks = <&cpg CPG_MOD 523>; 1381 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1382 resets = <&cpg 523>; 1383 #pwm-cells = <2>; 1384 status = "disabled"; 1385 }; 1386 1387 pwm1: pwm@e6e31000 { 1388 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1389 reg = <0 0xe6e31000 0 0x8>; 1390 clocks = <&cpg CPG_MOD 523>; 1391 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1392 resets = <&cpg 523>; 1393 #pwm-cells = <2>; 1394 status = "disabled"; 1395 }; 1396 1397 pwm2: pwm@e6e32000 { 1398 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1399 reg = <0 0xe6e32000 0 0x8>; 1400 clocks = <&cpg CPG_MOD 523>; 1401 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1402 resets = <&cpg 523>; 1403 #pwm-cells = <2>; 1404 status = "disabled"; 1405 }; 1406 1407 pwm3: pwm@e6e33000 { 1408 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1409 reg = <0 0xe6e33000 0 0x8>; 1410 clocks = <&cpg CPG_MOD 523>; 1411 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1412 resets = <&cpg 523>; 1413 #pwm-cells = <2>; 1414 status = "disabled"; 1415 }; 1416 1417 pwm4: pwm@e6e34000 { 1418 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1419 reg = <0 0xe6e34000 0 0x8>; 1420 clocks = <&cpg CPG_MOD 523>; 1421 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1422 resets = <&cpg 523>; 1423 #pwm-cells = <2>; 1424 status = "disabled"; 1425 }; 1426 1427 pwm5: pwm@e6e35000 { 1428 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1429 reg = <0 0xe6e35000 0 0x8>; 1430 clocks = <&cpg CPG_MOD 523>; 1431 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1432 resets = <&cpg 523>; 1433 #pwm-cells = <2>; 1434 status = "disabled"; 1435 }; 1436 1437 pwm6: pwm@e6e36000 { 1438 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1439 reg = <0 0xe6e36000 0 0x8>; 1440 clocks = <&cpg CPG_MOD 523>; 1441 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1442 resets = <&cpg 523>; 1443 #pwm-cells = <2>; 1444 status = "disabled"; 1445 }; 1446 1447 scif0: serial@e6e60000 { 1448 compatible = "renesas,scif-r8a7795", 1449 "renesas,rcar-gen3-scif", "renesas,scif"; 1450 reg = <0 0xe6e60000 0 64>; 1451 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1452 clocks = <&cpg CPG_MOD 207>, 1453 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1454 <&scif_clk>; 1455 clock-names = "fck", "brg_int", "scif_clk"; 1456 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1457 <&dmac2 0x51>, <&dmac2 0x50>; 1458 dma-names = "tx", "rx", "tx", "rx"; 1459 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1460 resets = <&cpg 207>; 1461 status = "disabled"; 1462 }; 1463 1464 scif1: serial@e6e68000 { 1465 compatible = "renesas,scif-r8a7795", 1466 "renesas,rcar-gen3-scif", "renesas,scif"; 1467 reg = <0 0xe6e68000 0 64>; 1468 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1469 clocks = <&cpg CPG_MOD 206>, 1470 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1471 <&scif_clk>; 1472 clock-names = "fck", "brg_int", "scif_clk"; 1473 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1474 <&dmac2 0x53>, <&dmac2 0x52>; 1475 dma-names = "tx", "rx", "tx", "rx"; 1476 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1477 resets = <&cpg 206>; 1478 status = "disabled"; 1479 }; 1480 1481 scif2: serial@e6e88000 { 1482 compatible = "renesas,scif-r8a7795", 1483 "renesas,rcar-gen3-scif", "renesas,scif"; 1484 reg = <0 0xe6e88000 0 64>; 1485 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1486 clocks = <&cpg CPG_MOD 310>, 1487 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1488 <&scif_clk>; 1489 clock-names = "fck", "brg_int", "scif_clk"; 1490 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1491 <&dmac2 0x13>, <&dmac2 0x12>; 1492 dma-names = "tx", "rx", "tx", "rx"; 1493 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1494 resets = <&cpg 310>; 1495 status = "disabled"; 1496 }; 1497 1498 scif3: serial@e6c50000 { 1499 compatible = "renesas,scif-r8a7795", 1500 "renesas,rcar-gen3-scif", "renesas,scif"; 1501 reg = <0 0xe6c50000 0 64>; 1502 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1503 clocks = <&cpg CPG_MOD 204>, 1504 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1505 <&scif_clk>; 1506 clock-names = "fck", "brg_int", "scif_clk"; 1507 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1508 dma-names = "tx", "rx"; 1509 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1510 resets = <&cpg 204>; 1511 status = "disabled"; 1512 }; 1513 1514 scif4: serial@e6c40000 { 1515 compatible = "renesas,scif-r8a7795", 1516 "renesas,rcar-gen3-scif", "renesas,scif"; 1517 reg = <0 0xe6c40000 0 64>; 1518 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1519 clocks = <&cpg CPG_MOD 203>, 1520 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1521 <&scif_clk>; 1522 clock-names = "fck", "brg_int", "scif_clk"; 1523 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1524 dma-names = "tx", "rx"; 1525 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1526 resets = <&cpg 203>; 1527 status = "disabled"; 1528 }; 1529 1530 scif5: serial@e6f30000 { 1531 compatible = "renesas,scif-r8a7795", 1532 "renesas,rcar-gen3-scif", "renesas,scif"; 1533 reg = <0 0xe6f30000 0 64>; 1534 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1535 clocks = <&cpg CPG_MOD 202>, 1536 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1537 <&scif_clk>; 1538 clock-names = "fck", "brg_int", "scif_clk"; 1539 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1540 <&dmac2 0x5b>, <&dmac2 0x5a>; 1541 dma-names = "tx", "rx", "tx", "rx"; 1542 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1543 resets = <&cpg 202>; 1544 status = "disabled"; 1545 }; 1546 1547 tpu: pwm@e6e80000 { 1548 compatible = "renesas,tpu-r8a7795", "renesas,tpu"; 1549 reg = <0 0xe6e80000 0 0x148>; 1550 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1551 clocks = <&cpg CPG_MOD 304>; 1552 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1553 resets = <&cpg 304>; 1554 #pwm-cells = <3>; 1555 status = "disabled"; 1556 }; 1557 1558 msiof0: spi@e6e90000 { 1559 compatible = "renesas,msiof-r8a7795", 1560 "renesas,rcar-gen3-msiof"; 1561 reg = <0 0xe6e90000 0 0x0064>; 1562 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1563 clocks = <&cpg CPG_MOD 211>; 1564 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1565 <&dmac2 0x41>, <&dmac2 0x40>; 1566 dma-names = "tx", "rx", "tx", "rx"; 1567 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1568 resets = <&cpg 211>; 1569 #address-cells = <1>; 1570 #size-cells = <0>; 1571 status = "disabled"; 1572 }; 1573 1574 msiof1: spi@e6ea0000 { 1575 compatible = "renesas,msiof-r8a7795", 1576 "renesas,rcar-gen3-msiof"; 1577 reg = <0 0xe6ea0000 0 0x0064>; 1578 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1579 clocks = <&cpg CPG_MOD 210>; 1580 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1581 <&dmac2 0x43>, <&dmac2 0x42>; 1582 dma-names = "tx", "rx", "tx", "rx"; 1583 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1584 resets = <&cpg 210>; 1585 #address-cells = <1>; 1586 #size-cells = <0>; 1587 status = "disabled"; 1588 }; 1589 1590 msiof2: spi@e6c00000 { 1591 compatible = "renesas,msiof-r8a7795", 1592 "renesas,rcar-gen3-msiof"; 1593 reg = <0 0xe6c00000 0 0x0064>; 1594 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1595 clocks = <&cpg CPG_MOD 209>; 1596 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1597 dma-names = "tx", "rx"; 1598 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1599 resets = <&cpg 209>; 1600 #address-cells = <1>; 1601 #size-cells = <0>; 1602 status = "disabled"; 1603 }; 1604 1605 msiof3: spi@e6c10000 { 1606 compatible = "renesas,msiof-r8a7795", 1607 "renesas,rcar-gen3-msiof"; 1608 reg = <0 0xe6c10000 0 0x0064>; 1609 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1610 clocks = <&cpg CPG_MOD 208>; 1611 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1612 dma-names = "tx", "rx"; 1613 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1614 resets = <&cpg 208>; 1615 #address-cells = <1>; 1616 #size-cells = <0>; 1617 status = "disabled"; 1618 }; 1619 1620 vin0: video@e6ef0000 { 1621 compatible = "renesas,vin-r8a7795"; 1622 reg = <0 0xe6ef0000 0 0x1000>; 1623 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1624 clocks = <&cpg CPG_MOD 811>; 1625 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1626 resets = <&cpg 811>; 1627 renesas,id = <0>; 1628 status = "disabled"; 1629 1630 ports { 1631 #address-cells = <1>; 1632 #size-cells = <0>; 1633 1634 port@1 { 1635 #address-cells = <1>; 1636 #size-cells = <0>; 1637 1638 reg = <1>; 1639 1640 vin0csi20: endpoint@0 { 1641 reg = <0>; 1642 remote-endpoint = <&csi20vin0>; 1643 }; 1644 vin0csi40: endpoint@2 { 1645 reg = <2>; 1646 remote-endpoint = <&csi40vin0>; 1647 }; 1648 }; 1649 }; 1650 }; 1651 1652 vin1: video@e6ef1000 { 1653 compatible = "renesas,vin-r8a7795"; 1654 reg = <0 0xe6ef1000 0 0x1000>; 1655 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1656 clocks = <&cpg CPG_MOD 810>; 1657 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1658 resets = <&cpg 810>; 1659 renesas,id = <1>; 1660 status = "disabled"; 1661 1662 ports { 1663 #address-cells = <1>; 1664 #size-cells = <0>; 1665 1666 port@1 { 1667 #address-cells = <1>; 1668 #size-cells = <0>; 1669 1670 reg = <1>; 1671 1672 vin1csi20: endpoint@0 { 1673 reg = <0>; 1674 remote-endpoint = <&csi20vin1>; 1675 }; 1676 vin1csi40: endpoint@2 { 1677 reg = <2>; 1678 remote-endpoint = <&csi40vin1>; 1679 }; 1680 }; 1681 }; 1682 }; 1683 1684 vin2: video@e6ef2000 { 1685 compatible = "renesas,vin-r8a7795"; 1686 reg = <0 0xe6ef2000 0 0x1000>; 1687 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1688 clocks = <&cpg CPG_MOD 809>; 1689 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1690 resets = <&cpg 809>; 1691 renesas,id = <2>; 1692 status = "disabled"; 1693 1694 ports { 1695 #address-cells = <1>; 1696 #size-cells = <0>; 1697 1698 port@1 { 1699 #address-cells = <1>; 1700 #size-cells = <0>; 1701 1702 reg = <1>; 1703 1704 vin2csi20: endpoint@0 { 1705 reg = <0>; 1706 remote-endpoint = <&csi20vin2>; 1707 }; 1708 vin2csi40: endpoint@2 { 1709 reg = <2>; 1710 remote-endpoint = <&csi40vin2>; 1711 }; 1712 }; 1713 }; 1714 }; 1715 1716 vin3: video@e6ef3000 { 1717 compatible = "renesas,vin-r8a7795"; 1718 reg = <0 0xe6ef3000 0 0x1000>; 1719 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1720 clocks = <&cpg CPG_MOD 808>; 1721 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1722 resets = <&cpg 808>; 1723 renesas,id = <3>; 1724 status = "disabled"; 1725 1726 ports { 1727 #address-cells = <1>; 1728 #size-cells = <0>; 1729 1730 port@1 { 1731 #address-cells = <1>; 1732 #size-cells = <0>; 1733 1734 reg = <1>; 1735 1736 vin3csi20: endpoint@0 { 1737 reg = <0>; 1738 remote-endpoint = <&csi20vin3>; 1739 }; 1740 vin3csi40: endpoint@2 { 1741 reg = <2>; 1742 remote-endpoint = <&csi40vin3>; 1743 }; 1744 }; 1745 }; 1746 }; 1747 1748 vin4: video@e6ef4000 { 1749 compatible = "renesas,vin-r8a7795"; 1750 reg = <0 0xe6ef4000 0 0x1000>; 1751 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1752 clocks = <&cpg CPG_MOD 807>; 1753 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1754 resets = <&cpg 807>; 1755 renesas,id = <4>; 1756 status = "disabled"; 1757 1758 ports { 1759 #address-cells = <1>; 1760 #size-cells = <0>; 1761 1762 port@1 { 1763 #address-cells = <1>; 1764 #size-cells = <0>; 1765 1766 reg = <1>; 1767 1768 vin4csi20: endpoint@0 { 1769 reg = <0>; 1770 remote-endpoint = <&csi20vin4>; 1771 }; 1772 vin4csi41: endpoint@3 { 1773 reg = <3>; 1774 remote-endpoint = <&csi41vin4>; 1775 }; 1776 }; 1777 }; 1778 }; 1779 1780 vin5: video@e6ef5000 { 1781 compatible = "renesas,vin-r8a7795"; 1782 reg = <0 0xe6ef5000 0 0x1000>; 1783 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1784 clocks = <&cpg CPG_MOD 806>; 1785 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1786 resets = <&cpg 806>; 1787 renesas,id = <5>; 1788 status = "disabled"; 1789 1790 ports { 1791 #address-cells = <1>; 1792 #size-cells = <0>; 1793 1794 port@1 { 1795 #address-cells = <1>; 1796 #size-cells = <0>; 1797 1798 reg = <1>; 1799 1800 vin5csi20: endpoint@0 { 1801 reg = <0>; 1802 remote-endpoint = <&csi20vin5>; 1803 }; 1804 vin5csi41: endpoint@3 { 1805 reg = <3>; 1806 remote-endpoint = <&csi41vin5>; 1807 }; 1808 }; 1809 }; 1810 }; 1811 1812 vin6: video@e6ef6000 { 1813 compatible = "renesas,vin-r8a7795"; 1814 reg = <0 0xe6ef6000 0 0x1000>; 1815 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1816 clocks = <&cpg CPG_MOD 805>; 1817 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1818 resets = <&cpg 805>; 1819 renesas,id = <6>; 1820 status = "disabled"; 1821 1822 ports { 1823 #address-cells = <1>; 1824 #size-cells = <0>; 1825 1826 port@1 { 1827 #address-cells = <1>; 1828 #size-cells = <0>; 1829 1830 reg = <1>; 1831 1832 vin6csi20: endpoint@0 { 1833 reg = <0>; 1834 remote-endpoint = <&csi20vin6>; 1835 }; 1836 vin6csi41: endpoint@3 { 1837 reg = <3>; 1838 remote-endpoint = <&csi41vin6>; 1839 }; 1840 }; 1841 }; 1842 }; 1843 1844 vin7: video@e6ef7000 { 1845 compatible = "renesas,vin-r8a7795"; 1846 reg = <0 0xe6ef7000 0 0x1000>; 1847 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1848 clocks = <&cpg CPG_MOD 804>; 1849 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1850 resets = <&cpg 804>; 1851 renesas,id = <7>; 1852 status = "disabled"; 1853 1854 ports { 1855 #address-cells = <1>; 1856 #size-cells = <0>; 1857 1858 port@1 { 1859 #address-cells = <1>; 1860 #size-cells = <0>; 1861 1862 reg = <1>; 1863 1864 vin7csi20: endpoint@0 { 1865 reg = <0>; 1866 remote-endpoint = <&csi20vin7>; 1867 }; 1868 vin7csi41: endpoint@3 { 1869 reg = <3>; 1870 remote-endpoint = <&csi41vin7>; 1871 }; 1872 }; 1873 }; 1874 }; 1875 1876 drif00: rif@e6f40000 { 1877 compatible = "renesas,r8a7795-drif", 1878 "renesas,rcar-gen3-drif"; 1879 reg = <0 0xe6f40000 0 0x64>; 1880 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1881 clocks = <&cpg CPG_MOD 515>; 1882 clock-names = "fck"; 1883 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1884 dma-names = "rx", "rx"; 1885 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1886 resets = <&cpg 515>; 1887 renesas,bonding = <&drif01>; 1888 status = "disabled"; 1889 }; 1890 1891 drif01: rif@e6f50000 { 1892 compatible = "renesas,r8a7795-drif", 1893 "renesas,rcar-gen3-drif"; 1894 reg = <0 0xe6f50000 0 0x64>; 1895 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1896 clocks = <&cpg CPG_MOD 514>; 1897 clock-names = "fck"; 1898 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1899 dma-names = "rx", "rx"; 1900 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1901 resets = <&cpg 514>; 1902 renesas,bonding = <&drif00>; 1903 status = "disabled"; 1904 }; 1905 1906 drif10: rif@e6f60000 { 1907 compatible = "renesas,r8a7795-drif", 1908 "renesas,rcar-gen3-drif"; 1909 reg = <0 0xe6f60000 0 0x64>; 1910 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1911 clocks = <&cpg CPG_MOD 513>; 1912 clock-names = "fck"; 1913 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1914 dma-names = "rx", "rx"; 1915 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1916 resets = <&cpg 513>; 1917 renesas,bonding = <&drif11>; 1918 status = "disabled"; 1919 }; 1920 1921 drif11: rif@e6f70000 { 1922 compatible = "renesas,r8a7795-drif", 1923 "renesas,rcar-gen3-drif"; 1924 reg = <0 0xe6f70000 0 0x64>; 1925 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1926 clocks = <&cpg CPG_MOD 512>; 1927 clock-names = "fck"; 1928 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1929 dma-names = "rx", "rx"; 1930 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1931 resets = <&cpg 512>; 1932 renesas,bonding = <&drif10>; 1933 status = "disabled"; 1934 }; 1935 1936 drif20: rif@e6f80000 { 1937 compatible = "renesas,r8a7795-drif", 1938 "renesas,rcar-gen3-drif"; 1939 reg = <0 0xe6f80000 0 0x64>; 1940 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1941 clocks = <&cpg CPG_MOD 511>; 1942 clock-names = "fck"; 1943 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1944 dma-names = "rx", "rx"; 1945 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1946 resets = <&cpg 511>; 1947 renesas,bonding = <&drif21>; 1948 status = "disabled"; 1949 }; 1950 1951 drif21: rif@e6f90000 { 1952 compatible = "renesas,r8a7795-drif", 1953 "renesas,rcar-gen3-drif"; 1954 reg = <0 0xe6f90000 0 0x64>; 1955 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1956 clocks = <&cpg CPG_MOD 510>; 1957 clock-names = "fck"; 1958 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1959 dma-names = "rx", "rx"; 1960 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1961 resets = <&cpg 510>; 1962 renesas,bonding = <&drif20>; 1963 status = "disabled"; 1964 }; 1965 1966 drif30: rif@e6fa0000 { 1967 compatible = "renesas,r8a7795-drif", 1968 "renesas,rcar-gen3-drif"; 1969 reg = <0 0xe6fa0000 0 0x64>; 1970 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1971 clocks = <&cpg CPG_MOD 509>; 1972 clock-names = "fck"; 1973 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1974 dma-names = "rx", "rx"; 1975 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1976 resets = <&cpg 509>; 1977 renesas,bonding = <&drif31>; 1978 status = "disabled"; 1979 }; 1980 1981 drif31: rif@e6fb0000 { 1982 compatible = "renesas,r8a7795-drif", 1983 "renesas,rcar-gen3-drif"; 1984 reg = <0 0xe6fb0000 0 0x64>; 1985 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1986 clocks = <&cpg CPG_MOD 508>; 1987 clock-names = "fck"; 1988 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1989 dma-names = "rx", "rx"; 1990 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1991 resets = <&cpg 508>; 1992 renesas,bonding = <&drif30>; 1993 status = "disabled"; 1994 }; 1995 1996 rcar_sound: sound@ec500000 { 1997 /* 1998 * #sound-dai-cells is required if simple-card 1999 * 2000 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 2001 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 2002 */ 2003 /* 2004 * #clock-cells is required for audio_clkout0/1/2/3 2005 * 2006 * clkout : #clock-cells = <0>; <&rcar_sound>; 2007 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 2008 */ 2009 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; 2010 reg = <0 0xec500000 0 0x1000>, /* SCU */ 2011 <0 0xec5a0000 0 0x100>, /* ADG */ 2012 <0 0xec540000 0 0x1000>, /* SSIU */ 2013 <0 0xec541000 0 0x280>, /* SSI */ 2014 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 2015 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 2016 2017 clocks = <&cpg CPG_MOD 1005>, 2018 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 2019 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 2020 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 2021 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 2022 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 2023 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 2024 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 2025 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 2026 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 2027 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 2028 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 2029 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 2030 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 2031 <&audio_clk_a>, <&audio_clk_b>, 2032 <&audio_clk_c>, 2033 <&cpg CPG_MOD 922>; 2034 clock-names = "ssi-all", 2035 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 2036 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 2037 "ssi.1", "ssi.0", 2038 "src.9", "src.8", "src.7", "src.6", 2039 "src.5", "src.4", "src.3", "src.2", 2040 "src.1", "src.0", 2041 "mix.1", "mix.0", 2042 "ctu.1", "ctu.0", 2043 "dvc.0", "dvc.1", 2044 "clk_a", "clk_b", "clk_c", "clk_i"; 2045 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2046 resets = <&cpg 1005>, 2047 <&cpg 1006>, <&cpg 1007>, 2048 <&cpg 1008>, <&cpg 1009>, 2049 <&cpg 1010>, <&cpg 1011>, 2050 <&cpg 1012>, <&cpg 1013>, 2051 <&cpg 1014>, <&cpg 1015>; 2052 reset-names = "ssi-all", 2053 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 2054 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 2055 "ssi.1", "ssi.0"; 2056 status = "disabled"; 2057 2058 rcar_sound,dvc { 2059 dvc0: dvc-0 { 2060 dmas = <&audma1 0xbc>; 2061 dma-names = "tx"; 2062 }; 2063 dvc1: dvc-1 { 2064 dmas = <&audma1 0xbe>; 2065 dma-names = "tx"; 2066 }; 2067 }; 2068 2069 rcar_sound,mix { 2070 mix0: mix-0 { }; 2071 mix1: mix-1 { }; 2072 }; 2073 2074 rcar_sound,ctu { 2075 ctu00: ctu-0 { }; 2076 ctu01: ctu-1 { }; 2077 ctu02: ctu-2 { }; 2078 ctu03: ctu-3 { }; 2079 ctu10: ctu-4 { }; 2080 ctu11: ctu-5 { }; 2081 ctu12: ctu-6 { }; 2082 ctu13: ctu-7 { }; 2083 }; 2084 2085 rcar_sound,src { 2086 src0: src-0 { 2087 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 2088 dmas = <&audma0 0x85>, <&audma1 0x9a>; 2089 dma-names = "rx", "tx"; 2090 }; 2091 src1: src-1 { 2092 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 2093 dmas = <&audma0 0x87>, <&audma1 0x9c>; 2094 dma-names = "rx", "tx"; 2095 }; 2096 src2: src-2 { 2097 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 2098 dmas = <&audma0 0x89>, <&audma1 0x9e>; 2099 dma-names = "rx", "tx"; 2100 }; 2101 src3: src-3 { 2102 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 2103 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 2104 dma-names = "rx", "tx"; 2105 }; 2106 src4: src-4 { 2107 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 2108 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 2109 dma-names = "rx", "tx"; 2110 }; 2111 src5: src-5 { 2112 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 2113 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 2114 dma-names = "rx", "tx"; 2115 }; 2116 src6: src-6 { 2117 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 2118 dmas = <&audma0 0x91>, <&audma1 0xb4>; 2119 dma-names = "rx", "tx"; 2120 }; 2121 src7: src-7 { 2122 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 2123 dmas = <&audma0 0x93>, <&audma1 0xb6>; 2124 dma-names = "rx", "tx"; 2125 }; 2126 src8: src-8 { 2127 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 2128 dmas = <&audma0 0x95>, <&audma1 0xb8>; 2129 dma-names = "rx", "tx"; 2130 }; 2131 src9: src-9 { 2132 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 2133 dmas = <&audma0 0x97>, <&audma1 0xba>; 2134 dma-names = "rx", "tx"; 2135 }; 2136 }; 2137 2138 rcar_sound,ssiu { 2139 ssiu00: ssiu-0 { 2140 dmas = <&audma0 0x15>, <&audma1 0x16>; 2141 dma-names = "rx", "tx"; 2142 }; 2143 ssiu01: ssiu-1 { 2144 dmas = <&audma0 0x35>, <&audma1 0x36>; 2145 dma-names = "rx", "tx"; 2146 }; 2147 ssiu02: ssiu-2 { 2148 dmas = <&audma0 0x37>, <&audma1 0x38>; 2149 dma-names = "rx", "tx"; 2150 }; 2151 ssiu03: ssiu-3 { 2152 dmas = <&audma0 0x47>, <&audma1 0x48>; 2153 dma-names = "rx", "tx"; 2154 }; 2155 ssiu04: ssiu-4 { 2156 dmas = <&audma0 0x3F>, <&audma1 0x40>; 2157 dma-names = "rx", "tx"; 2158 }; 2159 ssiu05: ssiu-5 { 2160 dmas = <&audma0 0x43>, <&audma1 0x44>; 2161 dma-names = "rx", "tx"; 2162 }; 2163 ssiu06: ssiu-6 { 2164 dmas = <&audma0 0x4F>, <&audma1 0x50>; 2165 dma-names = "rx", "tx"; 2166 }; 2167 ssiu07: ssiu-7 { 2168 dmas = <&audma0 0x53>, <&audma1 0x54>; 2169 dma-names = "rx", "tx"; 2170 }; 2171 ssiu10: ssiu-8 { 2172 dmas = <&audma0 0x49>, <&audma1 0x4a>; 2173 dma-names = "rx", "tx"; 2174 }; 2175 ssiu11: ssiu-9 { 2176 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 2177 dma-names = "rx", "tx"; 2178 }; 2179 ssiu12: ssiu-10 { 2180 dmas = <&audma0 0x57>, <&audma1 0x58>; 2181 dma-names = "rx", "tx"; 2182 }; 2183 ssiu13: ssiu-11 { 2184 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2185 dma-names = "rx", "tx"; 2186 }; 2187 ssiu14: ssiu-12 { 2188 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2189 dma-names = "rx", "tx"; 2190 }; 2191 ssiu15: ssiu-13 { 2192 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2193 dma-names = "rx", "tx"; 2194 }; 2195 ssiu16: ssiu-14 { 2196 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2197 dma-names = "rx", "tx"; 2198 }; 2199 ssiu17: ssiu-15 { 2200 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2201 dma-names = "rx", "tx"; 2202 }; 2203 ssiu20: ssiu-16 { 2204 dmas = <&audma0 0x63>, <&audma1 0x64>; 2205 dma-names = "rx", "tx"; 2206 }; 2207 ssiu21: ssiu-17 { 2208 dmas = <&audma0 0x67>, <&audma1 0x68>; 2209 dma-names = "rx", "tx"; 2210 }; 2211 ssiu22: ssiu-18 { 2212 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2213 dma-names = "rx", "tx"; 2214 }; 2215 ssiu23: ssiu-19 { 2216 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2217 dma-names = "rx", "tx"; 2218 }; 2219 ssiu24: ssiu-20 { 2220 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2221 dma-names = "rx", "tx"; 2222 }; 2223 ssiu25: ssiu-21 { 2224 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2225 dma-names = "rx", "tx"; 2226 }; 2227 ssiu26: ssiu-22 { 2228 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2229 dma-names = "rx", "tx"; 2230 }; 2231 ssiu27: ssiu-23 { 2232 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2233 dma-names = "rx", "tx"; 2234 }; 2235 ssiu30: ssiu-24 { 2236 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2237 dma-names = "rx", "tx"; 2238 }; 2239 ssiu31: ssiu-25 { 2240 dmas = <&audma0 0x21>, <&audma1 0x22>; 2241 dma-names = "rx", "tx"; 2242 }; 2243 ssiu32: ssiu-26 { 2244 dmas = <&audma0 0x23>, <&audma1 0x24>; 2245 dma-names = "rx", "tx"; 2246 }; 2247 ssiu33: ssiu-27 { 2248 dmas = <&audma0 0x25>, <&audma1 0x26>; 2249 dma-names = "rx", "tx"; 2250 }; 2251 ssiu34: ssiu-28 { 2252 dmas = <&audma0 0x27>, <&audma1 0x28>; 2253 dma-names = "rx", "tx"; 2254 }; 2255 ssiu35: ssiu-29 { 2256 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2257 dma-names = "rx", "tx"; 2258 }; 2259 ssiu36: ssiu-30 { 2260 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2261 dma-names = "rx", "tx"; 2262 }; 2263 ssiu37: ssiu-31 { 2264 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2265 dma-names = "rx", "tx"; 2266 }; 2267 ssiu40: ssiu-32 { 2268 dmas = <&audma0 0x71>, <&audma1 0x72>; 2269 dma-names = "rx", "tx"; 2270 }; 2271 ssiu41: ssiu-33 { 2272 dmas = <&audma0 0x17>, <&audma1 0x18>; 2273 dma-names = "rx", "tx"; 2274 }; 2275 ssiu42: ssiu-34 { 2276 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2277 dma-names = "rx", "tx"; 2278 }; 2279 ssiu43: ssiu-35 { 2280 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2281 dma-names = "rx", "tx"; 2282 }; 2283 ssiu44: ssiu-36 { 2284 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2285 dma-names = "rx", "tx"; 2286 }; 2287 ssiu45: ssiu-37 { 2288 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2289 dma-names = "rx", "tx"; 2290 }; 2291 ssiu46: ssiu-38 { 2292 dmas = <&audma0 0x31>, <&audma1 0x32>; 2293 dma-names = "rx", "tx"; 2294 }; 2295 ssiu47: ssiu-39 { 2296 dmas = <&audma0 0x33>, <&audma1 0x34>; 2297 dma-names = "rx", "tx"; 2298 }; 2299 ssiu50: ssiu-40 { 2300 dmas = <&audma0 0x73>, <&audma1 0x74>; 2301 dma-names = "rx", "tx"; 2302 }; 2303 ssiu60: ssiu-41 { 2304 dmas = <&audma0 0x75>, <&audma1 0x76>; 2305 dma-names = "rx", "tx"; 2306 }; 2307 ssiu70: ssiu-42 { 2308 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2309 dma-names = "rx", "tx"; 2310 }; 2311 ssiu80: ssiu-43 { 2312 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2313 dma-names = "rx", "tx"; 2314 }; 2315 ssiu90: ssiu-44 { 2316 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2317 dma-names = "rx", "tx"; 2318 }; 2319 ssiu91: ssiu-45 { 2320 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2321 dma-names = "rx", "tx"; 2322 }; 2323 ssiu92: ssiu-46 { 2324 dmas = <&audma0 0x81>, <&audma1 0x82>; 2325 dma-names = "rx", "tx"; 2326 }; 2327 ssiu93: ssiu-47 { 2328 dmas = <&audma0 0x83>, <&audma1 0x84>; 2329 dma-names = "rx", "tx"; 2330 }; 2331 ssiu94: ssiu-48 { 2332 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2333 dma-names = "rx", "tx"; 2334 }; 2335 ssiu95: ssiu-49 { 2336 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2337 dma-names = "rx", "tx"; 2338 }; 2339 ssiu96: ssiu-50 { 2340 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2341 dma-names = "rx", "tx"; 2342 }; 2343 ssiu97: ssiu-51 { 2344 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2345 dma-names = "rx", "tx"; 2346 }; 2347 }; 2348 2349 rcar_sound,ssi { 2350 ssi0: ssi-0 { 2351 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2352 dmas = <&audma0 0x01>, <&audma1 0x02>; 2353 dma-names = "rx", "tx"; 2354 }; 2355 ssi1: ssi-1 { 2356 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2357 dmas = <&audma0 0x03>, <&audma1 0x04>; 2358 dma-names = "rx", "tx"; 2359 }; 2360 ssi2: ssi-2 { 2361 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2362 dmas = <&audma0 0x05>, <&audma1 0x06>; 2363 dma-names = "rx", "tx"; 2364 }; 2365 ssi3: ssi-3 { 2366 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2367 dmas = <&audma0 0x07>, <&audma1 0x08>; 2368 dma-names = "rx", "tx"; 2369 }; 2370 ssi4: ssi-4 { 2371 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2372 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2373 dma-names = "rx", "tx"; 2374 }; 2375 ssi5: ssi-5 { 2376 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2377 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2378 dma-names = "rx", "tx"; 2379 }; 2380 ssi6: ssi-6 { 2381 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2382 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2383 dma-names = "rx", "tx"; 2384 }; 2385 ssi7: ssi-7 { 2386 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2387 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2388 dma-names = "rx", "tx"; 2389 }; 2390 ssi8: ssi-8 { 2391 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2392 dmas = <&audma0 0x11>, <&audma1 0x12>; 2393 dma-names = "rx", "tx"; 2394 }; 2395 ssi9: ssi-9 { 2396 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2397 dmas = <&audma0 0x13>, <&audma1 0x14>; 2398 dma-names = "rx", "tx"; 2399 }; 2400 }; 2401 }; 2402 2403 mlp: mlp@ec520000 { 2404 compatible = "renesas,r8a7795-mlp", 2405 "renesas,rcar-gen3-mlp"; 2406 reg = <0 0xec520000 0 0x800>; 2407 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2408 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2409 clocks = <&cpg CPG_MOD 802>; 2410 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2411 resets = <&cpg 802>; 2412 status = "disabled"; 2413 }; 2414 2415 audma0: dma-controller@ec700000 { 2416 compatible = "renesas,dmac-r8a7795", 2417 "renesas,rcar-dmac"; 2418 reg = <0 0xec700000 0 0x10000>; 2419 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2420 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2421 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2422 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2423 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2424 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2425 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2426 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2427 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2428 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2429 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2430 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2431 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2432 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2433 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2434 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2435 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2436 interrupt-names = "error", 2437 "ch0", "ch1", "ch2", "ch3", 2438 "ch4", "ch5", "ch6", "ch7", 2439 "ch8", "ch9", "ch10", "ch11", 2440 "ch12", "ch13", "ch14", "ch15"; 2441 clocks = <&cpg CPG_MOD 502>; 2442 clock-names = "fck"; 2443 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2444 resets = <&cpg 502>; 2445 #dma-cells = <1>; 2446 dma-channels = <16>; 2447 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>, 2448 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>, 2449 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>, 2450 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>, 2451 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>, 2452 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>, 2453 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>, 2454 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>; 2455 }; 2456 2457 audma1: dma-controller@ec720000 { 2458 compatible = "renesas,dmac-r8a7795", 2459 "renesas,rcar-dmac"; 2460 reg = <0 0xec720000 0 0x10000>; 2461 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2462 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2463 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2464 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2465 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2466 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2467 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2468 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2469 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2470 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2471 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2472 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2473 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2474 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2475 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2476 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2477 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2478 interrupt-names = "error", 2479 "ch0", "ch1", "ch2", "ch3", 2480 "ch4", "ch5", "ch6", "ch7", 2481 "ch8", "ch9", "ch10", "ch11", 2482 "ch12", "ch13", "ch14", "ch15"; 2483 clocks = <&cpg CPG_MOD 501>; 2484 clock-names = "fck"; 2485 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2486 resets = <&cpg 501>; 2487 #dma-cells = <1>; 2488 dma-channels = <16>; 2489 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>, 2490 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>, 2491 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>, 2492 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>, 2493 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>, 2494 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>, 2495 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>, 2496 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>; 2497 }; 2498 2499 xhci0: usb@ee000000 { 2500 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; 2501 reg = <0 0xee000000 0 0xc00>; 2502 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2503 clocks = <&cpg CPG_MOD 328>; 2504 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2505 resets = <&cpg 328>; 2506 status = "disabled"; 2507 }; 2508 2509 usb3_peri0: usb@ee020000 { 2510 compatible = "renesas,r8a7795-usb3-peri", 2511 "renesas,rcar-gen3-usb3-peri"; 2512 reg = <0 0xee020000 0 0x400>; 2513 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2514 clocks = <&cpg CPG_MOD 328>; 2515 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2516 resets = <&cpg 328>; 2517 status = "disabled"; 2518 }; 2519 2520 ohci0: usb@ee080000 { 2521 compatible = "generic-ohci"; 2522 reg = <0 0xee080000 0 0x100>; 2523 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2524 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2525 phys = <&usb2_phy0 1>; 2526 phy-names = "usb"; 2527 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2528 resets = <&cpg 703>, <&cpg 704>; 2529 status = "disabled"; 2530 }; 2531 2532 ohci1: usb@ee0a0000 { 2533 compatible = "generic-ohci"; 2534 reg = <0 0xee0a0000 0 0x100>; 2535 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2536 clocks = <&cpg CPG_MOD 702>; 2537 phys = <&usb2_phy1 1>; 2538 phy-names = "usb"; 2539 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2540 resets = <&cpg 702>; 2541 status = "disabled"; 2542 }; 2543 2544 ohci2: usb@ee0c0000 { 2545 compatible = "generic-ohci"; 2546 reg = <0 0xee0c0000 0 0x100>; 2547 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 2548 clocks = <&cpg CPG_MOD 701>; 2549 phys = <&usb2_phy2 1>; 2550 phy-names = "usb"; 2551 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2552 resets = <&cpg 701>; 2553 status = "disabled"; 2554 }; 2555 2556 ohci3: usb@ee0e0000 { 2557 compatible = "generic-ohci"; 2558 reg = <0 0xee0e0000 0 0x100>; 2559 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2560 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2561 phys = <&usb2_phy3 1>; 2562 phy-names = "usb"; 2563 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2564 resets = <&cpg 700>, <&cpg 705>; 2565 status = "disabled"; 2566 }; 2567 2568 ehci0: usb@ee080100 { 2569 compatible = "generic-ehci"; 2570 reg = <0 0xee080100 0 0x100>; 2571 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2572 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2573 phys = <&usb2_phy0 2>; 2574 phy-names = "usb"; 2575 companion = <&ohci0>; 2576 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2577 resets = <&cpg 703>, <&cpg 704>; 2578 status = "disabled"; 2579 }; 2580 2581 ehci1: usb@ee0a0100 { 2582 compatible = "generic-ehci"; 2583 reg = <0 0xee0a0100 0 0x100>; 2584 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2585 clocks = <&cpg CPG_MOD 702>; 2586 phys = <&usb2_phy1 2>; 2587 phy-names = "usb"; 2588 companion = <&ohci1>; 2589 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2590 resets = <&cpg 702>; 2591 status = "disabled"; 2592 }; 2593 2594 ehci2: usb@ee0c0100 { 2595 compatible = "generic-ehci"; 2596 reg = <0 0xee0c0100 0 0x100>; 2597 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 2598 clocks = <&cpg CPG_MOD 701>; 2599 phys = <&usb2_phy2 2>; 2600 phy-names = "usb"; 2601 companion = <&ohci2>; 2602 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2603 resets = <&cpg 701>; 2604 status = "disabled"; 2605 }; 2606 2607 ehci3: usb@ee0e0100 { 2608 compatible = "generic-ehci"; 2609 reg = <0 0xee0e0100 0 0x100>; 2610 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2611 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2612 phys = <&usb2_phy3 2>; 2613 phy-names = "usb"; 2614 companion = <&ohci3>; 2615 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2616 resets = <&cpg 700>, <&cpg 705>; 2617 status = "disabled"; 2618 }; 2619 2620 usb2_phy0: usb-phy@ee080200 { 2621 compatible = "renesas,usb2-phy-r8a7795", 2622 "renesas,rcar-gen3-usb2-phy"; 2623 reg = <0 0xee080200 0 0x700>; 2624 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2625 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2626 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2627 resets = <&cpg 703>, <&cpg 704>; 2628 #phy-cells = <1>; 2629 status = "disabled"; 2630 }; 2631 2632 usb2_phy1: usb-phy@ee0a0200 { 2633 compatible = "renesas,usb2-phy-r8a7795", 2634 "renesas,rcar-gen3-usb2-phy"; 2635 reg = <0 0xee0a0200 0 0x700>; 2636 clocks = <&cpg CPG_MOD 702>; 2637 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2638 resets = <&cpg 702>; 2639 #phy-cells = <1>; 2640 status = "disabled"; 2641 }; 2642 2643 usb2_phy2: usb-phy@ee0c0200 { 2644 compatible = "renesas,usb2-phy-r8a7795", 2645 "renesas,rcar-gen3-usb2-phy"; 2646 reg = <0 0xee0c0200 0 0x700>; 2647 clocks = <&cpg CPG_MOD 701>; 2648 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2649 resets = <&cpg 701>; 2650 #phy-cells = <1>; 2651 status = "disabled"; 2652 }; 2653 2654 usb2_phy3: usb-phy@ee0e0200 { 2655 compatible = "renesas,usb2-phy-r8a7795", 2656 "renesas,rcar-gen3-usb2-phy"; 2657 reg = <0 0xee0e0200 0 0x700>; 2658 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2659 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2660 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2661 resets = <&cpg 700>, <&cpg 705>; 2662 #phy-cells = <1>; 2663 status = "disabled"; 2664 }; 2665 2666 sdhi0: mmc@ee100000 { 2667 compatible = "renesas,sdhi-r8a7795", 2668 "renesas,rcar-gen3-sdhi"; 2669 reg = <0 0xee100000 0 0x2000>; 2670 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2671 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>; 2672 clock-names = "core", "clkh"; 2673 max-frequency = <200000000>; 2674 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2675 resets = <&cpg 314>; 2676 iommus = <&ipmmu_ds1 32>; 2677 status = "disabled"; 2678 }; 2679 2680 sdhi1: mmc@ee120000 { 2681 compatible = "renesas,sdhi-r8a7795", 2682 "renesas,rcar-gen3-sdhi"; 2683 reg = <0 0xee120000 0 0x2000>; 2684 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2685 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7795_CLK_SD1H>; 2686 clock-names = "core", "clkh"; 2687 max-frequency = <200000000>; 2688 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2689 resets = <&cpg 313>; 2690 iommus = <&ipmmu_ds1 33>; 2691 status = "disabled"; 2692 }; 2693 2694 sdhi2: mmc@ee140000 { 2695 compatible = "renesas,sdhi-r8a7795", 2696 "renesas,rcar-gen3-sdhi"; 2697 reg = <0 0xee140000 0 0x2000>; 2698 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2699 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>; 2700 clock-names = "core", "clkh"; 2701 max-frequency = <200000000>; 2702 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2703 resets = <&cpg 312>; 2704 iommus = <&ipmmu_ds1 34>; 2705 status = "disabled"; 2706 }; 2707 2708 sdhi3: mmc@ee160000 { 2709 compatible = "renesas,sdhi-r8a7795", 2710 "renesas,rcar-gen3-sdhi"; 2711 reg = <0 0xee160000 0 0x2000>; 2712 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2713 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7795_CLK_SD3H>; 2714 clock-names = "core", "clkh"; 2715 max-frequency = <200000000>; 2716 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2717 resets = <&cpg 311>; 2718 iommus = <&ipmmu_ds1 35>; 2719 status = "disabled"; 2720 }; 2721 2722 rpc: spi@ee200000 { 2723 compatible = "renesas,r8a7795-rpc-if", 2724 "renesas,rcar-gen3-rpc-if"; 2725 reg = <0 0xee200000 0 0x200>, 2726 <0 0x08000000 0 0x04000000>, 2727 <0 0xee208000 0 0x100>; 2728 reg-names = "regs", "dirmap", "wbuf"; 2729 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2730 clocks = <&cpg CPG_MOD 917>; 2731 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2732 resets = <&cpg 917>; 2733 #address-cells = <1>; 2734 #size-cells = <0>; 2735 status = "disabled"; 2736 }; 2737 2738 sata: sata@ee300000 { 2739 compatible = "renesas,sata-r8a7795", 2740 "renesas,rcar-gen3-sata"; 2741 reg = <0 0xee300000 0 0x200000>; 2742 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2743 clocks = <&cpg CPG_MOD 815>; 2744 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2745 resets = <&cpg 815>; 2746 status = "disabled"; 2747 iommus = <&ipmmu_hc 2>; 2748 }; 2749 2750 gic: interrupt-controller@f1010000 { 2751 compatible = "arm,gic-400"; 2752 #interrupt-cells = <3>; 2753 #address-cells = <0>; 2754 interrupt-controller; 2755 reg = <0x0 0xf1010000 0 0x1000>, 2756 <0x0 0xf1020000 0 0x20000>, 2757 <0x0 0xf1040000 0 0x20000>, 2758 <0x0 0xf1060000 0 0x20000>; 2759 interrupts = <GIC_PPI 9 2760 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 2761 clocks = <&cpg CPG_MOD 408>; 2762 clock-names = "clk"; 2763 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2764 resets = <&cpg 408>; 2765 }; 2766 2767 pciec0: pcie@fe000000 { 2768 compatible = "renesas,pcie-r8a7795", 2769 "renesas,pcie-rcar-gen3"; 2770 reg = <0 0xfe000000 0 0x80000>; 2771 #address-cells = <3>; 2772 #size-cells = <2>; 2773 bus-range = <0x00 0xff>; 2774 device_type = "pci"; 2775 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2776 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2777 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2778 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2779 /* Map all possible DDR/IOMMU as inbound ranges */ 2780 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2781 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2782 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2783 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2784 #interrupt-cells = <1>; 2785 interrupt-map-mask = <0 0 0 0>; 2786 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2787 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2788 clock-names = "pcie", "pcie_bus"; 2789 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2790 resets = <&cpg 319>; 2791 iommu-map = <0 &ipmmu_hc 0 1>; 2792 iommu-map-mask = <0>; 2793 status = "disabled"; 2794 }; 2795 2796 pciec1: pcie@ee800000 { 2797 compatible = "renesas,pcie-r8a7795", 2798 "renesas,pcie-rcar-gen3"; 2799 reg = <0 0xee800000 0 0x80000>; 2800 #address-cells = <3>; 2801 #size-cells = <2>; 2802 bus-range = <0x00 0xff>; 2803 device_type = "pci"; 2804 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2805 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2806 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2807 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2808 /* Map all possible DDR/IOMMU as inbound ranges */ 2809 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2810 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2811 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2812 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2813 #interrupt-cells = <1>; 2814 interrupt-map-mask = <0 0 0 0>; 2815 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2816 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2817 clock-names = "pcie", "pcie_bus"; 2818 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2819 resets = <&cpg 318>; 2820 iommu-map = <0 &ipmmu_hc 1 1>; 2821 iommu-map-mask = <0>; 2822 status = "disabled"; 2823 }; 2824 2825 pciec0_ep: pcie-ep@fe000000 { 2826 compatible = "renesas,r8a7795-pcie-ep", 2827 "renesas,rcar-gen3-pcie-ep"; 2828 reg = <0x0 0xfe000000 0 0x80000>, 2829 <0x0 0xfe100000 0 0x100000>, 2830 <0x0 0xfe200000 0 0x200000>, 2831 <0x0 0x30000000 0 0x8000000>, 2832 <0x0 0x38000000 0 0x8000000>; 2833 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2834 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2835 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2836 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2837 clocks = <&cpg CPG_MOD 319>; 2838 clock-names = "pcie"; 2839 resets = <&cpg 319>; 2840 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2841 status = "disabled"; 2842 }; 2843 2844 pciec1_ep: pcie-ep@ee800000 { 2845 compatible = "renesas,r8a7795-pcie-ep", 2846 "renesas,rcar-gen3-pcie-ep"; 2847 reg = <0x0 0xee800000 0 0x80000>, 2848 <0x0 0xee900000 0 0x100000>, 2849 <0x0 0xeea00000 0 0x200000>, 2850 <0x0 0xc0000000 0 0x8000000>, 2851 <0x0 0xc8000000 0 0x8000000>; 2852 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2853 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2854 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2855 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2856 clocks = <&cpg CPG_MOD 318>; 2857 clock-names = "pcie"; 2858 resets = <&cpg 318>; 2859 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2860 status = "disabled"; 2861 }; 2862 2863 imr-lx4@fe860000 { 2864 compatible = "renesas,r8a7795-imr-lx4", 2865 "renesas,imr-lx4"; 2866 reg = <0 0xfe860000 0 0x2000>; 2867 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2868 clocks = <&cpg CPG_MOD 823>; 2869 power-domains = <&sysc R8A7795_PD_A3VC>; 2870 resets = <&cpg 823>; 2871 }; 2872 2873 imr-lx4@fe870000 { 2874 compatible = "renesas,r8a7795-imr-lx4", 2875 "renesas,imr-lx4"; 2876 reg = <0 0xfe870000 0 0x2000>; 2877 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2878 clocks = <&cpg CPG_MOD 822>; 2879 power-domains = <&sysc R8A7795_PD_A3VC>; 2880 resets = <&cpg 822>; 2881 }; 2882 2883 imr-lx4@fe880000 { 2884 compatible = "renesas,r8a7795-imr-lx4", 2885 "renesas,imr-lx4"; 2886 reg = <0 0xfe880000 0 0x2000>; 2887 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 2888 clocks = <&cpg CPG_MOD 821>; 2889 power-domains = <&sysc R8A7795_PD_A3VC>; 2890 resets = <&cpg 821>; 2891 }; 2892 2893 imr-lx4@fe890000 { 2894 compatible = "renesas,r8a7795-imr-lx4", 2895 "renesas,imr-lx4"; 2896 reg = <0 0xfe890000 0 0x2000>; 2897 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 2898 clocks = <&cpg CPG_MOD 820>; 2899 power-domains = <&sysc R8A7795_PD_A3VC>; 2900 resets = <&cpg 820>; 2901 }; 2902 2903 vspbc: vsp@fe920000 { 2904 compatible = "renesas,vsp2"; 2905 reg = <0 0xfe920000 0 0x8000>; 2906 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; 2907 clocks = <&cpg CPG_MOD 624>; 2908 power-domains = <&sysc R8A7795_PD_A3VP>; 2909 resets = <&cpg 624>; 2910 2911 renesas,fcp = <&fcpvb1>; 2912 }; 2913 2914 vspbd: vsp@fe960000 { 2915 compatible = "renesas,vsp2"; 2916 reg = <0 0xfe960000 0 0x8000>; 2917 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2918 clocks = <&cpg CPG_MOD 626>; 2919 power-domains = <&sysc R8A7795_PD_A3VP>; 2920 resets = <&cpg 626>; 2921 2922 renesas,fcp = <&fcpvb0>; 2923 }; 2924 2925 vspd0: vsp@fea20000 { 2926 compatible = "renesas,vsp2"; 2927 reg = <0 0xfea20000 0 0x5000>; 2928 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2929 clocks = <&cpg CPG_MOD 623>; 2930 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2931 resets = <&cpg 623>; 2932 2933 renesas,fcp = <&fcpvd0>; 2934 }; 2935 2936 vspd1: vsp@fea28000 { 2937 compatible = "renesas,vsp2"; 2938 reg = <0 0xfea28000 0 0x5000>; 2939 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2940 clocks = <&cpg CPG_MOD 622>; 2941 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2942 resets = <&cpg 622>; 2943 2944 renesas,fcp = <&fcpvd1>; 2945 }; 2946 2947 vspd2: vsp@fea30000 { 2948 compatible = "renesas,vsp2"; 2949 reg = <0 0xfea30000 0 0x5000>; 2950 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2951 clocks = <&cpg CPG_MOD 621>; 2952 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2953 resets = <&cpg 621>; 2954 2955 renesas,fcp = <&fcpvd2>; 2956 }; 2957 2958 vspi0: vsp@fe9a0000 { 2959 compatible = "renesas,vsp2"; 2960 reg = <0 0xfe9a0000 0 0x8000>; 2961 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2962 clocks = <&cpg CPG_MOD 631>; 2963 power-domains = <&sysc R8A7795_PD_A3VP>; 2964 resets = <&cpg 631>; 2965 2966 renesas,fcp = <&fcpvi0>; 2967 }; 2968 2969 vspi1: vsp@fe9b0000 { 2970 compatible = "renesas,vsp2"; 2971 reg = <0 0xfe9b0000 0 0x8000>; 2972 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; 2973 clocks = <&cpg CPG_MOD 630>; 2974 power-domains = <&sysc R8A7795_PD_A3VP>; 2975 resets = <&cpg 630>; 2976 2977 renesas,fcp = <&fcpvi1>; 2978 }; 2979 2980 fdp1@fe940000 { 2981 compatible = "renesas,fdp1"; 2982 reg = <0 0xfe940000 0 0x2400>; 2983 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2984 clocks = <&cpg CPG_MOD 119>; 2985 power-domains = <&sysc R8A7795_PD_A3VP>; 2986 resets = <&cpg 119>; 2987 renesas,fcp = <&fcpf0>; 2988 }; 2989 2990 fdp1@fe944000 { 2991 compatible = "renesas,fdp1"; 2992 reg = <0 0xfe944000 0 0x2400>; 2993 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 2994 clocks = <&cpg CPG_MOD 118>; 2995 power-domains = <&sysc R8A7795_PD_A3VP>; 2996 resets = <&cpg 118>; 2997 renesas,fcp = <&fcpf1>; 2998 }; 2999 3000 fcpf0: fcp@fe950000 { 3001 compatible = "renesas,fcpf"; 3002 reg = <0 0xfe950000 0 0x200>; 3003 clocks = <&cpg CPG_MOD 615>; 3004 power-domains = <&sysc R8A7795_PD_A3VP>; 3005 resets = <&cpg 615>; 3006 iommus = <&ipmmu_vp0 0>; 3007 }; 3008 3009 fcpf1: fcp@fe951000 { 3010 compatible = "renesas,fcpf"; 3011 reg = <0 0xfe951000 0 0x200>; 3012 clocks = <&cpg CPG_MOD 614>; 3013 power-domains = <&sysc R8A7795_PD_A3VP>; 3014 resets = <&cpg 614>; 3015 iommus = <&ipmmu_vp1 1>; 3016 }; 3017 3018 fcpvb0: fcp@fe96f000 { 3019 compatible = "renesas,fcpv"; 3020 reg = <0 0xfe96f000 0 0x200>; 3021 clocks = <&cpg CPG_MOD 607>; 3022 power-domains = <&sysc R8A7795_PD_A3VP>; 3023 resets = <&cpg 607>; 3024 iommus = <&ipmmu_vp0 5>; 3025 }; 3026 3027 fcpvb1: fcp@fe92f000 { 3028 compatible = "renesas,fcpv"; 3029 reg = <0 0xfe92f000 0 0x200>; 3030 clocks = <&cpg CPG_MOD 606>; 3031 power-domains = <&sysc R8A7795_PD_A3VP>; 3032 resets = <&cpg 606>; 3033 iommus = <&ipmmu_vp1 7>; 3034 }; 3035 3036 fcpvi0: fcp@fe9af000 { 3037 compatible = "renesas,fcpv"; 3038 reg = <0 0xfe9af000 0 0x200>; 3039 clocks = <&cpg CPG_MOD 611>; 3040 power-domains = <&sysc R8A7795_PD_A3VP>; 3041 resets = <&cpg 611>; 3042 iommus = <&ipmmu_vp0 8>; 3043 }; 3044 3045 fcpvi1: fcp@fe9bf000 { 3046 compatible = "renesas,fcpv"; 3047 reg = <0 0xfe9bf000 0 0x200>; 3048 clocks = <&cpg CPG_MOD 610>; 3049 power-domains = <&sysc R8A7795_PD_A3VP>; 3050 resets = <&cpg 610>; 3051 iommus = <&ipmmu_vp1 9>; 3052 }; 3053 3054 fcpvd0: fcp@fea27000 { 3055 compatible = "renesas,fcpv"; 3056 reg = <0 0xfea27000 0 0x200>; 3057 clocks = <&cpg CPG_MOD 603>; 3058 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3059 resets = <&cpg 603>; 3060 iommus = <&ipmmu_vi0 8>; 3061 }; 3062 3063 fcpvd1: fcp@fea2f000 { 3064 compatible = "renesas,fcpv"; 3065 reg = <0 0xfea2f000 0 0x200>; 3066 clocks = <&cpg CPG_MOD 602>; 3067 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3068 resets = <&cpg 602>; 3069 iommus = <&ipmmu_vi0 9>; 3070 }; 3071 3072 fcpvd2: fcp@fea37000 { 3073 compatible = "renesas,fcpv"; 3074 reg = <0 0xfea37000 0 0x200>; 3075 clocks = <&cpg CPG_MOD 601>; 3076 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3077 resets = <&cpg 601>; 3078 iommus = <&ipmmu_vi1 10>; 3079 }; 3080 3081 cmm0: cmm@fea40000 { 3082 compatible = "renesas,r8a7795-cmm", 3083 "renesas,rcar-gen3-cmm"; 3084 reg = <0 0xfea40000 0 0x1000>; 3085 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3086 clocks = <&cpg CPG_MOD 711>; 3087 resets = <&cpg 711>; 3088 }; 3089 3090 cmm1: cmm@fea50000 { 3091 compatible = "renesas,r8a7795-cmm", 3092 "renesas,rcar-gen3-cmm"; 3093 reg = <0 0xfea50000 0 0x1000>; 3094 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3095 clocks = <&cpg CPG_MOD 710>; 3096 resets = <&cpg 710>; 3097 }; 3098 3099 cmm2: cmm@fea60000 { 3100 compatible = "renesas,r8a7795-cmm", 3101 "renesas,rcar-gen3-cmm"; 3102 reg = <0 0xfea60000 0 0x1000>; 3103 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3104 clocks = <&cpg CPG_MOD 709>; 3105 resets = <&cpg 709>; 3106 }; 3107 3108 cmm3: cmm@fea70000 { 3109 compatible = "renesas,r8a7795-cmm", 3110 "renesas,rcar-gen3-cmm"; 3111 reg = <0 0xfea70000 0 0x1000>; 3112 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3113 clocks = <&cpg CPG_MOD 708>; 3114 resets = <&cpg 708>; 3115 }; 3116 3117 csi20: csi2@fea80000 { 3118 compatible = "renesas,r8a7795-csi2"; 3119 reg = <0 0xfea80000 0 0x10000>; 3120 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 3121 clocks = <&cpg CPG_MOD 714>; 3122 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3123 resets = <&cpg 714>; 3124 status = "disabled"; 3125 3126 ports { 3127 #address-cells = <1>; 3128 #size-cells = <0>; 3129 3130 port@0 { 3131 reg = <0>; 3132 }; 3133 3134 port@1 { 3135 #address-cells = <1>; 3136 #size-cells = <0>; 3137 3138 reg = <1>; 3139 3140 csi20vin0: endpoint@0 { 3141 reg = <0>; 3142 remote-endpoint = <&vin0csi20>; 3143 }; 3144 csi20vin1: endpoint@1 { 3145 reg = <1>; 3146 remote-endpoint = <&vin1csi20>; 3147 }; 3148 csi20vin2: endpoint@2 { 3149 reg = <2>; 3150 remote-endpoint = <&vin2csi20>; 3151 }; 3152 csi20vin3: endpoint@3 { 3153 reg = <3>; 3154 remote-endpoint = <&vin3csi20>; 3155 }; 3156 csi20vin4: endpoint@4 { 3157 reg = <4>; 3158 remote-endpoint = <&vin4csi20>; 3159 }; 3160 csi20vin5: endpoint@5 { 3161 reg = <5>; 3162 remote-endpoint = <&vin5csi20>; 3163 }; 3164 csi20vin6: endpoint@6 { 3165 reg = <6>; 3166 remote-endpoint = <&vin6csi20>; 3167 }; 3168 csi20vin7: endpoint@7 { 3169 reg = <7>; 3170 remote-endpoint = <&vin7csi20>; 3171 }; 3172 }; 3173 }; 3174 }; 3175 3176 csi40: csi2@feaa0000 { 3177 compatible = "renesas,r8a7795-csi2"; 3178 reg = <0 0xfeaa0000 0 0x10000>; 3179 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 3180 clocks = <&cpg CPG_MOD 716>; 3181 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3182 resets = <&cpg 716>; 3183 status = "disabled"; 3184 3185 ports { 3186 #address-cells = <1>; 3187 #size-cells = <0>; 3188 3189 port@0 { 3190 reg = <0>; 3191 }; 3192 3193 port@1 { 3194 #address-cells = <1>; 3195 #size-cells = <0>; 3196 3197 reg = <1>; 3198 3199 csi40vin0: endpoint@0 { 3200 reg = <0>; 3201 remote-endpoint = <&vin0csi40>; 3202 }; 3203 csi40vin1: endpoint@1 { 3204 reg = <1>; 3205 remote-endpoint = <&vin1csi40>; 3206 }; 3207 csi40vin2: endpoint@2 { 3208 reg = <2>; 3209 remote-endpoint = <&vin2csi40>; 3210 }; 3211 csi40vin3: endpoint@3 { 3212 reg = <3>; 3213 remote-endpoint = <&vin3csi40>; 3214 }; 3215 }; 3216 }; 3217 }; 3218 3219 csi41: csi2@feab0000 { 3220 compatible = "renesas,r8a7795-csi2"; 3221 reg = <0 0xfeab0000 0 0x10000>; 3222 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 3223 clocks = <&cpg CPG_MOD 715>; 3224 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3225 resets = <&cpg 715>; 3226 status = "disabled"; 3227 3228 ports { 3229 #address-cells = <1>; 3230 #size-cells = <0>; 3231 3232 port@0 { 3233 reg = <0>; 3234 }; 3235 3236 port@1 { 3237 #address-cells = <1>; 3238 #size-cells = <0>; 3239 3240 reg = <1>; 3241 3242 csi41vin4: endpoint@0 { 3243 reg = <0>; 3244 remote-endpoint = <&vin4csi41>; 3245 }; 3246 csi41vin5: endpoint@1 { 3247 reg = <1>; 3248 remote-endpoint = <&vin5csi41>; 3249 }; 3250 csi41vin6: endpoint@2 { 3251 reg = <2>; 3252 remote-endpoint = <&vin6csi41>; 3253 }; 3254 csi41vin7: endpoint@3 { 3255 reg = <3>; 3256 remote-endpoint = <&vin7csi41>; 3257 }; 3258 }; 3259 }; 3260 }; 3261 3262 hdmi0: hdmi@fead0000 { 3263 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; 3264 reg = <0 0xfead0000 0 0x10000>; 3265 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 3266 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; 3267 clock-names = "iahb", "isfr"; 3268 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3269 resets = <&cpg 729>; 3270 status = "disabled"; 3271 3272 ports { 3273 #address-cells = <1>; 3274 #size-cells = <0>; 3275 port@0 { 3276 reg = <0>; 3277 dw_hdmi0_in: endpoint { 3278 remote-endpoint = <&du_out_hdmi0>; 3279 }; 3280 }; 3281 port@1 { 3282 reg = <1>; 3283 }; 3284 port@2 { 3285 /* HDMI sound */ 3286 reg = <2>; 3287 }; 3288 }; 3289 }; 3290 3291 hdmi1: hdmi@feae0000 { 3292 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; 3293 reg = <0 0xfeae0000 0 0x10000>; 3294 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>; 3295 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; 3296 clock-names = "iahb", "isfr"; 3297 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3298 resets = <&cpg 728>; 3299 status = "disabled"; 3300 3301 ports { 3302 #address-cells = <1>; 3303 #size-cells = <0>; 3304 port@0 { 3305 reg = <0>; 3306 dw_hdmi1_in: endpoint { 3307 remote-endpoint = <&du_out_hdmi1>; 3308 }; 3309 }; 3310 port@1 { 3311 reg = <1>; 3312 }; 3313 port@2 { 3314 /* HDMI sound */ 3315 reg = <2>; 3316 }; 3317 }; 3318 }; 3319 3320 du: display@feb00000 { 3321 compatible = "renesas,du-r8a7795"; 3322 reg = <0 0xfeb00000 0 0x80000>; 3323 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 3324 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 3325 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, 3326 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 3327 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 3328 <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>; 3329 clock-names = "du.0", "du.1", "du.2", "du.3"; 3330 resets = <&cpg 724>, <&cpg 722>; 3331 reset-names = "du.0", "du.2"; 3332 3333 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>; 3334 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, 3335 <&vspd0 1>; 3336 3337 status = "disabled"; 3338 3339 ports { 3340 #address-cells = <1>; 3341 #size-cells = <0>; 3342 3343 port@0 { 3344 reg = <0>; 3345 }; 3346 port@1 { 3347 reg = <1>; 3348 du_out_hdmi0: endpoint { 3349 remote-endpoint = <&dw_hdmi0_in>; 3350 }; 3351 }; 3352 port@2 { 3353 reg = <2>; 3354 du_out_hdmi1: endpoint { 3355 remote-endpoint = <&dw_hdmi1_in>; 3356 }; 3357 }; 3358 port@3 { 3359 reg = <3>; 3360 du_out_lvds0: endpoint { 3361 remote-endpoint = <&lvds0_in>; 3362 }; 3363 }; 3364 }; 3365 }; 3366 3367 lvds0: lvds@feb90000 { 3368 compatible = "renesas,r8a7795-lvds"; 3369 reg = <0 0xfeb90000 0 0x14>; 3370 clocks = <&cpg CPG_MOD 727>; 3371 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3372 resets = <&cpg 727>; 3373 status = "disabled"; 3374 3375 ports { 3376 #address-cells = <1>; 3377 #size-cells = <0>; 3378 3379 port@0 { 3380 reg = <0>; 3381 lvds0_in: endpoint { 3382 remote-endpoint = <&du_out_lvds0>; 3383 }; 3384 }; 3385 port@1 { 3386 reg = <1>; 3387 }; 3388 }; 3389 }; 3390 3391 prr: chipid@fff00044 { 3392 compatible = "renesas,prr"; 3393 reg = <0 0xfff00044 0 4>; 3394 }; 3395 }; 3396 3397 thermal-zones { 3398 sensor1_thermal: sensor1-thermal { 3399 polling-delay-passive = <250>; 3400 polling-delay = <1000>; 3401 thermal-sensors = <&tsc 0>; 3402 sustainable-power = <6313>; 3403 3404 trips { 3405 sensor1_crit: sensor1-crit { 3406 temperature = <120000>; 3407 hysteresis = <1000>; 3408 type = "critical"; 3409 }; 3410 }; 3411 }; 3412 3413 sensor2_thermal: sensor2-thermal { 3414 polling-delay-passive = <250>; 3415 polling-delay = <1000>; 3416 thermal-sensors = <&tsc 1>; 3417 sustainable-power = <6313>; 3418 3419 trips { 3420 sensor2_crit: sensor2-crit { 3421 temperature = <120000>; 3422 hysteresis = <1000>; 3423 type = "critical"; 3424 }; 3425 }; 3426 }; 3427 3428 sensor3_thermal: sensor3-thermal { 3429 polling-delay-passive = <250>; 3430 polling-delay = <1000>; 3431 thermal-sensors = <&tsc 2>; 3432 3433 trips { 3434 target: trip-point1 { 3435 temperature = <100000>; 3436 hysteresis = <1000>; 3437 type = "passive"; 3438 }; 3439 3440 sensor3_crit: sensor3-crit { 3441 temperature = <120000>; 3442 hysteresis = <1000>; 3443 type = "critical"; 3444 }; 3445 }; 3446 3447 cooling-maps { 3448 map0 { 3449 trip = <&target>; 3450 cooling-device = <&a57_0 2 4>; 3451 contribution = <1024>; 3452 }; 3453 3454 map1 { 3455 trip = <&target>; 3456 cooling-device = <&a53_0 0 2>; 3457 contribution = <1024>; 3458 }; 3459 }; 3460 }; 3461 }; 3462 3463 timer { 3464 compatible = "arm,armv8-timer"; 3465 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3466 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3467 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3468 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 3469 }; 3470 3471 /* External USB clocks - can be overridden by the board */ 3472 usb3s0_clk: usb3s0 { 3473 compatible = "fixed-clock"; 3474 #clock-cells = <0>; 3475 clock-frequency = <0>; 3476 }; 3477 3478 usb_extal_clk: usb_extal { 3479 compatible = "fixed-clock"; 3480 #clock-cells = <0>; 3481 clock-frequency = <0>; 3482 }; 3483}; 3484