1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright 2020, Compass Electronics Group, LLC 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/clk/versaclock.h> 8 9/ { 10 memory@48000000 { 11 device_type = "memory"; 12 /* first 128MB is reserved for secure area. */ 13 reg = <0x0 0x48000000 0x0 0x78000000>; 14 }; 15 16 osc_32k: osc_32k { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 19 clock-frequency = <32768>; 20 clock-output-names = "osc_32k"; 21 }; 22 23 reg_1p8v: regulator-1p8v { 24 compatible = "regulator-fixed"; 25 regulator-name = "fixed-1.8V"; 26 regulator-min-microvolt = <1800000>; 27 regulator-max-microvolt = <1800000>; 28 regulator-boot-on; 29 regulator-always-on; 30 }; 31 32 reg_3p3v: regulator-3p3v { 33 compatible = "regulator-fixed"; 34 regulator-name = "fixed-3.3V"; 35 regulator-min-microvolt = <3300000>; 36 regulator-max-microvolt = <3300000>; 37 regulator-boot-on; 38 regulator-always-on; 39 }; 40 41 wlan_pwrseq: wlan_pwrseq { 42 compatible = "mmc-pwrseq-simple"; 43 reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>; 44 clocks = <&osc_32k>; 45 clock-names = "ext_clock"; 46 post-power-on-delay-ms = <80>; 47 }; 48}; 49 50&avb { 51 pinctrl-0 = <&avb_pins>; 52 pinctrl-names = "default"; 53 phy-mode = "rgmii-rxid"; 54 phy-handle = <&phy0>; 55 rx-internal-delay-ps = <1800>; 56 tx-internal-delay-ps = <2000>; 57 clocks = <&cpg CPG_MOD 812>, <&versaclock5 4>; 58 clock-names = "fck", "refclk"; 59 status = "okay"; 60 61 phy0: ethernet-phy@0 { 62 compatible = "ethernet-phy-id004d.d074", 63 "ethernet-phy-ieee802.3-c22"; 64 reg = <0>; 65 interrupt-parent = <&gpio2>; 66 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 67 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 68 }; 69}; 70 71&extal_clk { 72 clock-frequency = <16666666>; 73}; 74 75&extalr_clk { 76 clock-frequency = <32768>; 77}; 78 79&gpio6 { 80 usb-hub-reset-hog { 81 gpio-hog; 82 gpios = <10 GPIO_ACTIVE_HIGH>; 83 output-high; 84 line-name = "usb-hub-reset"; 85 }; 86}; 87 88&hscif0 { 89 pinctrl-0 = <&hscif0_pins>; 90 pinctrl-names = "default"; 91 uart-has-rtscts; 92 status = "okay"; 93 94 bluetooth { 95 compatible = "brcm,bcm43438-bt"; 96 shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>; 97 host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; 98 device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>; 99 clocks = <&osc_32k>; 100 clock-names = "extclk"; 101 max-speed = <4000000>; 102 }; 103}; 104 105&hscif2 { 106 status = "okay"; 107 pinctrl-0 = <&hscif2_pins>; 108 pinctrl-names = "default"; 109}; 110 111&i2c4 { 112 status = "okay"; 113 clock-frequency = <100000>; 114 115 pca9654: gpio@20 { 116 compatible = "onnn,pca9654"; 117 reg = <0x20>; 118 gpio-controller; 119 #gpio-cells = <2>; 120 gpio-line-names = 121 "i2c4_20_0", 122 "wl_reg_on", 123 "bt_reg_on", 124 "i2c4_20_3", 125 "i2c4_20_4", 126 "bt_dev_wake", 127 "i2c4_20_6", 128 "i2c4_20_7"; 129 }; 130 131 pca9654_lte: gpio@21 { 132 compatible = "onnn,pca9654"; 133 reg = <0x21>; 134 interrupt-parent = <&gpio5>; 135 interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 136 interrupt-controller; 137 #interrupt-cells = <2>; 138 gpio-controller; 139 #gpio-cells = <2>; 140 gpio-line-names = 141 "i2c4_21_0", 142 "zoe_pwr_on", 143 "zoe_extint", 144 "zoe_reset_n", 145 "sara_reset", 146 "i2c4_21_5", 147 "sara_pwr_off", 148 "sara_networking_status"; 149 }; 150 151 eeprom@50 { 152 compatible = "microchip,24c64", "atmel,24c64"; 153 pagesize = <32>; 154 read-only; /* Manufacturing EEPROM programmed at factory */ 155 reg = <0x50>; 156 }; 157 158 rtc@51 { 159 compatible = "nxp,pcf85263"; 160 reg = <0x51>; 161 }; 162 163 versaclock5: versaclock_som@6a { 164 compatible = "idt,5p49v6965"; 165 reg = <0x6a>; 166 #clock-cells = <1>; 167 clocks = <&x304_clk>; 168 clock-names = "xin"; 169 /* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */ 170 assigned-clocks = <&versaclock5 1>, 171 <&versaclock5 2>, 172 <&versaclock5 3>, 173 <&versaclock5 4>; 174 175 assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>; 176 177 OUT1 { 178 idt,mode = <VC5_CMOS>; 179 idt,voltage-microvolt = <1800000>; 180 idt,slew-percent = <100>; 181 }; 182 183 OUT2 { 184 idt,mode = <VC5_CMOS>; 185 idt,voltage-microvolt = <1800000>; 186 idt,slew-percent = <100>; 187 }; 188 189 OUT3 { 190 idt,mode = <VC5_CMOS>; 191 idt,voltage-microvolt = <1800000>; 192 idt,slew-percent = <100>; 193 }; 194 195 OUT4 { 196 idt,mode = <VC5_CMOS>; 197 idt,voltage-microvolt = <3300000>; 198 idt,slew-percent = <100>; 199 }; 200 }; 201}; 202 203&pfc { 204 pinctrl-0 = <&scif_clk_pins>; 205 pinctrl-names = "default"; 206 207 avb_pins: avb { 208 mux { 209 groups = "avb_link", "avb_mdio", "avb_mii"; 210 function = "avb"; 211 }; 212 213 pins_mdio { 214 groups = "avb_mdio"; 215 drive-strength = <24>; 216 }; 217 218 pins_mii_tx { 219 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", 220 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; 221 drive-strength = <12>; 222 }; 223 }; 224 225 scif2_pins: scif2 { 226 groups = "scif2_data_a"; 227 function = "scif2"; 228 }; 229 230 hscif0_pins: hscif0 { 231 groups = "hscif0_data", "hscif0_ctrl"; 232 function = "hscif0"; 233 }; 234 235 hscif1_pins: hscif1 { 236 groups = "hscif1_data_a", "hscif1_ctrl_a"; 237 function = "hscif1"; 238 }; 239 240 hscif2_pins: hscif2 { 241 groups = "hscif2_data_a"; 242 function = "hscif2"; 243 }; 244 245 scif0_pins: scif0 { 246 groups = "scif0_data"; 247 function = "scif0"; 248 }; 249 250 scif5_pins: scif5 { 251 groups = "scif5_data_a"; 252 function = "scif5"; 253 }; 254 255 scif_clk_pins: scif_clk { 256 groups = "scif_clk_a"; 257 function = "scif_clk"; 258 }; 259 260 i2c0_pins: i2c0 { 261 groups = "i2c0"; 262 function = "i2c0"; 263 }; 264 265 sdhi2_pins: sd2 { 266 groups = "sdhi2_data4", "sdhi2_ctrl"; 267 function = "sdhi2"; 268 power-source = <1800>; 269 }; 270 271 sdhi3_pins: sd3 { 272 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds"; 273 function = "sdhi3"; 274 power-source = <1800>; 275 }; 276}; 277 278&scif_clk { 279 clock-frequency = <14745600>; 280}; 281 282&scif2 { 283 pinctrl-0 = <&scif2_pins>; 284 pinctrl-names = "default"; 285 status = "okay"; 286}; 287 288&sdhi2 { 289 pinctrl-names = "default"; 290 pinctrl-0 = <&sdhi2_pins>; 291 bus-width = <4>; 292 vmmc-supply = <®_3p3v>; 293 vqmmc-supply = <®_1p8v>; 294 non-removable; 295 cap-power-off-card; 296 keep-power-in-suspend; 297 mmc-pwrseq = <&wlan_pwrseq>; 298 status = "okay"; 299 #address-cells = <1>; 300 #size-cells = <0>; 301 302 brcmf: bcrmf@1 { 303 reg = <1>; 304 compatible = "brcm,bcm4329-fmac"; 305 interrupt-parent = <&gpio1>; 306 interrupts = <27 IRQ_TYPE_LEVEL_LOW>; 307 interrupt-names = "host-wake"; 308 }; 309}; 310 311&sdhi3 { 312 pinctrl-0 = <&sdhi3_pins>; 313 pinctrl-1 = <&sdhi3_pins>; 314 pinctrl-names = "default", "state_uhs"; 315 vmmc-supply = <®_3p3v>; 316 vqmmc-supply = <®_1p8v>; 317 bus-width = <8>; 318 mmc-hs200-1_8v; 319 no-sd; 320 no-sdio; 321 non-removable; 322 fixed-emmc-driver-type = <1>; 323 status = "okay"; 324}; 325 326&usb2_clksel { 327 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, 328 <&versaclock5 3>, <&usb3s0_clk>; 329 status = "okay"; 330}; 331 332&usb3s0_clk { 333 clock-frequency = <100000000>; 334}; 335